Index: llvm/trunk/lib/Target/Mips/MipsABIInfo.h =================================================================== --- llvm/trunk/lib/Target/Mips/MipsABIInfo.h +++ llvm/trunk/lib/Target/Mips/MipsABIInfo.h @@ -38,8 +38,12 @@ bool IsEABI() const { return ThisABI == ABI::EABI; } ABI GetEnumValue() const { return ThisABI; } + /// The registers to use for byval arguments. const ArrayRef GetByValArgRegs() const; + /// The registers to use for the variable argument list. + const ArrayRef GetVarArgRegs() const; + /// Ordering of ABI's /// MipsGenSubtargetInfo.inc will use this to resolve conflicts when given /// multiple ABI options. Index: llvm/trunk/lib/Target/Mips/MipsABIInfo.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MipsABIInfo.cpp +++ llvm/trunk/lib/Target/Mips/MipsABIInfo.cpp @@ -27,3 +27,11 @@ return makeArrayRef(Mips64IntRegs); llvm_unreachable("Unhandled ABI"); } + +const ArrayRef MipsABIInfo::GetVarArgRegs() const { + if (IsO32()) + return makeArrayRef(O32IntRegs); + if (IsN32() || IsN64()) + return makeArrayRef(Mips64IntRegs); + llvm_unreachable("Unhandled ABI"); +} Index: llvm/trunk/lib/Target/Mips/MipsISelLowering.h =================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.h +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h @@ -367,9 +367,6 @@ /// register arguments. This is 16-byte if ABI is O32. unsigned reservedArgArea() const; - /// Return pointer to array of integer argument registers. - const ArrayRef intArgRegs() const; - private: CallingConv::ID CallConv; const MipsSubtarget &Subtarget; Index: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp @@ -3628,12 +3628,6 @@ return (Subtarget.isABI_O32() && (CallConv != CallingConv::Fast)) ? 16 : 0; } -const ArrayRef MipsTargetLowering::MipsCC::intArgRegs() const { - if (Subtarget.isABI_O32()) - return makeArrayRef(O32IntRegs); - return makeArrayRef(Mips64IntRegs); -} - void MipsTargetLowering::copyByValRegs( SDValue Chain, SDLoc DL, std::vector &OutChains, SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, SmallVectorImpl &InVals, @@ -3646,11 +3640,11 @@ unsigned RegAreaSize = NumRegs * GPRSizeInBytes; unsigned FrameObjSize = std::max(Flags.getByValSize(), RegAreaSize); int FrameObjOffset; + ArrayRef ByValArgRegs = Subtarget.getABI().GetByValArgRegs(); if (RegAreaSize) - FrameObjOffset = - (int)CC.reservedArgArea() - - (int)((CC.intArgRegs().size() - FirstReg) * GPRSizeInBytes); + FrameObjOffset = (int)CC.reservedArgArea() - + (int)((ByValArgRegs.size() - FirstReg) * GPRSizeInBytes); else FrameObjOffset = VA.getLocMemOffset(); @@ -3668,7 +3662,7 @@ const TargetRegisterClass *RC = getRegClassFor(RegTy); for (unsigned I = 0; I < NumRegs; ++I) { - unsigned ArgReg = CC.intArgRegs()[FirstReg + I]; + unsigned ArgReg = ByValArgRegs[FirstReg + I]; unsigned VReg = addLiveIn(MF, ArgReg, RC); unsigned Offset = I * GPRSizeInBytes; SDValue StorePtr = DAG.getNode(ISD::ADD, DL, PtrTy, FIN, @@ -3696,7 +3690,7 @@ unsigned NumRegs = LastReg - FirstReg; if (NumRegs) { - const ArrayRef ArgRegs = CC.intArgRegs(); + const ArrayRef ArgRegs = Subtarget.getABI().GetByValArgRegs(); bool LeftoverBytes = (NumRegs * RegSizeInBytes > ByValSizeInBytes); unsigned I = 0; @@ -3779,7 +3773,7 @@ const MipsCC &CC, SDValue Chain, SDLoc DL, SelectionDAG &DAG, CCState &State) const { - const ArrayRef ArgRegs = CC.intArgRegs(); + const ArrayRef ArgRegs = Subtarget.getABI().GetVarArgRegs(); unsigned Idx = State.getFirstUnallocated(ArgRegs.data(), ArgRegs.size()); unsigned RegSizeInBytes = Subtarget.getGPRSizeInBytes(); MVT RegTy = MVT::getIntegerVT(RegSizeInBytes * 8);