Index: lib/Target/ARM/ARMInstrThumb2.td
===================================================================
--- lib/Target/ARM/ARMInstrThumb2.td
+++ lib/Target/ARM/ARMInstrThumb2.td
@@ -3761,7 +3761,8 @@
 
 class T2SRS<bits<2> Op, bit W, dag oops, dag iops, InstrItinClass itin,
             string opc, string asm, list<dag> pattern>
-  : T2I<oops, iops, itin, opc, asm, pattern> {
+  : T2I<oops, iops, itin, opc, asm, pattern>,
+    Requires<[IsThumb2,IsNotMClass]> {
   bits<5> mode;
   let Inst{31-25} = 0b1110100;
   let Inst{24-23} = Op;
@@ -3792,7 +3793,8 @@
 // Return From Exception is a system instruction.
 class T2RFE<bits<12> op31_20, dag oops, dag iops, InstrItinClass itin,
           string opc, string asm, list<dag> pattern>
-  : T2I<oops, iops, itin, opc, asm, pattern> {
+  : T2I<oops, iops, itin, opc, asm, pattern>,
+    Requires<[IsThumb2,IsNotMClass]> {
   let Inst{31-20} = op31_20{11-0};
 
   bits<4> Rn;
@@ -3819,7 +3821,7 @@
 def t2SUBS_PC_LR : T2I <(outs), (ins imm0_255:$imm), NoItinerary,
                         "subs", "\tpc, lr, $imm",
                         [(ARMintretflag imm0_255:$imm)]>,
-                   Requires<[IsThumb2]> {
+                   Requires<[IsThumb2,IsNotMClass]> {
   let Inst{31-8} = 0b111100111101111010001111;
 
   bits<8> imm;
Index: test/MC/ARM/thumb2-exception-return-mclass.s
===================================================================
--- /dev/null
+++ test/MC/ARM/thumb2-exception-return-mclass.s
@@ -0,0 +1,15 @@
+# RUN: not llvm-mc -triple thumbv7m -assemble < %s 2>&1 | FileCheck %s
+
+  .text
+
+# CHECK: instruction requires: !armv*m
+# CHECK-NEXT: srsdb sp, #7
+  srsdb sp, #7
+
+# CHECK: instruction requires: !armv*m
+# CHECK-NEXT: rfeia r6
+  rfeia r6
+
+# CHECK: instruction requires: !armv*m
+# CHECK-NEXT: subs pc, lr, #42
+  subs pc, lr, #42