Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/2007-09-08-unaligned.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/2007-09-08-unaligned.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/2007-09-08-unaligned.ll @@ -1,7 +1,11 @@ -; RUN: llc < %s | grep stfd | count 3 -; RUN: llc < %s | grep stfs | count 1 -; RUN: llc < %s | grep lfd | count 2 -; RUN: llc < %s | grep lfs | count 2 +; RUN: llc -mattr=-vsx < %s | grep stfd | count 3 +; RUN: llc -mattr=-vsx < %s | grep stfs | count 1 +; RUN: llc -mattr=-vsx < %s | grep lfd | count 2 +; RUN: llc -mattr=-vsx < %s | grep lfs | count 2 +; RUN: llc -mattr=+vsx < %s | grep stxsdx | count 3 +; RUN: llc -mattr=+vsx < %s | grep stfs | count 1 +; RUN: llc -mattr=+vsx < %s | grep lxsdx | count 2 +; RUN: llc -mattr=+vsx < %s | grep lfs | count 2 ; ModuleID = 'foo.c' target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" target triple = "powerpc-apple-darwin8" Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/2012-10-12-bitcast.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/2012-10-12-bitcast.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/2012-10-12-bitcast.ll @@ -1,4 +1,5 @@ -; RUN: llc -mattr=+altivec < %s | FileCheck %s +; RUN: llc -mattr=-vsx -mattr=+altivec < %s | FileCheck %s +; RUN: llc -mattr=+vsx -mattr=+altivec < %s | FileCheck -check-prefix=CHECK-VSX %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -18,3 +19,7 @@ ; CHECK: lwz 3, -16(1) ; CHECK: blr +; CHECK-VSX: addi [[REGISTER:[0-9]+]], 1, -16 +; CHECK-VSX: stxvd2x 34, 0, [[REGISTER]] +; CHECK-VSX: lwz 3, -16(1) +; CHECK-VSX: blr Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/buildvec_canonicalize.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/buildvec_canonicalize.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/buildvec_canonicalize.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math | FileCheck %s +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math | FileCheck %s +; RUN: llc < %s -mattr=+vsx -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math | FileCheck -check-prefix=CHECK-VSX %s define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) { %tmp = load <4 x float>* %P3 ; <<4 x float>> [#uses=1] @@ -14,6 +15,9 @@ ; CHECK: @VXOR ; CHECK: vsplti ; CHECK: vxor +; CHECK-VSX: @VXOR +; CHECK-VSX: vxor +; CHECK-VSX: xvmulsp define void @VSPLTI(<4 x i32>* %P2, <8 x i16>* %P3) { store <4 x i32> bitcast (<16 x i8> < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 > to <4 x i32>), <4 x i32>* %P2 @@ -22,3 +26,5 @@ } ; CHECK: @VSPLTI ; CHECK: vsplti +; CHECK-VSX: @VSPLTI +; CHECK-VSX: vsplti Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/copysignl.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/copysignl.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/copysignl.ll @@ -1,4 +1,5 @@ -; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s +; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=-vsx < %s | FileCheck %s +; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx < %s | FileCheck %s -check-prefix=CHECK-VSX target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -11,6 +12,9 @@ ; CHECK-LABEL: @foo_d_ll ; CHECK: fcpsgn 1, 3, 1 ; CHECK: blr +; CHECK-VSX-LABEL: @foo_d_ll +; CHECK-VSX: xscpsgndp 1, 3, 1 +; CHECK-VSX: blr } declare ppc_fp128 @copysignl(ppc_fp128, ppc_fp128) #0 @@ -24,6 +28,9 @@ ; CHECK-LABEL: @foo_dl ; CHECK: fcpsgn 1, 2, 1 ; CHECK: blr +; CHECK-VSX-LABEL: @foo_dl +; CHECK-VSX: xscpsgndp 1, 2, 1 +; CHECK-VSX: blr } declare double @copysign(double, double) #0 @@ -37,6 +44,9 @@ ; CHECK-LABEL: @foo_ll ; CHECK: bl copysignl ; CHECK: blr +; CHECK-VSX-LABEL: @foo_ll +; CHECK-VSX: bl copysignl +; CHECK-VSX: blr } define ppc_fp128 @foo_ld(double %a, double %b) #0 { @@ -49,6 +59,9 @@ ; CHECK-LABEL: @foo_ld ; CHECK: bl copysignl ; CHECK: blr +; CHECK-VSX-LABEL: @foo_ld +; CHECK-VSX: bl copysignl +; CHECK-VSX: blr } define ppc_fp128 @foo_lf(double %a, float %b) #0 { @@ -61,6 +74,9 @@ ; CHECK-LABEL: @foo_lf ; CHECK: bl copysignl ; CHECK: blr +; CHECK-VSX-LABEL: @foo_lf +; CHECK-VSX: bl copysignl +; CHECK-VSX: blr } attributes #0 = { nounwind readnone } Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fabs.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fabs.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fabs.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin | grep "fabs f1, f1" +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin | grep "fabs f1, f1" +; RUN: llc < %s -mattr=+vsx -march=ppc32 -mtriple=powerpc-apple-darwin | grep "xsabsdp f1, f1" define double @fabs(double %f) { entry: Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fcpsgn.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fcpsgn.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fcpsgn.ll @@ -1,4 +1,5 @@ -; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s +; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx < %s | FileCheck %s +; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -10,6 +11,9 @@ ; CHECK-LABEL: @foo_dd ; CHECK: fcpsgn 1, 2, 1 ; CHECK: blr +; CHECK-VSX-LABEL: @foo_dd +; CHECK-VSX: xscpsgndp 1, 2, 1 +; CHECK-VSX: blr } declare double @copysign(double, double) #0 @@ -22,6 +26,9 @@ ; CHECK-LABEL: @foo_ss ; CHECK: fcpsgn 1, 2, 1 ; CHECK: blr +; CHECK-VSX-LABEL: @foo_ss +; CHECK-VSX: fcpsgn 1, 2, 1 +; CHECK-VSX: blr } declare float @copysignf(float, float) #0 @@ -35,6 +42,9 @@ ; CHECK-LABEL: @foo_sd ; CHECK: fcpsgn 1, 2, 1 ; CHECK: blr +; CHECK-VSX-LABEL: @foo_sd +; CHECK-VSX: fcpsgn 1, 2, 1 +; CHECK-VSX: blr } define double @foo_ds(double %a, float %b) #0 { @@ -46,6 +56,9 @@ ; CHECK-LABEL: @foo_ds ; CHECK: fcpsgn 1, 2, 1 ; CHECK: blr +; CHECK-VSX-LABEL: @foo_ds +; CHECK-VSX: fcpsgn 1, 2, 1 +; CHECK-VSX: blr } attributes #0 = { nounwind readnone } Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fnabs.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fnabs.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fnabs.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=ppc32 | grep fnabs +; RUN: llc < %s -mattr=-vsx -march=ppc32 | grep fnabs +; RUN: llc < %s -mattr=+vsx -march=ppc32 | grep xsnabsdp declare double @fabs(double) Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fp-branch.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fp-branch.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fp-branch.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=ppc32 | grep fcmp | count 1 +; RUN: llc < %s -mattr=-vsx -march=ppc32 | grep fcmp | count 1 +; RUN: llc < %s -mattr=+vsx -march=ppc32 | grep xscmpudp | count 1 declare i1 @llvm.isunordered.f64(double, double) Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fp_to_uint.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fp_to_uint.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fp_to_uint.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=ppc32 | grep fctiwz | count 1 +; RUN: llc < %s -mattr=-vsx -march=ppc32 | grep fctiwz | count 1 +; RUN: llc < %s -mattr=+vsx -march=ppc32 | grep xscvdpsxws | count 1 + define i16 @foo(float %a) { entry: Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fsel.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fsel.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fsel.ll @@ -1,5 +1,6 @@ -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-no-infs-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=CHECK-FM %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-no-infs-fp-math -enable-no-nans-fp-math -mattr=-vsx | FileCheck -check-prefix=CHECK-FM %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-no-infs-fp-math -enable-no-nans-fp-math -mattr=+vsx | FileCheck -check-prefix=CHECK-FM-VSX %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -16,6 +17,10 @@ ; CHECK-FM: @zerocmp1 ; CHECK-FM: fsel 1, 1, 2, 3 ; CHECK-FM: blr + +; CHECK-FM-VSX: @zerocmp1 +; CHECK-FM-VSX: fsel 1, 1, 2, 3 +; CHECK-FM-VSX: blr } define double @zerocmp2(double %a, double %y, double %z) #0 { @@ -32,6 +37,11 @@ ; CHECK-FM: fneg [[REG:[0-9]+]], 1 ; CHECK-FM: fsel 1, [[REG]], 3, 2 ; CHECK-FM: blr + +; CHECK-FM-VSX: @zerocmp2 +; CHECK-FM-VSX: xsnegdp [[REG:[0-9]+]], 1 +; CHECK-FM-VSX: fsel 1, [[REG]], 3, 2 +; CHECK-FM-VSX: blr } define double @zerocmp3(double %a, double %y, double %z) #0 { @@ -49,6 +59,12 @@ ; CHECK-FM: fneg [[REG2:[0-9]+]], 1 ; CHECK-FM: fsel 1, [[REG2]], [[REG]], 3 ; CHECK-FM: blr + +; CHECK-FM-VSX: @zerocmp3 +; CHECK-FM-VSX: xsnegdp [[REG2:[0-9]+]], 1 +; CHECK-FM-VSX: fsel [[REG:[0-9]+]], 1, 2, 3 +; CHECK-FM-VSX: fsel 1, [[REG2]], [[REG]], 3 +; CHECK-FM-VSX: blr } define double @min1(double %a, double %b) #0 { @@ -65,6 +81,11 @@ ; CHECK-FM: fsub [[REG:[0-9]+]], 2, 1 ; CHECK-FM: fsel 1, [[REG]], 1, 2 ; CHECK-FM: blr + +; CHECK-FM-VSX: @min1 +; CHECK-FM-VSX: xssubdp [[REG:[0-9]+]], 2, 1 +; CHECK-FM-VSX: fsel 1, [[REG]], 1, 2 +; CHECK-FM-VSX: blr } define double @max1(double %a, double %b) #0 { @@ -81,6 +102,11 @@ ; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2 ; CHECK-FM: fsel 1, [[REG]], 1, 2 ; CHECK-FM: blr + +; CHECK-FM-VSX: @max1 +; CHECK-FM-VSX: xssubdp [[REG:[0-9]+]], 1, 2 +; CHECK-FM-VSX: fsel 1, [[REG]], 1, 2 +; CHECK-FM-VSX: blr } define double @cmp1(double %a, double %b, double %y, double %z) #0 { @@ -97,6 +123,11 @@ ; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2 ; CHECK-FM: fsel 1, [[REG]], 3, 4 ; CHECK-FM: blr + +; CHECK-FM-VSX: @cmp1 +; CHECK-FM-VSX: xssubdp [[REG:[0-9]+]], 1, 2 +; CHECK-FM-VSX: fsel 1, [[REG]], 3, 4 +; CHECK-FM-VSX: blr } define double @cmp2(double %a, double %b, double %y, double %z) #0 { @@ -113,6 +144,11 @@ ; CHECK-FM: fsub [[REG:[0-9]+]], 2, 1 ; CHECK-FM: fsel 1, [[REG]], 4, 3 ; CHECK-FM: blr + +; CHECK-FM-VSX: @cmp2 +; CHECK-FM-VSX: xssubdp [[REG:[0-9]+]], 2, 1 +; CHECK-FM-VSX: fsel 1, [[REG]], 4, 3 +; CHECK-FM-VSX: blr } define double @cmp3(double %a, double %b, double %y, double %z) #0 { @@ -131,6 +167,13 @@ ; CHECK-FM: fneg [[REG3:[0-9]+]], [[REG]] ; CHECK-FM: fsel 1, [[REG3]], [[REG2]], 4 ; CHECK-FM: blr + +; CHECK-FM-VSX: @cmp3 +; CHECK-FM-VSX: xssubdp [[REG:[0-9]+]], 1, 2 +; CHECK-FM-VSX: xsnegdp [[REG3:[0-9]+]], [[REG]] +; CHECK-FM-VSX: fsel [[REG2:[0-9]+]], [[REG]], 3, 4 +; CHECK-FM-VSX: fsel 1, [[REG3]], [[REG2]], 4 +; CHECK-FM-VSX: blr } attributes #0 = { nounwind readnone } Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fsqrt.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fsqrt.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fsqrt.ll @@ -1,13 +1,13 @@ ; fsqrt should be generated when the fsqrt feature is enabled, but not ; otherwise. -; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=+fsqrt | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=+fsqrt | \ ; RUN: grep "fsqrt f1, f1" -; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \ ; RUN: grep "fsqrt f1, f1" -; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-fsqrt | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-fsqrt | \ ; RUN: not grep "fsqrt f1, f1" -; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g4 | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g4 | \ ; RUN: not grep "fsqrt f1, f1" declare double @llvm.sqrt.f64(double) Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/i64_fp.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/i64_fp.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/i64_fp.ll @@ -1,22 +1,26 @@ ; fcfid and fctid should be generated when the 64bit feature is enabled, but not ; otherwise. -; RUN: llc < %s -march=ppc32 -mattr=+64bit | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+64bit | \ ; RUN: grep fcfid -; RUN: llc < %s -march=ppc32 -mattr=+64bit | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+64bit | \ ; RUN: grep fctidz -; RUN: llc < %s -march=ppc32 -mcpu=g5 | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g5 | \ ; RUN: grep fcfid -; RUN: llc < %s -march=ppc32 -mcpu=g5 | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g5 | \ ; RUN: grep fctidz -; RUN: llc < %s -march=ppc32 -mattr=-64bit | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=-64bit | \ ; RUN: not grep fcfid -; RUN: llc < %s -march=ppc32 -mattr=-64bit | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=-64bit | \ ; RUN: not grep fctidz -; RUN: llc < %s -march=ppc32 -mcpu=g4 | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g4 | \ ; RUN: not grep fcfid -; RUN: llc < %s -march=ppc32 -mcpu=g4 | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g4 | \ ; RUN: not grep fctidz +; RUN: llc < %s -mattr=+vsx -march=ppc32 -mattr=+64bit | \ +; RUN: grep xscvdpsxds +; RUN: llc < %s -mattr=+vsx -march=ppc32 -mattr=+64bit | \ +; RUN: grep xscvsxddp define double @X(double %Y) { %A = fptosi double %Y to i64 ; [#uses=1] Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/mcm-12.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/mcm-12.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/mcm-12.ll @@ -1,4 +1,5 @@ -; RUN: llc -mcpu=pwr7 -O1 -code-model=medium <%s | FileCheck %s +; RUN: llc -mcpu=pwr7 -O1 -code-model=medium -mattr=-vsx < %s | FileCheck %s +; RUN: llc -mcpu=pwr7 -O1 -code-model=medium -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s ; Test peephole optimization for medium code model (32-bit TOC offsets) ; for loading a value from the constant pool (TOC-relative). @@ -16,3 +17,10 @@ ; CHECK-LABEL: test_double_const: ; CHECK: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha ; CHECK: lfd {{[0-9]+}}, [[VAR]]@toc@l([[REG1]]) + +; CHECK-VSX: [[VAR:[a-z0-9A-Z_.]+]]: +; CHECK-VSX: .quad 4562098671269285104 +; CHECK-VSX-LABEL: test_double_const: +; CHECK-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha +; CHECK-VSX: addi [[REG1]], {{[0-9]+}}, [[VAR]]@toc@l +; CHECK-VSX: lxsdx {{[0-9]+}}, 0, [[REG1]] Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/mcm-4.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/mcm-4.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/mcm-4.ll @@ -1,5 +1,7 @@ -; RUN: llc -mcpu=pwr7 -O0 -code-model=medium -fast-isel=false <%s | FileCheck -check-prefix=MEDIUM %s -; RUN: llc -mcpu=pwr7 -O0 -code-model=large -fast-isel=false <%s | FileCheck -check-prefix=LARGE %s +; RUN: llc -mcpu=pwr7 -O0 -code-model=medium -fast-isel=false -mattr=-vsx <%s | FileCheck -check-prefix=MEDIUM %s +; RUN: llc -mcpu=pwr7 -O0 -code-model=medium -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=MEDIUM-VSX %s +; RUN: llc -mcpu=pwr7 -O0 -code-model=large -fast-isel=false -mattr=-vsx <%s | FileCheck -check-prefix=LARGE %s +; RUN: llc -mcpu=pwr7 -O0 -code-model=large -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=LARGE-VSX %s ; Test correct code generation for medium and large code model ; for loading a value from the constant pool (TOC-relative). @@ -19,9 +21,23 @@ ; MEDIUM: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l ; MEDIUM: lfd {{[0-9]+}}, 0([[REG2]]) +; MEDIUM-VSX: [[VAR:[a-z0-9A-Z_.]+]]: +; MEDIUM-VSX: .quad 4562098671269285104 +; MEDIUM-VSX-LABEL: test_double_const: +; MEDIUM-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha +; MEDIUM-VSX: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l +; MEDIUM-VSX: lxsdx {{[0-9]+}}, 0, [[REG2]] + ; LARGE: [[VAR:[a-z0-9A-Z_.]+]]: ; LARGE: .quad 4562098671269285104 ; LARGE-LABEL: test_double_const: ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha ; LARGE: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]]) ; LARGE: lfd {{[0-9]+}}, 0([[REG2]]) + +; LARGE-VSX: [[VAR:[a-z0-9A-Z_.]+]]: +; LARGE-VSX: .quad 4562098671269285104 +; LARGE-VSX-LABEL: test_double_const: +; LARGE-VSX: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha +; LARGE-VSX: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]]) +; LARGE-VSX: lxsdx {{[0-9]+}}, 0, [[REG2]] Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/ppc64-align-long-double.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/ppc64-align-long-double.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/ppc64-align-long-double.ll @@ -1,4 +1,5 @@ -; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false < %s | FileCheck %s +; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false -mattr=-vsx < %s | FileCheck %s +; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s ; Verify internal alignment of long double in a struct. The double ; argument comes in in GPR3; GPR4 is skipped; GPRs 5 and 6 contain @@ -24,3 +25,12 @@ ; CHECK: lfd 1, 64(1) ; CHECK: lfd 2, 72(1) +; CHECK-VSX: std 6, 72(1) +; CHECK-VSX: std 5, 64(1) +; CHECK-VSX: std 4, 56(1) +; CHECK-VSX: std 3, 48(1) +; CHECK-VSX: li 3, 16 +; CHECK-VSX: addi 4, 1, 48 +; CHECK-VSX: lxsdx 1, 4, 3 +; CHECK-VSX: li 3, 24 +; CHECK-VSX: lxsdx 2, 4, 3 Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/rounding-ops.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/rounding-ops.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/rounding-ops.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx < %s | FileCheck %s +; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -8,6 +9,8 @@ ; CHECK-LABEL: test1: ; CHECK: frim 1, 1 +; CHECK-VSX-LABEL: test1: +; CHECK-VSX: frim 1, 1 } declare float @floorf(float) nounwind readnone @@ -18,6 +21,8 @@ ; CHECK-LABEL: test2: ; CHECK: frim 1, 1 +; CHECK-VSX-LABEL: test2: +; CHECK-VSX: xsrdpim 1, 1 } declare double @floor(double) nounwind readnone @@ -28,6 +33,8 @@ ; CHECK-LABEL: test3: ; CHECK: frin 1, 1 +; CHECK-VSX-LABEL: test3: +; CHECK-VSX: frin 1, 1 } declare float @roundf(float) nounwind readnone @@ -38,6 +45,8 @@ ; CHECK-LABEL: test4: ; CHECK: frin 1, 1 +; CHECK-VSX-LABEL: test4: +; CHECK-VSX: xsrdpi 1, 1 } declare double @round(double) nounwind readnone @@ -48,6 +57,8 @@ ; CHECK-LABEL: test5: ; CHECK: frip 1, 1 +; CHECK-VSX-LABEL: test5: +; CHECK-VSX: frip 1, 1 } declare float @ceilf(float) nounwind readnone @@ -58,6 +69,8 @@ ; CHECK-LABEL: test6: ; CHECK: frip 1, 1 +; CHECK-VSX-LABEL: test6: +; CHECK-VSX: xsrdpip 1, 1 } declare double @ceil(double) nounwind readnone @@ -68,6 +81,8 @@ ; CHECK-LABEL: test9: ; CHECK: friz 1, 1 +; CHECK-VSX-LABEL: test9: +; CHECK-VSX: friz 1, 1 } declare float @truncf(float) nounwind readnone @@ -78,6 +93,8 @@ ; CHECK-LABEL: test10: ; CHECK: friz 1, 1 +; CHECK-VSX-LABEL: test10: +; CHECK-VSX: xsrdpiz 1, 1 } declare double @trunc(double) nounwind readnone Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/unaligned.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/unaligned.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/unaligned.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32" +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32" define void @foo1(i16* %p, i16* %r) nounwind { @@ -10,6 +12,10 @@ ; CHECK: @foo1 ; CHECK: lhz ; CHECK: sth + +; CHECK-VSX: @foo1 +; CHECK-VSX: lhz +; CHECK-VSX: sth } define void @foo2(i32* %p, i32* %r) nounwind { @@ -21,6 +27,10 @@ ; CHECK: @foo2 ; CHECK: lwz ; CHECK: stw + +; CHECK-VSX: @foo2 +; CHECK-VSX: lwz +; CHECK-VSX: stw } define void @foo3(i64* %p, i64* %r) nounwind { @@ -32,6 +42,10 @@ ; CHECK: @foo3 ; CHECK: ld ; CHECK: std + +; CHECK-VSX: @foo3 +; CHECK-VSX: ld +; CHECK-VSX: std } define void @foo4(float* %p, float* %r) nounwind { @@ -43,6 +57,10 @@ ; CHECK: @foo4 ; CHECK: lfs ; CHECK: stfs + +; CHECK-VSX: @foo4 +; CHECK-VSX: lfs +; CHECK-VSX: stfs } define void @foo5(double* %p, double* %r) nounwind { @@ -54,6 +72,10 @@ ; CHECK: @foo5 ; CHECK: lfd ; CHECK: stfd + +; CHECK-VSX: @foo5 +; CHECK-VSX: lxsdx +; CHECK-VSX: stxsdx } define void @foo6(<4 x float>* %p, <4 x float>* %r) nounwind { @@ -69,5 +91,11 @@ ; CHECK-DAG: ld ; CHECK-DAG: stdx ; CHECK: stdx + +; CHECK-VSX: @foo6 +; CHECK-VSX-DAG: ld +; CHECK-VSX-DAG: ld +; CHECK-VSX-DAG: stdx +; CHECK-VSX: stdx } Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/unsafe-math.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/unsafe-math.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/unsafe-math.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -march=ppc32 | grep fmul | count 2 -; RUN: llc < %s -march=ppc32 -enable-unsafe-fp-math | \ +; RUN: llc < %s -mattr=-vsx -march=ppc32 | grep fmul | count 2 +; RUN: llc < %s -mattr=-vsx -march=ppc32 -enable-unsafe-fp-math | \ ; RUN: grep fmul | count 1 +; RUN: llc < %s -mattr=+vsx -march=ppc32 | grep xsmuldp | count 2 +; RUN: llc < %s -mattr=+vsx -march=ppc32 -enable-unsafe-fp-math | \ +; RUN: grep xsmuldp | count 1 define double @foo(double %X) nounwind { %tmp1 = fmul double %X, 1.23 Index: /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/vec_mul.ll =================================================================== --- /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/vec_mul.ll +++ /home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/vec_mul.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -march=ppc32 -mattr=+altivec | FileCheck %s -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -march=ppc64 -mattr=+altivec | FileCheck %s -; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec | FileCheck %s -check-prefix=CHECK-LE +; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -march=ppc32 -mattr=+altivec -mattr=-vsx | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=-vsx | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=-vsx | FileCheck %s -check-prefix=CHECK-LE +; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -march=ppc32 -mattr=+altivec -mattr=+vsx | FileCheck %s -check-prefix=CHECK-VSX +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=+vsx | FileCheck %s -check-prefix=CHECK-VSX +; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=+vsx | FileCheck %s -check-prefix=CHECK-LE-VSX define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) { %tmp = load <4 x i32>* %X ; <<4 x i32>> [#uses=1] @@ -14,6 +17,12 @@ ; CHECK-LE-LABEL: test_v4i32: ; CHECK-LE: vmsumuhm ; CHECK-LE-NOT: mullw +; CHECK-VSX-LABEL: test_v4i32: +; CHECK-VSX: vmsumuhm +; CHECK-VSX-NOT: mullw +; CHECK-LE-VSX-LABEL: test_v4i32: +; CHECK-LE-VSX: vmsumuhm +; CHECK-LE-VSX-NOT: mullw define <8 x i16> @test_v8i16(<8 x i16>* %X, <8 x i16>* %Y) { %tmp = load <8 x i16>* %X ; <<8 x i16>> [#uses=1] @@ -27,6 +36,12 @@ ; CHECK-LE-LABEL: test_v8i16: ; CHECK-LE: vmladduhm ; CHECK-LE-NOT: mullw +; CHECK-VSX-LABEL: test_v8i16: +; CHECK-VSX: vmladduhm +; CHECK-VSX-NOT: mullw +; CHECK-LE-VSX-LABEL: test_v8i16: +; CHECK-LE-VSX: vmladduhm +; CHECK-LE-VSX-NOT: mullw define <16 x i8> @test_v16i8(<16 x i8>* %X, <16 x i8>* %Y) { %tmp = load <16 x i8>* %X ; <<16 x i8>> [#uses=1] @@ -43,6 +58,15 @@ ; CHECK-LE: vmuleub [[REG2:[0-9]+]] ; CHECK-LE: vperm {{[0-9]+}}, [[REG2]], [[REG1]] ; CHECK-LE-NOT: mullw +; CHECK-VSX-LABEL: test_v16i8: +; CHECK-VSX: vmuloub +; CHECK-VSX: vmuleub +; CHECK-VSX-NOT: mullw +; CHECK-LE-VSX-LABEL: test_v16i8: +; CHECK-LE-VSX: vmuloub [[REG1:[0-9]+]] +; CHECK-LE-VSX: vmuleub [[REG2:[0-9]+]] +; CHECK-LE-VSX: vperm {{[0-9]+}}, [[REG2]], [[REG1]] +; CHECK-LE-VSX-NOT: mullw define <4 x float> @test_float(<4 x float>* %X, <4 x float>* %Y) { %tmp = load <4 x float>* %X @@ -61,3 +85,7 @@ ; CHECK-LE: vspltisw [[ZNEG:[0-9]+]], -1 ; CHECK-LE: vslw {{[0-9]+}}, [[ZNEG]], [[ZNEG]] ; CHECK-LE: vmaddfp +; CHECK-VSX-LABEL: test_float: +; CHECK-VSX: xvmulsp +; CHECK-LE-VSX-LABEL: test_float: +; CHECK-LE-VSX: xvmulsp \ No newline at end of file