Index: lib/Target/RISCV/RISCVInstrInfo.td
===================================================================
--- lib/Target/RISCV/RISCVInstrInfo.td
+++ lib/Target/RISCV/RISCVInstrInfo.td
@@ -81,7 +81,7 @@
 def fencearg : Operand<XLenVT> {
   let ParserMatchClass = FenceArg;
   let PrintMethod = "printFenceArg";
-  let DecoderMethod = "decodeUImmOperand<4>";
+  let DecoderMethod = "decodeUImmNonZeroOperand<4>";
 }
 
 def UImmLog2XLenAsmOperand : AsmOperandClass {
Index: test/MC/Disassembler/RISCV/invalid-fence-field.txt
===================================================================
--- /dev/null
+++ test/MC/Disassembler/RISCV/invalid-fence-field.txt
@@ -0,0 +1,9 @@
+# RUN: not llvm-mc -disassemble -triple=riscv32 -mattr=+f,+d < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -disassemble -triple=riscv64 -mattr=+f,+d < %s 2>&1 | FileCheck %s
+#
+# Test generated by a LLVM MC Disassembler Protocol Buffer Fuzzer
+# for the RISC-V assembly language.
+
+# This decodes as fence , iorw with invalid fence field as 0.
+[0x0f 0x00 0xf0 0x00]
+# CHECK: warning: invalid instruction encoding