Index: lib/Target/Mips/MicroMipsInstrInfo.td =================================================================== --- lib/Target/Mips/MicroMipsInstrInfo.td +++ lib/Target/Mips/MicroMipsInstrInfo.td @@ -128,6 +128,15 @@ let Defs = [RA]; } +// 16-bit Jump and Link (Call) - Compact, no delay slot +class JumpLinkRegCMM16 : + MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"), + [], IIBranch, FrmR> { + let isCall = 1; + let hasDelaySlot = 0; + let Defs = [RA]; +} + // MicroMIPS Jump and Link (Call) - Short Delay Slot let isCall = 1, hasDelaySlot = 1, Defs = [RA] in { class JumpLinkMM : @@ -151,6 +160,7 @@ def MOVE16_MM : MoveMM16<"move", GPR32Opnd>, MOVE_FM_MM16<0x03>; def JALR16_MM : JumpLinkRegMM16<"jalr", GPR32Opnd>, JALR_FM_MM16<0x0e>; def JALRS16_MM : JumpLinkRegSMM16<"jalrs16", GPR32Opnd>, JALR_FM_MM16<0x0f>; +def JRC16_MM : JumpLinkRegCMM16<"jrc", GPR32Opnd>, JALR_FM_MM16<0x0d>; def JRADDIUSP : JumpRAddiuStackMM16, JRADDIUSP_FM_MM16<0x18>; class WaitMM : Index: test/MC/Mips/micromips-16-bit-instructions.s =================================================================== --- test/MC/Mips/micromips-16-bit-instructions.s +++ test/MC/Mips/micromips-16-bit-instructions.s @@ -12,6 +12,7 @@ # CHECK-EL: mfhi $9 # encoding: [0x09,0x46] # CHECK-EL: mflo $9 # encoding: [0x49,0x46] # CHECK-EL: move $25, $1 # encoding: [0x21,0x0f] +# CHECK-EL: jrc $9 # encoding: [0xa9,0x45] # CHECK-EL: jalr $9 # encoding: [0xc9,0x45] # CHECK-EL: jraddiusp 20 # encoding: [0x05,0x47] # CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00] @@ -23,6 +24,7 @@ # CHECK-EB: mfhi $9 # encoding: [0x46,0x09] # CHECK-EB: mflo $9 # encoding: [0x46,0x49] # CHECK-EB: move $25, $1 # encoding: [0x0f,0x21] +# CHECK-EB: jrc $9 # encoding: [0x45,0xa9] # CHECK-EB: jalr $9 # encoding: [0x45,0xc9] # CHECK-EB: jraddiusp 20 # encoding: [0x47,0x05] # CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00] @@ -32,6 +34,7 @@ mfhi $9 mflo $9 move $25, $1 + jrc $9 jalr $9 jraddiusp 20 jalrs16 $9