Index: llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
+++ llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
@@ -181,31 +181,37 @@
 
 static bool isORCopyInst(const MachineInstr &MI) {
   switch (MI.getOpcode()) {
+  default:
+    break;
   case Mips::OR_MM:
   case Mips::OR:
     if (MI.getOperand(2).getReg() == Mips::ZERO)
       return true;
+    break;
   case Mips::OR64:
     if (MI.getOperand(2).getReg() == Mips::ZERO_64)
       return true;
-  default:
-      return false;
+    break;
   }
+  return false;
 }
 
 /// If @MI is WRDSP/RRDSP instruction return true with @isWrite set to true
 /// if it is WRDSP instruction.
-static bool isReadOrWritToDSPReg(const MachineInstr &MI, bool &isWrite) {
+static bool isReadOrWriteToDSPReg(const MachineInstr &MI, bool &isWrite) {
   switch (MI.getOpcode()) {
-    case Mips::WRDSP:
-    case Mips::WRDSP_MM:
-      isWrite = true;
-    case Mips::RDDSP:
-    case Mips::RDDSP_MM:
-      return true;
-    default:
-     return false;
+  default:
+   return false;
+  case Mips::WRDSP:
+  case Mips::WRDSP_MM:
+    isWrite = true;
+    break;
+  case Mips::RDDSP:
+  case Mips::RDDSP_MM:
+    isWrite = false;
+    break;
   }
+  return true;
 }
 
 /// We check for the common case of 'or', as it's MIPS' preferred instruction
@@ -217,7 +223,7 @@
   bool isDSPControlWrite = false;
   // Condition is made to match the creation of WRDSP/RDDSP copy instruction
   // from copyPhysReg function.
-  if (isReadOrWritToDSPReg(MI, isDSPControlWrite)) {
+  if (isReadOrWriteToDSPReg(MI, isDSPControlWrite)) {
     if (!MI.getOperand(1).isImm() || MI.getOperand(1).getImm() != (1<<4))
       return false;
     else if (isDSPControlWrite) {