Index: Target/TargetMachine.cpp
===================================================================
--- Target/TargetMachine.cpp
+++ Target/TargetMachine.cpp
@@ -32,6 +32,11 @@
 // TargetMachine Class
 //
 
+static cl::opt<bool> ClAsanInstrumentAssembly(
+    "asan-instrument-assembly",
+    cl::desc("instrument assembly with AddressSanitizer checks"), cl::Hidden,
+    cl::init(false));
+
 TargetMachine::TargetMachine(const Target &T,
                              StringRef TT, StringRef CPU, StringRef FS,
                              const TargetOptions &Options)
@@ -68,7 +73,8 @@
   RESET_OPTION(UseSoftFloat, "use-soft-float");
   RESET_OPTION(DisableTailCalls, "disable-tail-calls");
 
-  TO.MCOptions.SanitizeAddress = F->hasFnAttribute(Attribute::SanitizeAddress);
+  TO.MCOptions.SanitizeAddress =
+      ClAsanInstrumentAssembly && F->hasFnAttribute(Attribute::SanitizeAddress);
 }
 
 /// getRelocationModel - Returns the code generation relocation model. The
Index: Target/X86/AsmParser/X86AsmInstrumentation.cpp
===================================================================
--- Target/X86/AsmParser/X86AsmInstrumentation.cpp
+++ Target/X86/AsmParser/X86AsmInstrumentation.cpp
@@ -27,11 +27,6 @@
 namespace llvm {
 namespace {
 
-static cl::opt<bool> ClAsanInstrumentAssembly(
-    "asan-instrument-assembly",
-    cl::desc("instrument assembly with AddressSanitizer checks"), cl::Hidden,
-    cl::init(false));
-
 bool IsStackReg(unsigned Reg) {
   return Reg == X86::RSP || Reg == X86::ESP || Reg == X86::SP;
 }
@@ -494,8 +489,7 @@
                             const MCContext &Ctx, const MCSubtargetInfo &STI) {
   Triple T(STI.getTargetTriple());
   const bool hasCompilerRTSupport = T.isOSLinux();
-  if (ClAsanInstrumentAssembly && hasCompilerRTSupport &&
-      MCOptions.SanitizeAddress) {
+  if (hasCompilerRTSupport && MCOptions.SanitizeAddress) {
     if ((STI.getFeatureBits() & X86::Mode32Bit) != 0)
       return new X86AddressSanitizer32(STI);
     if ((STI.getFeatureBits() & X86::Mode64Bit) != 0)