Index: lib/Target/X86/X86DomainReassignment.cpp
===================================================================
--- lib/Target/X86/X86DomainReassignment.cpp
+++ lib/Target/X86/X86DomainReassignment.cpp
@@ -78,6 +78,8 @@
     return &X86::VK32RegClass;
   if (SrcRC == &X86::GR64RegClass)
     return &X86::VK64RegClass;
+  if (SrcRC == &X86::GR64_with_sub_8bitRegClass)
+    return &X86::GR64_with_sub_8bitRegClass;
   llvm_unreachable("add register class");
   return nullptr;
 }
Index: test/CodeGen/X86/avx512-trunc-bitcast.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/avx512-trunc-bitcast.ll
@@ -0,0 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -O2 | FileCheck %s --check-prefix=AVX512
+
+define void @trunc_v64i8_bitcast_exti8(<64 x i8> %a0,i8* %a1) {
+; AVX512-LABEL: trunc_v64i8_bitcast_exti8:
+; AVX512:       # BB#0:
+; AVX512-NEXT:    vpsllw $7, %zmm0, %zmm0
+; AVX512-NEXT:    vpmovb2m %zmm0, %k0
+; AVX512-NEXT:    kmovb %k0, (%rdi)
+; AVX512-NEXT:    vzeroupper
+; AVX512-NEXT:    retq
+    %d0 = trunc <64 x i8> %a0 to <64 x i1>
+    %d1 = bitcast <64 x i1> %d0 to i64
+    %d2 = trunc i64 %d1 to i8
+    store i8 %d2, i8* %a1
+    ret void
+}