Index: lib/Target/AMDGPU/SIFixSGPRCopies.cpp
===================================================================
--- lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+++ lib/Target/AMDGPU/SIFixSGPRCopies.cpp
@@ -69,6 +69,7 @@
 #include "AMDGPUSubtarget.h"
 #include "SIInstrInfo.h"
 #include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/MachinePostDominators.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -85,6 +86,7 @@
 class SIFixSGPRCopies : public MachineFunctionPass {
 
   MachineDominatorTree *MDT;
+  MachinePostDominatorTree *PDT;
 
 public:
   static char ID;
@@ -383,8 +385,20 @@
           MachineBasicBlock *MBB0 = MI.getOperand(2).getMBB();
           MachineBasicBlock *MBB1 = MI.getOperand(4).getMBB();
 
+          MachineDomTreeNode *IDN = NULL;
+          MachineBasicBlock *PNCD = NULL;
           MachineBasicBlock *NCD = MDT->findNearestCommonDominator(MBB0, MBB1);
-          if (NCD && !hasTerminatorThatModifiesExec(*NCD, *TRI)) {
+          if (MBB0->predecessors().begin() != MBB0->predecessors().end() &&
+              MBB1->predecessors().begin() != MBB1->predecessors().end()) {
+            NCD = PDT->findNearestCommonDominator(MBB0, MBB1);
+            if (PNCD) {
+              MachineDomTreeNode *N = MDT->getNode(PNCD);
+              IDN = N->getIDom();
+            }
+          }
+
+          if (NCD && !hasTerminatorThatModifiesExec(*NCD, *TRI) &&
+            IDN && !hasTerminatorThatModifiesExec(*PNCD, *TRI)) {
             DEBUG(dbgs() << "Not fixing PHI for uniform branch: " << MI << '\n');
             break;
           }