Index: lib/Target/AMDGPU/AMDGPU.td =================================================================== --- lib/Target/AMDGPU/AMDGPU.td +++ lib/Target/AMDGPU/AMDGPU.td @@ -31,6 +31,18 @@ "Most fp64 instructions are half rate instead of quarter" >; +def SixteenthRate64Ops : SubtargetFeature<"sixteenth-rate-64-ops", + "SixteenthRate64Ops", + "true", + "Define 1/16 fp rate" +>; + +def EighthRate64Ops : SubtargetFeature<"eighth-rate-64-ops", + "EighthRate64Ops", + "true", + "Define 1/8 fp rate" +>; + def FeatureR600ALUInst : SubtargetFeature<"R600ALUInst", "R600ALUInst", "false", @@ -353,6 +365,7 @@ def FeatureISAVersion7_0_0 : SubtargetFeatureISAVersion <7,0,0, [FeatureSeaIslands, + SixteenthRate64Ops, FeatureLDSBankCount32]>; def FeatureISAVersion7_0_1 : SubtargetFeatureISAVersion <7,0,1, @@ -363,21 +376,31 @@ def FeatureISAVersion7_0_2 : SubtargetFeatureISAVersion <7,0,2, [FeatureSeaIslands, + EighthRate64Ops, + FeatureLDSBankCount32, + FeatureFastFMAF32]>; + +def FeatureISAVersion7_0_3 : SubtargetFeatureISAVersion <7,0,3, + [FeatureSeaIslands, + SixteenthRate64Ops, FeatureLDSBankCount16]>; def FeatureISAVersion8_0_0 : SubtargetFeatureISAVersion <8,0,0, [FeatureVolcanicIslands, FeatureLDSBankCount32, + SixteenthRate64Ops, FeatureSGPRInitBug]>; def FeatureISAVersion8_0_1 : SubtargetFeatureISAVersion <8,0,1, [FeatureVolcanicIslands, + HalfRate64Ops, FeatureLDSBankCount32, FeatureXNACK]>; def FeatureISAVersion8_0_2 : SubtargetFeatureISAVersion <8,0,2, [FeatureVolcanicIslands, FeatureLDSBankCount32, + SixteenthRate64Ops, FeatureSGPRInitBug]>; def FeatureISAVersion8_0_3 : SubtargetFeatureISAVersion <8,0,3, @@ -386,11 +409,13 @@ def FeatureISAVersion8_0_4 : SubtargetFeatureISAVersion <8,0,4, [FeatureVolcanicIslands, - FeatureLDSBankCount32]>; + FeatureLDSBankCount32, + SixteenthRate64Ops]>; def FeatureISAVersion8_1_0 : SubtargetFeatureISAVersion <8,1,0, [FeatureVolcanicIslands, FeatureLDSBankCount16, + SixteenthRate64Ops, FeatureXNACK]>; //===----------------------------------------------------------------------===// Index: lib/Target/AMDGPU/AMDGPUSubtarget.h =================================================================== --- lib/Target/AMDGPU/AMDGPUSubtarget.h +++ lib/Target/AMDGPU/AMDGPUSubtarget.h @@ -58,6 +58,7 @@ ISAVersion7_0_0, ISAVersion7_0_1, ISAVersion7_0_2, + ISAVersion7_0_3, ISAVersion8_0_0, ISAVersion8_0_1, ISAVersion8_0_2, @@ -79,6 +80,8 @@ // Possibly statically set by tablegen, but may want to be overridden. bool FastFMAF32; bool HalfRate64Ops; + bool SixteenthRate64Ops; + bool EighthRate64Ops; // Dynamially set bits that enable features. bool FP16Denormals; @@ -200,6 +203,14 @@ return HalfRate64Ops; } + bool hasSixteenthRate64Ops() const { + return SixteenthRate64Ops; + } + + bool hasEighthRate64Ops() const { + return EighthRate64Ops; + } + bool hasAddr64() const { return (getGeneration() < VOLCANIC_ISLANDS); } Index: lib/Target/AMDGPU/AMDGPUSubtarget.cpp =================================================================== --- lib/Target/AMDGPU/AMDGPUSubtarget.cpp +++ lib/Target/AMDGPU/AMDGPUSubtarget.cpp @@ -77,6 +77,8 @@ FastFMAF32(false), HalfRate64Ops(false), + SixteenthRate64Ops(false), + EighthRate64Ops(false), FP16Denormals(false), FP32Denormals(false), Index: lib/Target/AMDGPU/Processors.td =================================================================== --- lib/Target/AMDGPU/Processors.td +++ lib/Target/AMDGPU/Processors.td @@ -105,7 +105,7 @@ >; def : ProcessorModel<"kabini", SIQuarterSpeedModel, - [FeatureISAVersion7_0_2] + [FeatureISAVersion7_0_3] >; def : ProcessorModel<"kaveri", SIQuarterSpeedModel, @@ -117,7 +117,8 @@ >; def : ProcessorModel<"mullins", SIQuarterSpeedModel, - [FeatureISAVersion7_0_2]>; + [FeatureISAVersion7_0_3] +>; def : ProcessorModel<"gfx700", SIQuarterSpeedModel, [FeatureISAVersion7_0_0] @@ -131,6 +132,10 @@ [FeatureISAVersion7_0_2] >; +def : ProcessorModel<"gfx703", SIQuarterSpeedModel, + [FeatureISAVersion7_0_3] +>; + //===----------------------------------------------------------------------===// // Volcanic Islands //===----------------------------------------------------------------------===// Index: lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp =================================================================== --- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -90,6 +90,9 @@ if (Features.test(FeatureISAVersion7_0_2)) return {7, 0, 2}; + if (Features.test(FeatureISAVersion7_0_3)) + return {7, 0, 3}; + if (Features.test(FeatureISAVersion8_0_0)) return {8, 0, 0}; Index: test/CodeGen/AMDGPU/hsa-note-no-func.ll =================================================================== --- test/CodeGen/AMDGPU/hsa-note-no-func.ll +++ test/CodeGen/AMDGPU/hsa-note-no-func.ll @@ -1,6 +1,10 @@ ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx700 | FileCheck --check-prefix=HSA --check-prefix=HSA-CI700 %s ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx701 | FileCheck --check-prefix=HSA --check-prefix=HSA-CI701 %s ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx702 | FileCheck --check-prefix=HSA --check-prefix=HSA-CI702 %s +; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx703 | FileCheck --check-prefix=HSA --check-prefix=HSA-CI703 %s +; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=mullins | FileCheck --check-prefix=HSA --check-prefix=HSA-CI703 %s +; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=hawaii | FileCheck --check-prefix=HSA --check-prefix=HSA-CI701 %s +; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kabini | FileCheck --check-prefix=HSA --check-prefix=HSA-CI703 %s ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA --check-prefix=HSA-CI700 %s ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo | FileCheck --check-prefix=HSA --check-prefix=HSA-VI801 %s ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=tonga | FileCheck --check-prefix=HSA --check-prefix=HSA-VI802 %s @@ -18,6 +22,7 @@ ; HSA-CI700: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU" ; HSA-CI701: .hsa_code_object_isa 7,0,1,"AMD","AMDGPU" ; HSA-CI702: .hsa_code_object_isa 7,0,2,"AMD","AMDGPU" +; HSA-CI703: .hsa_code_object_isa 7,0,3,"AMD","AMDGPU" ; HSA-VI800: .hsa_code_object_isa 8,0,0,"AMD","AMDGPU" ; HSA-VI801: .hsa_code_object_isa 8,0,1,"AMD","AMDGPU" ; HSA-VI802: .hsa_code_object_isa 8,0,2,"AMD","AMDGPU"