Index: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
@@ -194,7 +194,7 @@
     return true;
 
   if (StopAfter) {
-    PM.add(createPrintMIRPass(errs()));
+    PM.add(createPrintMIRPass(Out));
     return false;
   }
 
Index: llvm/trunk/test/CodeGen/AArch64/branch-folder-merge-mmos.ll
===================================================================
--- llvm/trunk/test/CodeGen/AArch64/branch-folder-merge-mmos.ll
+++ llvm/trunk/test/CodeGen/AArch64/branch-folder-merge-mmos.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o /dev/null < %s 2>&1 | FileCheck %s
+; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o - < %s | FileCheck %s
 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
 
 ; Function Attrs: norecurse nounwind
Index: llvm/trunk/test/CodeGen/AArch64/stackmap-frame-setup.ll
===================================================================
--- llvm/trunk/test/CodeGen/AArch64/stackmap-frame-setup.ll
+++ llvm/trunk/test/CodeGen/AArch64/stackmap-frame-setup.ll
@@ -1,5 +1,5 @@
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -o - -verify-machineinstrs -mtriple=aarch64-apple-darwin -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
+; RUN: llc -o - -verify-machineinstrs -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
 
 define void @caller_meta_leaf() {
 entry:
Index: llvm/trunk/test/CodeGen/AMDGPU/detect-dead-lanes.mir
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/detect-dead-lanes.mir
+++ llvm/trunk/test/CodeGen/AMDGPU/detect-dead-lanes.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=amdgcn -run-pass detect-dead-lanes -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=amdgcn -run-pass detect-dead-lanes -o - %s | FileCheck %s
 --- |
   define void @test0() { ret void }
   define void @test1() { ret void }
Index: llvm/trunk/test/CodeGen/AMDGPU/indirect-addressing-undef.mir
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/indirect-addressing-undef.mir
+++ llvm/trunk/test/CodeGen/AMDGPU/indirect-addressing-undef.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-lower-control-flow -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-lower-control-flow -o - %s | FileCheck %s
 # Getting an undef that is specifically a VGPR is tricky from IR
 
 # CHECK-LABEL: name: extract_undef_offset_vgpr{{$}}
Index: llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs.mir
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs.mir
+++ llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=amdgcn -run-pass rename-independent-subregs -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=amdgcn -run-pass rename-independent-subregs -o - %s | FileCheck %s
 --- |
   define void @test0() { ret void }
 ...
Index: llvm/trunk/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
+++ llvm/trunk/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
@@ -1,4 +1,4 @@
-; RUN: llc -o /dev/null %s -march=amdgcn -mcpu=verde -verify-machineinstrs -stop-after expand-isel-pseudos 2>&1 | FileCheck %s
+; RUN: llc -o - %s -march=amdgcn -mcpu=verde -verify-machineinstrs -stop-after expand-isel-pseudos | FileCheck %s
 ; This test verifies that the instruction selection will add the implicit
 ; register operands in the correct order when modifying the opcode of an
 ; instruction to V_ADD_I32_e32.
Index: llvm/trunk/test/CodeGen/ARM/thumb1-ldst-opt.ll
===================================================================
--- llvm/trunk/test/CodeGen/ARM/thumb1-ldst-opt.ll
+++ llvm/trunk/test/CodeGen/ARM/thumb1-ldst-opt.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: llc -stop-after block-placement -o - %s | FileCheck %s
 
 target triple = "thumbv6m-none-none"
 
Index: llvm/trunk/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
+++ llvm/trunk/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the .cfi_def_cfa operands
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/AArch64/machine-dead-copy.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/machine-dead-copy.mir
+++ llvm/trunk/test/CodeGen/MIR/AArch64/machine-dead-copy.mir
@@ -1,5 +1,5 @@
 
-# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-cp  -verify-machineinstrs  -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-cp  -verify-machineinstrs  -o - %s | FileCheck %s
 
 --- |
   define i32 @copyprop1(i32 %a, i32 %b) { ret i32 %a }
Index: llvm/trunk/test/CodeGen/MIR/AArch64/machine-scheduler.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/machine-scheduler.mir
+++ llvm/trunk/test/CodeGen/MIR/AArch64/machine-scheduler.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-scheduler  -verify-machineinstrs  -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-scheduler  -verify-machineinstrs  -o - %s | FileCheck %s
 
 --- |
   define i64 @load_imp-def(i64* nocapture %P, i32 %v) {
Index: llvm/trunk/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser can parse multiple register machine
 # operands before '='.
 
Index: llvm/trunk/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
+++ llvm/trunk/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 
 --- |
   @var = global i64 0
Index: llvm/trunk/test/CodeGen/MIR/AArch64/target-flags.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/target-flags.mir
+++ llvm/trunk/test/CodeGen/MIR/AArch64/target-flags.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 
 --- |
 
Index: llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o - %s | FileCheck %s
 # This test verifies that the MIR parser can parse target index operands.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir
+++ llvm/trunk/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple thumbv7 -verify-machineinstrs -start-after machine-cp -stop-after if-converter %s -o /dev/null 2>&1 | FileCheck %s
+# RUN: llc -mtriple thumbv7 -verify-machineinstrs -start-after machine-cp -stop-after if-converter %s -o - | FileCheck %s
 --- |
   ; ModuleID = '/Volumes/Data/llvm/test/CodeGen/ARM/sched-it-debug-nodes.ll'
   target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
Index: llvm/trunk/test/CodeGen/MIR/ARM/bundled-instructions.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/bundled-instructions.mir
+++ llvm/trunk/test/CodeGen/MIR/ARM/bundled-instructions.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the bundled machine instructions
 # and 'internal' register flags correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/ARM/cfi-same-value.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/cfi-same-value.mir
+++ llvm/trunk/test/CodeGen/MIR/ARM/cfi-same-value.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 
 --- |
   declare void @dummy_use(i32*, i32)
Index: llvm/trunk/test/CodeGen/MIR/ARM/imm-peephole-arm.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/imm-peephole-arm.mir
+++ llvm/trunk/test/CodeGen/MIR/ARM/imm-peephole-arm.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass=peephole-opt %s -o /dev/null 2>&1 | FileCheck %s
+# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s
 
 # CHECK: [[IN:%.*]] = COPY %r0
 # CHECK: [[SUM1TMP:%.*]] = ADDri [[IN]], 133
Index: llvm/trunk/test/CodeGen/MIR/ARM/imm-peephole-thumb.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/imm-peephole-thumb.mir
+++ llvm/trunk/test/CodeGen/MIR/ARM/imm-peephole-thumb.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass=peephole-opt %s -o /dev/null 2>&1 | FileCheck %s
+# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s
 
 # CHECK: [[IN:%.*]] = COPY %r0
 # CHECK: [[SUM1TMP:%.*]] = t2ADDri [[IN]], 25600
Index: llvm/trunk/test/CodeGen/MIR/Generic/basic-blocks.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/basic-blocks.mir
+++ llvm/trunk/test/CodeGen/MIR/Generic/basic-blocks.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses machine functions correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/Generic/frame-info.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/frame-info.mir
+++ llvm/trunk/test/CodeGen/MIR/Generic/frame-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses machine frame info properties
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/Generic/llvmIR.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/llvmIR.mir
+++ llvm/trunk/test/CodeGen/MIR/Generic/llvmIR.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the LLVM IR that's embedded with MIR is parsed
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/Generic/llvmIRMissing.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/llvmIRMissing.mir
+++ llvm/trunk/test/CodeGen/MIR/Generic/llvmIRMissing.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 2>&1 | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s 2>&1 | FileCheck %s
 # This test ensures that the MIR parser accepts files without the LLVM IR.
 
 ---
Index: llvm/trunk/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir
+++ llvm/trunk/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 2>&1 | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s 2>&1 | FileCheck %s
 # This test ensures that the MIR parser preserves unnamed LLVM IR block
 # references.
 
Index: llvm/trunk/test/CodeGen/MIR/Generic/machine-function.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/machine-function.mir
+++ llvm/trunk/test/CodeGen/MIR/Generic/machine-function.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses machine functions correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/Generic/multiRunPass.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/multiRunPass.mir
+++ llvm/trunk/test/CodeGen/MIR/Generic/multiRunPass.mir
@@ -1,7 +1,7 @@
-# RUN: llc -run-pass expand-isel-pseudos  -run-pass peephole-opt -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE
-# RUN: llc -run-pass expand-isel-pseudos,peephole-opt -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE
-# RUN: llc -run-pass peephole-opt -run-pass expand-isel-pseudos -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO
-# RUN: llc -run-pass peephole-opt,expand-isel-pseudos -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO
+# RUN: llc -run-pass expand-isel-pseudos  -run-pass peephole-opt -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE
+# RUN: llc -run-pass expand-isel-pseudos,peephole-opt -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE
+# RUN: llc -run-pass peephole-opt -run-pass expand-isel-pseudos -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO
+# RUN: llc -run-pass peephole-opt,expand-isel-pseudos -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO
 # REQUIRES: asserts
 
 # This test ensures that the command line accepts
Index: llvm/trunk/test/CodeGen/MIR/Generic/register-info.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/register-info.mir
+++ llvm/trunk/test/CodeGen/MIR/Generic/register-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses machine register info properties
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/Hexagon/anti-dep-partial.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Hexagon/anti-dep-partial.mir
+++ llvm/trunk/test/CodeGen/MIR/Hexagon/anti-dep-partial.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=hexagon -post-RA-scheduler -run-pass post-RA-sched %s 2>&1 -o /dev/null | FileCheck %s
+# RUN: llc -march=hexagon -post-RA-scheduler -run-pass post-RA-sched %s -o - | FileCheck %s
 
 --- |
   declare void @check(i64, i32, i32, i64)
Index: llvm/trunk/test/CodeGen/MIR/Lanai/peephole-compare.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Lanai/peephole-compare.mir
+++ llvm/trunk/test/CodeGen/MIR/Lanai/peephole-compare.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass=peephole-opt %s -o /dev/null 2>&1 | FileCheck %s
+# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s
 
 # Test the compare fold peephole.
 
Index: llvm/trunk/test/CodeGen/MIR/Mips/memory-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/Mips/memory-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/Mips/memory-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the call entry pseudo source
 # values in memory operands correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses floating point constant operands
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
+++ llvm/trunk/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o - %s | FileCheck %s
 # PR24724
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/basic-block-liveins.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/basic-block-liveins.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/basic-block-liveins.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses basic block liveins correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/block-address-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/block-address-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/block-address-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the block address operands
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/callee-saved-info.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/callee-saved-info.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/callee-saved-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses callee saved information in the
 # stack objects correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the .cfi_def_cfa_offset operands
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the .cfi_def_cfa_register
 # operands correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the .cfi_offset operands
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses constant pool constants and
 # constant pool operands correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/dead-register-flag.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/dead-register-flag.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/dead-register-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the 'dead' register flags
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the 'early-clobber' register
 # flags correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the external symbol machine
 # operands correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses fixed stack memory operands
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-objects.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-objects.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-objects.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses fixed stack objects correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the save and restore points in
 # the machine frame info correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/frame-info-stack-references.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/frame-info-stack-references.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/frame-info-stack-references.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the stack protector stack
 # object reference in the machine frame info correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the frame setup instruction flag.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/function-liveins.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/function-liveins.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/function-liveins.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses machine function's liveins
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/generic-virtual-registers.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 # REQUIRES: global-isel
 # This test ensures that the MIR parser parses generic virtual
 # register definitions correctly.
Index: llvm/trunk/test/CodeGen/MIR/X86/global-value-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/global-value-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/global-value-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses global value operands correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses immediate machine operands.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the 'implicit' and 'implicit-def'
 # register flags correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/inline-asm-registers.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/inline-asm-registers.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/inline-asm-registers.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o - %s | FileCheck %s
 
 --- |
   define i64 @test(i64 %x, i64 %y) #0 {
Index: llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the machine instruction's
 # debug location metadata correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/jump-table-info.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/jump-table-info.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/jump-table-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the jump table info and jump
 # table operands correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the 'killed' register flags
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/liveout-register-mask.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/liveout-register-mask.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/liveout-register-mask.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the liveout register mask
 # machine operands correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses machine basic block operands.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/machine-instructions.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/machine-instructions.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/machine-instructions.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses X86 machine instructions
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the machine memory operands
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the metadata machine operands
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/named-registers.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/named-registers.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/named-registers.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses X86 registers correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/newline-handling.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/newline-handling.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/newline-handling.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 
 --- |
 
Index: llvm/trunk/test/CodeGen/MIR/X86/null-register-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/null-register-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/null-register-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses null register operands correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/register-mask-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/register-mask-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/register-mask-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses register mask operands correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses simple register allocation hints
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses fixed stack objects correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/stack-object-debug-info.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/stack-object-debug-info.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/stack-object-debug-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the stack object's debug info
 # correctly.
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/stack-object-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/stack-object-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/stack-object-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses stack object machine operands
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/stack-objects.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/stack-objects.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/stack-objects.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses stack objects correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/subregister-index-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/subregister-index-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/subregister-index-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses and prints subregisters index
 # operands correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses subregisters in register operands
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses basic block successors and
 # probabilities correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses basic block successors correctly.
 
 --- |
Index: llvm/trunk/test/CodeGen/MIR/X86/undef-register-flag.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/undef-register-flag.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/undef-register-flag.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the 'undef' register flags
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/used-physical-register-info.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/used-physical-register-info.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/used-physical-register-info.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses the callee saved register mask
 # correctly and that the MIR parser can infer it as well.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses variable sized stack objects
 # correctly.
 
Index: llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir
===================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir
+++ llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses virtual register definitions and
 # references correctly.
 
Index: llvm/trunk/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
+++ llvm/trunk/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after=dead-mi-elimination -stop-after=twoaddressinstruction -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -start-after=dead-mi-elimination -stop-after=twoaddressinstruction -o - %s | FileCheck %s
 
 --- |
   target datalayout = "E-m:e-i64:64-n32:64"
Index: llvm/trunk/test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir
+++ llvm/trunk/test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after=machine-sink -stop-after=peephole-opt -mtriple=powerpc64-unknown-linux-gnu -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -start-after=machine-sink -stop-after=peephole-opt -mtriple=powerpc64-unknown-linux-gnu -o - %s | FileCheck %s
 
 --- |
   ; ModuleID = '<stdin>'
Index: llvm/trunk/test/CodeGen/PowerPC/stackmap-frame-setup.ll
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/stackmap-frame-setup.ll
+++ llvm/trunk/test/CodeGen/PowerPC/stackmap-frame-setup.ll
@@ -1,5 +1,5 @@
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -o - -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
+; RUN: llc -o - -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
 
 define void @caller_meta_leaf() {
 entry:
Index: llvm/trunk/test/CodeGen/X86/eflags-copy-expansion.mir
===================================================================
--- llvm/trunk/test/CodeGen/X86/eflags-copy-expansion.mir
+++ llvm/trunk/test/CodeGen/X86/eflags-copy-expansion.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass postrapseudos -mtriple=i386-apple-macosx -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -run-pass postrapseudos -mtriple=i386-apple-macosx -o - %s | FileCheck %s
 
 # Verify that we correctly save and restore eax when copying eflags,
 # even when only a smaller alias of eax is used. We used to check only
Index: llvm/trunk/test/CodeGen/X86/expand-vr64-gr64-copy.mir
===================================================================
--- llvm/trunk/test/CodeGen/X86/expand-vr64-gr64-copy.mir
+++ llvm/trunk/test/CodeGen/X86/expand-vr64-gr64-copy.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass postrapseudos -mtriple=x86_64-unknown-unknown -mattr=+3dnow -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -run-pass postrapseudos -mtriple=x86_64-unknown-unknown -mattr=+3dnow -o - %s | FileCheck %s
 # This test verifies that the ExpandPostRA pass expands the GR64 <-> VR64
 # copies into appropriate MMX_MOV instructions.
 
Index: llvm/trunk/test/CodeGen/X86/fixup-bw-copy.mir
===================================================================
--- llvm/trunk/test/CodeGen/X86/fixup-bw-copy.mir
+++ llvm/trunk/test/CodeGen/X86/fixup-bw-copy.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o - %s | FileCheck %s
 
 # Verify that we correctly deal with the flag edge cases when replacing
 # copies by bigger copies, which is a pretty unusual transform.
Index: llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir
===================================================================
--- llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir
+++ llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass implicit-null-checks -mtriple=x86_64-apple-macosx -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -run-pass implicit-null-checks -mtriple=x86_64-apple-macosx -o - %s | FileCheck %s
 
 --- |
   target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
Index: llvm/trunk/test/CodeGen/X86/machine-combiner-int.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/machine-combiner-int.ll
+++ llvm/trunk/test/CodeGen/X86/machine-combiner-int.ll
@@ -1,5 +1,5 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after machine-combiner -o /dev/null 2>&1 | FileCheck %s --check-prefix=DEAD
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after machine-combiner -o - | FileCheck %s --check-prefix=DEAD
 
 ; Verify that integer multiplies are reassociated. The first multiply in 
 ; each test should be independent of the result of the preceding add (lea).
Index: llvm/trunk/test/CodeGen/X86/machine-copy-prop.mir
===================================================================
--- llvm/trunk/test/CodeGen/X86/machine-copy-prop.mir
+++ llvm/trunk/test/CodeGen/X86/machine-copy-prop.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -run-pass machine-cp -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86 -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s
 
 --- |
   declare void @foo()
Index: llvm/trunk/test/CodeGen/X86/patchpoint-verifiable.mir
===================================================================
--- llvm/trunk/test/CodeGen/X86/patchpoint-verifiable.mir
+++ llvm/trunk/test/CodeGen/X86/patchpoint-verifiable.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=x86_64-apple-darwin -stop-after branch-folder -start-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=x86_64-apple-darwin -stop-after branch-folder -start-after branch-folder -o - %s | FileCheck %s
 # This test verifies that the machine verifier won't report an error when
 # verifying the PATCHPOINT instruction.
 
Index: llvm/trunk/test/CodeGen/X86/pr27681.mir
===================================================================
--- llvm/trunk/test/CodeGen/X86/pr27681.mir
+++ llvm/trunk/test/CodeGen/X86/pr27681.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=i386-unknown-linux-gnu -mcpu=slm -run-pass post-RA-sched -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=i386-unknown-linux-gnu -mcpu=slm -run-pass post-RA-sched -o - %s | FileCheck %s
 #
 # Verify that the critical antidependence breaker does not consider
 # a high byte register as available as a replacement register
Index: llvm/trunk/test/CodeGen/X86/stackmap-frame-setup.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/stackmap-frame-setup.ll
+++ llvm/trunk/test/CodeGen/X86/stackmap-frame-setup.ll
@@ -1,5 +1,5 @@
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -o - -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
+; RUN: llc -o - -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
 
 define void @caller_meta_leaf() {
 entry:
Index: llvm/trunk/test/CodeGen/X86/update-terminator.mir
===================================================================
--- llvm/trunk/test/CodeGen/X86/update-terminator.mir
+++ llvm/trunk/test/CodeGen/X86/update-terminator.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -verify-machineinstrs -run-pass block-placement -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -march=x86-64 -verify-machineinstrs -run-pass block-placement -o - %s | FileCheck %s
 # Check the conditional jump in bb.1 is changed to unconditional after block placement swaps bb.2 and bb.3.
 
 --- |
Index: llvm/trunk/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
+++ llvm/trunk/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after machine-scheduler %s 2>&1 | FileCheck %s --check-prefix=PRE-RA
-; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after prologepilog %s 2>&1 | FileCheck %s --check-prefix=POST-RA
+; RUN: llc -mtriple=x86_64-unknown-unknown -o - -stop-after machine-scheduler %s | FileCheck %s --check-prefix=PRE-RA
+; RUN: llc -mtriple=x86_64-unknown-unknown -o - -stop-after prologepilog %s | FileCheck %s --check-prefix=POST-RA
 
 ; This test verifies that the virtual register references in machine function's
 ; liveins are cleared after register allocation.
Index: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
===================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s | FileCheck %s
 
 # Test the extension of debug ranges from 3 predecessors.
 # Generated from the source file LiveDebugValues-3preds.c:
Index: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir
===================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s | FileCheck %s
 
 # Test the extension of debug ranges from predecessors.
 # Generated from the source file LiveDebugValues.c:
Index: llvm/trunk/test/DebugInfo/X86/bbjoin.ll
===================================================================
--- llvm/trunk/test/DebugInfo/X86/bbjoin.ll
+++ llvm/trunk/test/DebugInfo/X86/bbjoin.ll
@@ -1,5 +1,5 @@
 ; RUN: llc -mtriple=x86_64-apple-macosx10.9.0 %s -stop-after=livedebugvars \
-; RUN:   -o %t.s 2>&1 | FileCheck %s
+; RUN:   -o - | FileCheck %s
 ; Generated from:
 ; void g(int *);
 ; int f() {
Index: llvm/trunk/test/DebugInfo/X86/float_const_loclist.ll
===================================================================
--- llvm/trunk/test/DebugInfo/X86/float_const_loclist.ll
+++ llvm/trunk/test/DebugInfo/X86/float_const_loclist.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -stop-after=livedebugvalues -o %t 2>&1 | FileCheck --check-prefix=SANITY %s
+; RUN: llc %s -stop-after=livedebugvalues -o - | FileCheck --check-prefix=SANITY %s
 ; RUN: llc < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s
 ; Test debug_loc support for floating point constants.
 ;
Index: llvm/trunk/test/DebugInfo/X86/safestack-byval.ll
===================================================================
--- llvm/trunk/test/DebugInfo/X86/safestack-byval.ll
+++ llvm/trunk/test/DebugInfo/X86/safestack-byval.ll
@@ -1,7 +1,7 @@
 ; Test dwarf codegen for DILocalVariable of a byval function argument that
 ; points to neither an argument nor an alloca. This kind of IR is generated by
 ; SafeStack for unsafe byval arguments.
-; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after expand-isel-pseudos %s -o - | FileCheck %s
 
 ; This was built by compiling the following source with SafeStack and
 ; simplifying the result a little.
Index: llvm/trunk/test/DebugInfo/X86/single-dbg_value.ll
===================================================================
--- llvm/trunk/test/DebugInfo/X86/single-dbg_value.ll
+++ llvm/trunk/test/DebugInfo/X86/single-dbg_value.ll
@@ -1,4 +1,4 @@
-; RUN: %llc_dwarf -stop-after=livedebugvalues -o /dev/null %s 2>&1 \
+; RUN: %llc_dwarf -stop-after=livedebugvalues -o - %s \
 ; RUN:   | FileCheck %s --check-prefix=SANITY
 ; RUN: %llc_dwarf -march=x86-64 -o - %s -filetype=obj \
 ; RUN:   | llvm-dwarfdump -debug-dump=all - | FileCheck %s
Index: llvm/trunk/tools/llc/llc.cpp
===================================================================
--- llvm/trunk/tools/llc/llc.cpp
+++ llvm/trunk/tools/llc/llc.cpp
@@ -440,7 +440,7 @@
         PM.add(P);
         TPC->printAndVerify(Banner);
       }
-      PM.add(createPrintMIRPass(errs()));
+      PM.add(createPrintMIRPass(*OS));
     } else {
       if (!StartAfter.empty()) {
         const PassInfo *PI = PR->getPassInfo(StartAfter);