Index: llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -72,7 +72,8 @@
   const uint64_t MaxNopLength;
 public:
   X86AsmBackend(const Target &T, StringRef CPU)
-      : MCAsmBackend(), CPU(CPU), MaxNopLength(CPU == "slm" ? 7 : 15) {
+      : MCAsmBackend(), CPU(CPU),
+        MaxNopLength((CPU == "slm" || CPU == "lakemont") ? 7 : 15) {
     HasNopl = CPU != "generic" && CPU != "i386" && CPU != "i486" &&
               CPU != "i586" && CPU != "pentium" && CPU != "pentium-mmx" &&
               CPU != "i686" && CPU != "k6" && CPU != "k6-2" && CPU != "k6-3" &&
Index: llvm/trunk/test/MC/X86/x86_long_nop.s
===================================================================
--- llvm/trunk/test/MC/X86/x86_long_nop.s
+++ llvm/trunk/test/MC/X86/x86_long_nop.s
@@ -2,7 +2,8 @@
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=x86_64-apple-darwin10.0 %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-apple-darwin8 %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
-# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu -mcpu=slm %s | llvm-objdump -d -no-show-raw-insn - | FileCheck --check-prefix=SLM %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu -mcpu=slm %s | llvm-objdump -d -no-show-raw-insn - | FileCheck --check-prefix=LNOP7 %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu -mcpu=lakemont %s | llvm-objdump -d -no-show-raw-insn - | FileCheck --check-prefix=LNOP7 %s
 
 # Ensure alignment directives also emit sequences of 15-byte NOPs on processors
 # capable of using long NOPs.
@@ -15,11 +16,12 @@
 # CHECK-NEXT: 1f:  nop
 # CHECK-NEXT: 20:  inc
 
-# On Silvermont we emit only 7 byte NOPs since longer NOPs are not profitable
-# SLM: 0:  inc
-# SLM-NEXT: 1:  nop
-# SLM-NEXT: 8:  nop
-# SLM-NEXT: f:  nop
-# SLM-NEXT: 16:  nop
-# SLM-NEXT: 1d:  nop
-# SLM-NEXT: 20:  inc
+# On Silvermont and Lakemont we emit only 7 byte NOPs since longer NOPs
+# are not profitable.
+# LNOP7: 0:  inc
+# LNOP7-NEXT: 1:  nop
+# LNOP7-NEXT: 8:  nop
+# LNOP7-NEXT: f:  nop
+# LNOP7-NEXT: 16:  nop
+# LNOP7-NEXT: 1d:  nop
+# LNOP7-NEXT: 20:  inc