[X86][PKU] Add {RD,WR}PKRU encoding

[delena]

../trunk/lib/Target/X86/X86InstrSystem.td

554 ↗

(On Diff #43436)

Please remove predicates

562 ↗

(On Diff #43436)

remove 64-bit version

[AsafBadouh]

applying Elena's comments

[delena]

LGTM

llvm/trunk/include/llvm/IR/IntrinsicsX86.td

def int_x86_xsavec64 :
               Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty], []>;
   def int_x86_xsaves :
               Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty], []>;
   def int_x86_xsaves64 :
               Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty], []>;
 }
 
 //===----------------------------------------------------------------------===//
+// Support protection key
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_rdpkru : GCCBuiltin <"__builtin_ia32_rdpkru">,
+              Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
+  def int_x86_wrpkru : GCCBuiltin<"__builtin_ia32_wrpkru">,
+              Intrinsic<[], [llvm_i32_ty], [IntrNoMem]>;
+}
+//===----------------------------------------------------------------------===//
 // Half float conversion
 
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_vcvtph2ps_128 : GCCBuiltin<"__builtin_ia32_vcvtph2ps">,
               Intrinsic<[llvm_v4f32_ty], [llvm_v8i16_ty], [IntrNoMem]>;
   def int_x86_vcvtph2ps_256 : GCCBuiltin<"__builtin_ia32_vcvtph2ps256">,
               Intrinsic<[llvm_v8f32_ty], [llvm_v8i16_ty], [IntrNoMem]>;
   def int_x86_vcvtps2ph_128 : GCCBuiltin<"__builtin_ia32_vcvtps2ph">,

llvm/trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h

inline int getMemoryOperandNo(uint64_t TSFlags, unsigned Opcode) {
     case X86II::MRM_D4: case X86II::MRM_D5: case X86II::MRM_D6:
     case X86II::MRM_D7: case X86II::MRM_D8: case X86II::MRM_D9:
     case X86II::MRM_DA: case X86II::MRM_DB: case X86II::MRM_DC:
     case X86II::MRM_DD: case X86II::MRM_DE: case X86II::MRM_DF:
     case X86II::MRM_E0: case X86II::MRM_E1: case X86II::MRM_E2:
     case X86II::MRM_E3: case X86II::MRM_E4: case X86II::MRM_E5:
     case X86II::MRM_E8: case X86II::MRM_E9: case X86II::MRM_EA:
     case X86II::MRM_EB: case X86II::MRM_EC: case X86II::MRM_ED:
-    case X86II::MRM_EE: case X86II::MRM_F0: case X86II::MRM_F1:
-    case X86II::MRM_F2: case X86II::MRM_F3: case X86II::MRM_F4:
-    case X86II::MRM_F5: case X86II::MRM_F6: case X86II::MRM_F7:
-    case X86II::MRM_F8: case X86II::MRM_F9: case X86II::MRM_FA:
-    case X86II::MRM_FB: case X86II::MRM_FC: case X86II::MRM_FD:
-    case X86II::MRM_FE: case X86II::MRM_FF:
+    case X86II::MRM_EE: case X86II::MRM_EF: case X86II::MRM_F0:
+    case X86II::MRM_F1: case X86II::MRM_F2: case X86II::MRM_F3:
+    case X86II::MRM_F4: case X86II::MRM_F5: case X86II::MRM_F6:
+    case X86II::MRM_F7: case X86II::MRM_F8: case X86II::MRM_F9:
+    case X86II::MRM_FA: case X86II::MRM_FB: case X86II::MRM_FC:
+    case X86II::MRM_FD: case X86II::MRM_FE: case X86II::MRM_FF:
       return -1;
     }
   }
 
   /// isX86_64ExtendedReg - Is the MachineOperand a x86-64 extended (r8 or
   /// higher) register?  e.g. r8, xmm8, xmm13, etc.
   inline bool isX86_64ExtendedReg(unsigned RegNo) {
     if ((RegNo > X86::XMM7 && RegNo <= X86::XMM15) ||

llvm/trunk/lib/Target/X86/X86InstrSystem.td

 }
 
 let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in {
   def XSHA1 : I<0xa6, MRM_C8, (outs), (ins), "xsha1", []>, TB;
   def XSHA256 : I<0xa6, MRM_D0, (outs), (ins), "xsha256", []>, TB;
 }
 let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
   def MONTMUL : I<0xa6, MRM_C0, (outs), (ins), "montmul", []>, TB;
+//==-----------------------------------------------------------------------===//
+// PKU  - enable protection key
+let Defs = [EAX, EDX], Uses = [ECX] in 
+  def RDPKRU : I<0x01, MRM_EE, (outs), (ins), "rdpkru", []>, TB;
+let Uses = [EAX, ECX, EDX] in
+  def WRPKRU : I<0x01, MRM_EF, (outs), (ins), "wrpkru", []>, TB;
 
 //===----------------------------------------------------------------------===//
 // FS/GS Base Instructions
 let Predicates = [HasFSGSBase, In64BitMode] in {
   def RDFSBASE : I<0xAE, MRM0r, (outs GR32:$dst), (ins),
                    "rdfsbase{l}\t$dst",
                    [(set GR32:$dst, (int_x86_rdfsbase_32))]>, XS;
   def RDFSBASE64 : RI<0xAE, MRM0r, (outs GR64:$dst), (ins),

llvm/trunk/test/MC/X86/X86_64-pku.s

+// RUN: llvm-mc -triple x86_64-unknown-unknown -mattr=+pku --show-encoding < %s | FileCheck %s
+// CHECK: rdpkru
+// CHECK: encoding: [0x0f,0x01,0xee]
+   rdpkru
+
+// CHECK: wrpkru
+// CHECK: encoding: [0x0f,0x01,0xef]
+   wrpkru 
 No newline at end of file

llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp

#define HANDLE_OPTIONAL(class)              \
   case X86Local::MRM_D4: case X86Local::MRM_D5: case X86Local::MRM_D6:
   case X86Local::MRM_D7: case X86Local::MRM_D8: case X86Local::MRM_D9:
   case X86Local::MRM_DA: case X86Local::MRM_DB: case X86Local::MRM_DC:
   case X86Local::MRM_DD: case X86Local::MRM_DE: case X86Local::MRM_DF:
   case X86Local::MRM_E0: case X86Local::MRM_E1: case X86Local::MRM_E2:
   case X86Local::MRM_E3: case X86Local::MRM_E4: case X86Local::MRM_E5:
   case X86Local::MRM_E8: case X86Local::MRM_E9: case X86Local::MRM_EA:
   case X86Local::MRM_EB: case X86Local::MRM_EC: case X86Local::MRM_ED:
-  case X86Local::MRM_EE: case X86Local::MRM_F0: case X86Local::MRM_F1:
-  case X86Local::MRM_F2: case X86Local::MRM_F3: case X86Local::MRM_F4:
-  case X86Local::MRM_F5: case X86Local::MRM_F6: case X86Local::MRM_F7:
-  case X86Local::MRM_F9: case X86Local::MRM_FA: case X86Local::MRM_FB:
-  case X86Local::MRM_FC: case X86Local::MRM_FD: case X86Local::MRM_FE:
-  case X86Local::MRM_FF:
+  case X86Local::MRM_EE: case X86Local::MRM_EF: case X86Local::MRM_F0:
+  case X86Local::MRM_F1: case X86Local::MRM_F2: case X86Local::MRM_F3:
+  case X86Local::MRM_F4: case X86Local::MRM_F5: case X86Local::MRM_F6:
+  case X86Local::MRM_F7: case X86Local::MRM_F9: case X86Local::MRM_FA:
+  case X86Local::MRM_FB:  case X86Local::MRM_FC: case X86Local::MRM_FD:
+  case X86Local::MRM_FE:  case X86Local::MRM_FF:
     // Ignored.
     break;
   }
 
   #undef HANDLE_OPERAND
   #undef HANDLE_OPTIONAL
 }