Index: include/llvm/Target/TargetRegisterInfo.h
===================================================================
--- include/llvm/Target/TargetRegisterInfo.h
+++ include/llvm/Target/TargetRegisterInfo.h
@@ -778,6 +778,13 @@
     return false;
   }
 
+  /// Returns true if the target uses virtual registers even after register
+  /// allocation (e.g. for virtual ISAs which use infinite virtual registers
+  /// instead of physical registers)
+  virtual bool usesVirtualRegsAfterRegAlloc() const {
+    return false;
+  }
+
   /// True if the stack can be realigned for the target.
   virtual bool canRealignStack(const MachineFunction &MF) const;
 
Index: lib/CodeGen/PrologEpilogInserter.cpp
===================================================================
--- lib/CodeGen/PrologEpilogInserter.cpp
+++ lib/CodeGen/PrologEpilogInserter.cpp
@@ -168,7 +168,9 @@
   const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
   const TargetFrameLowering *TFI = Fn.getSubtarget().getFrameLowering();
 
-  assert(!Fn.getRegInfo().getNumVirtRegs() && "Regalloc must assign all vregs");
+  assert((TRI->usesVirtualRegsAfterRegAlloc() ||
+          !Fn.getRegInfo().getNumVirtRegs()) &&
+         "Regalloc must assign all vregs");
 
   RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : nullptr;
   FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn);
@@ -216,11 +218,11 @@
   // If register scavenging is needed, as we've enabled doing it as a
   // post-pass, scavenge the virtual registers that frame index elimination
   // inserted.
-  if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
+  if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging) {
     scavengeFrameVirtualRegs(Fn);
-
-  // Clear any vregs created by virtual scavenging.
-  Fn.getRegInfo().clearVirtRegs();
+    // Clear any vregs created by virtual scavenging.
+    Fn.getRegInfo().clearVirtRegs();
+  }
 
   // Warn on stack size when we exceeds the given limit.
   MachineFrameInfo *MFI = Fn.getFrameInfo();
Index: lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
===================================================================
--- lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
+++ lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
@@ -35,6 +35,8 @@
   // Code Generation virtual methods.
   const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
   BitVector getReservedRegs(const MachineFunction &MF) const override;
+  bool usesVirtualRegsAfterRegAlloc() const override { return true; }
+
   void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
                            unsigned FIOperandNum,
                            RegScavenger *RS = nullptr) const override;