diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp --- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -1397,23 +1397,18 @@ MFnI.needsDwarfUnwindInfo(MF)); if (MFnI.shouldSignReturnAddress(MF)) { - unsigned PACI; if (MFnI.shouldSignWithBKey()) { BuildMI(MBB, MBBI, DL, TII->get(AArch64::EMITBKEY)) .setMIFlag(MachineInstr::FrameSetup); - // No SEH opcode for this one; it doesn't materialize into an - // instruction on Windows. - PACI = Subtarget.hasPAuth() ? AArch64::PACIB : AArch64::PACIBSP; - } else { - PACI = Subtarget.hasPAuth() ? AArch64::PACIA : AArch64::PACIASP; } - auto MI = BuildMI(MBB, MBBI, DL, TII->get(PACI)); - if (Subtarget.hasPAuth()) - MI.addReg(AArch64::LR, RegState::Define) - .addReg(AArch64::LR) - .addReg(AArch64::SP, RegState::InternalRead); - MI.setMIFlag(MachineInstr::FrameSetup); + // No SEH opcode for this one; it doesn't materialize into an + // instruction on Windows. + BuildMI(MBB, MBBI, DL, + TII->get(MFnI.shouldSignWithBKey() ? AArch64::PACIBSP + : AArch64::PACIASP)) + .setMIFlag(MachineInstr::FrameSetup); + if (EmitCFI) { unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr)); diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -7867,7 +7867,7 @@ static void signOutlinedFunction(MachineFunction &MF, MachineBasicBlock &MBB, bool ShouldSignReturnAddr, - bool ShouldSignReturnAddrWithAKey) { + bool ShouldSignReturnAddrWithBKey) { if (ShouldSignReturnAddr) { MachineBasicBlock::iterator MBBPAC = MBB.begin(); MachineBasicBlock::iterator MBBAUT = MBB.getFirstTerminator(); @@ -7885,21 +7885,15 @@ // PACIASP EMITBKEY // CFI_INSTRUCTION PACIBSP // CFI_INSTRUCTION - unsigned PACI; - if (ShouldSignReturnAddrWithAKey) { - PACI = Subtarget.hasPAuth() ? AArch64::PACIA : AArch64::PACIASP; - } else { + if (ShouldSignReturnAddrWithBKey) { BuildMI(MBB, MBBPAC, DebugLoc(), TII->get(AArch64::EMITBKEY)) .setMIFlag(MachineInstr::FrameSetup); - PACI = Subtarget.hasPAuth() ? AArch64::PACIB : AArch64::PACIBSP; } - auto MI = BuildMI(MBB, MBBPAC, DebugLoc(), TII->get(PACI)); - if (Subtarget.hasPAuth()) - MI.addReg(AArch64::LR, RegState::Define) - .addReg(AArch64::LR) - .addReg(AArch64::SP, RegState::InternalRead); - MI.setMIFlag(MachineInstr::FrameSetup); + BuildMI(MBB, MBBPAC, DebugLoc(), + TII->get(ShouldSignReturnAddrWithBKey ? AArch64::PACIBSP + : AArch64::PACIASP)) + .setMIFlag(MachineInstr::FrameSetup); if (MF.getInfo()->needsDwarfUnwindInfo(MF)) { unsigned CFIIndex = @@ -7915,14 +7909,14 @@ if (Subtarget.hasPAuth() && MBBAUT != MBB.end() && MBBAUT->getOpcode() == AArch64::RET) { BuildMI(MBB, MBBAUT, DL, - TII->get(ShouldSignReturnAddrWithAKey ? AArch64::RETAA - : AArch64::RETAB)) + TII->get(ShouldSignReturnAddrWithBKey ? AArch64::RETAB + : AArch64::RETAA)) .copyImplicitOps(*MBBAUT); MBB.erase(MBBAUT); } else { BuildMI(MBB, MBBAUT, DL, - TII->get(ShouldSignReturnAddrWithAKey ? AArch64::AUTIASP - : AArch64::AUTIBSP)) + TII->get(ShouldSignReturnAddrWithBKey ? AArch64::AUTIBSP + : AArch64::AUTIASP)) .setMIFlag(MachineInstr::FrameDestroy); unsigned CFIIndexAuth = MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr)); @@ -8037,13 +8031,13 @@ bool ShouldSignReturnAddr = MFI.shouldSignReturnAddress(!IsLeafFunction); // a_key is the default - bool ShouldSignReturnAddrWithAKey = !MFI.shouldSignWithBKey(); + bool ShouldSignReturnAddrWithBKey = MFI.shouldSignWithBKey(); // If this is a tail call outlined function, then there's already a return. if (OF.FrameConstructionID == MachineOutlinerTailCall || OF.FrameConstructionID == MachineOutlinerThunk) { signOutlinedFunction(MF, MBB, ShouldSignReturnAddr, - ShouldSignReturnAddrWithAKey); + ShouldSignReturnAddrWithBKey); return; } @@ -8058,7 +8052,7 @@ MBB.insert(MBB.end(), ret); signOutlinedFunction(MF, MBB, ShouldSignReturnAddr, - ShouldSignReturnAddrWithAKey); + ShouldSignReturnAddrWithBKey); FI->setOutliningStyle("Function"); diff --git a/llvm/test/CodeGen/AArch64/aarch64-signedreturnaddress.ll b/llvm/test/CodeGen/AArch64/aarch64-signedreturnaddress.ll --- a/llvm/test/CodeGen/AArch64/aarch64-signedreturnaddress.ll +++ b/llvm/test/CodeGen/AArch64/aarch64-signedreturnaddress.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=arm64-eabi -asm-verbose=false -mattr=v8.2a | FileCheck %s ; RUN: llc < %s -mtriple=arm64-eabi -asm-verbose=false -mattr=v8.3a | FileCheck %s --check-prefix=CHECKV83 -; Armv8.3-A Pointer Authetication requires a special instruction to strip the +; Armv8.3-A Pointer Authetication requires a special intsruction to strip the ; pointer authentication code from the pointer. ; The XPACLRI instruction assembles to a hint-space instruction before Armv8.3-A ; therefore this instruction can be safely used for any pre Armv8.3-A architectures. @@ -34,7 +34,7 @@ ; CHECK-NEXT: ldr x30, [sp], #16 ; CHECK-NEXT: hint #29 ; CHECK-NEXT: ret -; CHECKV83: pacia x30, sp +; CHECKV83: paciasp ; CHECKV83-NEXT: str x30, [sp, #-16]! ; CHECKV83-NEXT: xpaci x30 ; CHECKV83-NEXT: mov x0, x30 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.ll --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.ll @@ -5,7 +5,7 @@ ; CHECK-LABEL: foo: // @foo ; CHECK-NEXT: // %bb.0: // %entry -; CHECK-NEXT: pacia x30, sp +; CHECK-NEXT: paciasp ; CHECK-NOT: OUTLINED_FUNCTION_ ; CHECK: retaa define dso_local void @foo(i32 %x) #0 { @@ -23,7 +23,7 @@ ; CHECK-LABEL: bar: // @bar ; CHECK-NEXT: // %bb.0: // %entry -; CHECK-NEXT: pacia x30, sp +; CHECK-NEXT: paciasp ; CHECK-NOT: OUTLINED_FUNCTION_ ; CHECK: retaa define dso_local void @bar(i32 %x) #0 { diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll @@ -9,7 +9,7 @@ ; CHECK-LABEL: a: // @a ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: pacib x30, sp +; CHECK-NEXT: pacibsp ; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NOT: OUTLINED_FUNCTION_ %1 = alloca i32, align 4 @@ -33,7 +33,7 @@ ; CHECK-LABEL: b: // @b ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: pacib x30, sp +; CHECK-NEXT: pacibsp ; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NOT: OUTLINED_FUNCTION_ %1 = alloca i32, align 4 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-v8-3.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-v8-3.ll --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-v8-3.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-v8-3.ll @@ -7,7 +7,7 @@ define void @a() #0 { ; CHECK-LABEL: a: // @a ; CHECK: // %bb.0: -; CHECK-NEXT: pacib x30, sp +; CHECK-NEXT: pacibsp ; CHECK: bl [[OUTLINED_FUNC:OUTLINED_FUNCTION_[0-9]+]] %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -22,14 +22,14 @@ store i32 5, ptr %5, align 4 store i32 6, ptr %6, align 4 ; CHECK: retab -; CHECK-NOT: auti +; CHECK-NOT: auti[a,b]sp ret void } define void @b() #0 { ; CHECK-LABEL: b: // @b ; CHECK: // %bb.0: -; CHECK-NEXT: pacib x30, sp +; CHECK-NEXT: pacibsp ; CHECK: bl OUTLINED_FUNC %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -44,14 +44,14 @@ store i32 5, ptr %5, align 4 store i32 6, ptr %6, align 4 ; CHECK: retab -; CHECK-NOT: auti +; CHECK-NOT: auti[a,b]sp ret void } define void @c() #0 { ; CHECK-LABEL: c: // @c ; CHECK: // %bb.0: -; CHECK-NEXT: pacib x30, sp +; CHECK-NEXT: pacibsp ; CHECK: bl OUTLINED_FUNC %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -66,7 +66,7 @@ store i32 5, ptr %5, align 4 store i32 6, ptr %6, align 4 ; CHECK: retab -; CHECK-NOT: auti +; CHECK-NOT: auti[a,b]sp ret void } @@ -77,6 +77,6 @@ ; CHECK: OUTLINED_FUNC ; CHECK: // %bb.0: -; CHECK-NEXT: pacib x30, sp +; CHECK-NEXT: pacibsp ; CHECK: retab ; CHECK-NOT: auti[a,b]sp diff --git a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll --- a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll +++ b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll @@ -11,7 +11,7 @@ ret i32 0 } ;; CHECK-LABEL: f: -;; CHECK: pacib x30, sp +;; CHECK: pacibsp declare void @llvm_gcda_start_file(ptr, i32, i32) local_unnamed_addr @@ -34,7 +34,7 @@ } ;; CHECK-LABEL: __llvm_gcov_writeout: ;; CHECK: .cfi_b_key_frame -;; CHECK-NEXT: pacib x30, sp +;; CHECK-NEXT: pacibsp ;; CHECK-NEXT: .cfi_negate_ra_state define internal void @__llvm_gcov_reset() unnamed_addr #2 { @@ -43,7 +43,7 @@ ret void } ;; CHECK-LABEL: __llvm_gcov_reset: -;; CHECK: pacib x30, sp +;; CHECK: pacibsp declare void @llvm_gcov_init(ptr, ptr) local_unnamed_addr @@ -54,7 +54,7 @@ } ;; CHECK-LABEL: __llvm_gcov_init: ;; CHECK: .cfi_b_key_frame -;; CHECK-NEXT: pacib x30, sp +;; CHECK-NEXT: pacibsp ;; CHECK-NEXT: .cfi_negate_ra_state attributes #0 = { norecurse nounwind readnone "sign-return-address"="all" "sign-return-address-key"="b_key" } diff --git a/llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll b/llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll --- a/llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll +++ b/llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll @@ -30,7 +30,7 @@ ret i32 %add } ;; CHECK-LABEL: f2: -;; CHECK: pacia x30, sp +;; CHECK: paciasp ;; CHECK: retaa define i32 @f3(i32 %x) #3 { @@ -40,7 +40,7 @@ ret i32 %add } ;; CHECK-LABEL: f3: -;; CHECK: pacib x30, sp +;; CHECK: pacibsp ;; CHECK: retab define i32 @f4(i32 %x) #4 { @@ -48,7 +48,7 @@ ret i32 1 } ;; CHECK-LABEL: f4: -;; CHECK: pacia x30, sp +;; CHECK: paciasp ;; CHECK: retaa define i32 @f5(i32 %x) #5 { @@ -58,7 +58,7 @@ ret i32 %add } ;; CHECK-LABEL: f5: -;; CHECK: pacia x30, sp +;; CHECK: paciasp ;; CHECK: retaa attributes #0 = { nounwind "branch-target-enforcement"="false" "sign-return-address"="none" } diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll --- a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll +++ b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll @@ -7,7 +7,7 @@ ; CHECK: @_Z3fooi ; CHECK-V8A: hint #25 -; CHECK-V83A: pacia x30, sp +; CHECK-V83A: paciasp ; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NOT: .cfi_negate_ra_state define dso_local i32 @_Z3fooi(i32 %x) #0 { diff --git a/llvm/test/CodeGen/AArch64/sign-return-address.ll b/llvm/test/CodeGen/AArch64/sign-return-address.ll --- a/llvm/test/CodeGen/AArch64/sign-return-address.ll +++ b/llvm/test/CodeGen/AArch64/sign-return-address.ll @@ -28,7 +28,7 @@ ; CHECK: hint #29 ; CHECK-NEXT: .cfi_negate_ra_state ; CHECK: ret -; CHECK-V83A: pacia x30, sp +; CHECK-V83A: paciasp ; CHECK-V83A: retaa define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" { ret i32 %x @@ -37,7 +37,7 @@ ; CHECK: @leaf_clobbers_lr ; CHECK: hint #25 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK-V83A: pacia x30, sp +; CHECK-V83A: paciasp ; CHECK, CHECK-V83A: str x30, [sp, #-16]! ; CHECK, CHECK-V83A: ldr x30, [sp], #16 ; CHECK: hint #29 @@ -57,7 +57,7 @@ ; CHECK: hint #29 ; CHECK-NEXT: .cfi_negate_ra_state ; CHECK: ret -; CHECK-V83A: pacia x30, sp +; CHECK-V83A: paciasp ; CHECK-V83A: retaa define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { %call = call i32 @foo(i32 %x) @@ -67,7 +67,7 @@ ; CHECK: @non_leaf_sign_non_leaf ; CHECK: hint #25 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK-V83A: pacia x30, sp +; CHECK-V83A: paciasp ; CHECK, CHECK-V83A: str x30, [sp, #-16]! ; CHECK, CHECK-V83A: ldr x30, [sp], #16 ; CHECK: hint #29 @@ -87,11 +87,11 @@ } ; CHECK-LABEL: @leaf_sign_all_v83 -; CHECK: pacia x30, sp +; CHECK: paciasp ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK-NOT: ret -; CHECK: retaa -; CHECK-NOT: ret +; CHECK-NOT: ret +; CHECK: retaa +; CHECK-NOT: ret define i32 @leaf_sign_all_v83(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" { ret i32 %x } @@ -101,7 +101,7 @@ ; CHECK-LABEL: @spill_lr_and_tail_call ; CHECK: hint #25 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK-V83A: pacia x30, sp +; CHECK-V83A: paciasp ; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK, CHECK-V83A: str x30, [sp, #-16]! ; CHECK, CHECK-V83A: ldr x30, [sp], #16 @@ -116,71 +116,68 @@ } ; CHECK-LABEL: @leaf_sign_all_a_key -; CHECK: hint #25 +; CHECK: hint #25 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK: hint #29 +; CHECK: hint #29 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK-V83A: pacia x30, sp -; CHECK-V83A-NEXT: .cfi_negate_ra_state -; CHECK-V83A: retaa +; CHECK-V83A: paciasp +; CHECK-V83A: retaa define i32 @leaf_sign_all_a_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" { ret i32 %x } ; CHECK-LABEL: @leaf_sign_all_b_key -; CHECK: hint #27 +; CHECK: hint #27 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK: hint #31 +; CHECK: hint #31 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK-V83A: pacib x30, sp -; CHECK-V83A-NEXT: .cfi_negate_ra_state -; CHECK-V83A: retab +; CHECK-V83A: pacibsp +; CHECK-V83A: retab define i32 @leaf_sign_all_b_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="b_key" { ret i32 %x } ; CHECK-LABEL: @leaf_sign_all_v83_b_key -; CHECK: pacib x30, sp +; CHECK: pacibsp ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK-NOT: ret -; CHECK: retab -; CHECK-NOT: ret +; CHECK-NOT: ret +; CHECK: retab +; CHECK-NOT: ret define i32 @leaf_sign_all_v83_b_key(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" { ret i32 %x } ; CHECK-LABEL: @leaf_sign_all_a_key_bti -; CHECK-NOT: hint #34 -; CHECK: hint #25 +; CHECK-NOT: hint #34 +; CHECK: hint #25 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK: hint #29 +; CHECK: hint #29 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK-V83A: pacia x30, sp -; CHECK-V83A-NEXT: .cfi_negate_ra_state -; CHECK-V83A: retaa +; CHECK-V83A: paciasp +; CHECK-V83A: retaa define i32 @leaf_sign_all_a_key_bti(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" "branch-target-enforcement"="true"{ ret i32 %x } ; CHECK-LABEL: @leaf_sign_all_b_key_bti -; CHECK-NOT: hint #34 -; CHECK: hint #27 +; CHECK-NOT: hint #34 +; CHECK: hint #27 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK: hint #31 +; CHECK: hint #31 ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK-V83A: pacib x30, sp -; CHECK-V83A-NEXT: .cfi_negate_ra_state -; CHECK-V83A: retab +; CHECK-V83A: pacibsp +; CHECK-V83A: retab define i32 @leaf_sign_all_b_key_bti(i32 %x) "sign-return-address"="all" "sign-return-address-key"="b_key" "branch-target-enforcement"="true"{ ret i32 %x } ; CHECK-LABEL: @leaf_sign_all_v83_b_key_bti -; CHECK: pacib x30, sp +; CHECK-NOT: hint #34 +; CHECK: pacibsp ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK-NOT: ret -; CHECK: retab -; CHECK-NOT: ret +; CHECK-NOT: ret +; CHECK: retab +; CHECK-NOT: ret define i32 @leaf_sign_all_v83_b_key_bti(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" "branch-target-enforcement"="true" { ret i32 %x } diff --git a/llvm/test/CodeGen/AArch64/wineh-pac.ll b/llvm/test/CodeGen/AArch64/wineh-pac.ll --- a/llvm/test/CodeGen/AArch64/wineh-pac.ll +++ b/llvm/test/CodeGen/AArch64/wineh-pac.ll @@ -45,7 +45,7 @@ ; CHECK-LABEL: func2: ; CHECK-NEXT: .seh_proc func2 ; CHECK-NEXT: // %bb.0: -; CHECK-NEXT: pacib x30, sp +; CHECK-NEXT: pacibsp ; CHECK-NEXT: .seh_pac_sign_lr ; CHECK-NEXT: str x19, [sp, #-16]! ; CHECK-NEXT: .seh_save_reg_x x19, 16