Index: llvm/trunk/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
+++ llvm/trunk/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
@@ -115,6 +115,11 @@
     if (MI->isPHI() || MI->isRegTiedToDefOperand(OpNo) || MI->isPseudo())
       continue;
 
+    // Also, we have to check that the register class of the operand
+    // contains the zero register.
+    if (!MRI->getRegClass(MO.getReg())->contains(ZeroReg))
+      continue;
+
     MO.setReg(ZeroReg);
   }
 
Index: llvm/trunk/test/CodeGen/Mips/micromips-zero-mat-uses.ll
===================================================================
--- llvm/trunk/test/CodeGen/Mips/micromips-zero-mat-uses.ll
+++ llvm/trunk/test/CodeGen/Mips/micromips-zero-mat-uses.ll
@@ -0,0 +1,8 @@
+; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips,+nooddspreg -O0 < %s | FileCheck %s
+
+; CHECK: addiu    $[[R0:[0-9]+]], $zero, 0
+; CHECK: subu16   $2, $[[R0]], ${{[0-9]+}}
+define i32 @foo() {
+  %1 = sub i32 0, undef
+  ret i32 %1
+}