Index: lib/Target/Sparc/AsmParser/SparcAsmParser.cpp =================================================================== --- lib/Target/Sparc/AsmParser/SparcAsmParser.cpp +++ lib/Target/Sparc/AsmParser/SparcAsmParser.cpp @@ -437,7 +437,17 @@ // the imm operand can be either an expression or an immediate. bool IsImm = Inst.getOperand(1).isImm(); - uint64_t ImmValue = IsImm ? MCValOp.getImm() : 0; + int64_t ImmValue = IsImm ? MCValOp.getImm() : 0; + + // A value is "effectively" a signed imm13 if either -4096 <= x < 4096, + // or has all 1s in the upper 20 bits and the word size is 32-bit. + // 20 bits is number of bits splatted by the sign of an imm13. + // A similar concept applies for 64-bit, but technically the SETX synthetic + // instruction must be used, not SET, in that case. + uint32_t Upper20Mask = (0xfffff << 12); + bool IsEffectivelyImm13 = + IsImm && ((-4096 <= ImmValue && ImmValue < 4096) + || ((ImmValue & Upper20Mask) == Upper20Mask && !is64Bit())); const MCExpr *ValExpr; if (IsImm) ValExpr = MCConstantExpr::create(ImmValue, getContext()); @@ -446,7 +456,10 @@ MCOperand PrevReg = MCOperand::createReg(Sparc::G0); - if (!IsImm || (ImmValue & ~0x1fff)) { + // If not just a signed imm13 value, then either we use a 'sethi' with a + // following 'or', or a 'sethi' by itself if there are no more 1 bits. + // In either case, start with the 'sethi'. + if (!IsEffectivelyImm13) { MCInst TmpInst; const MCExpr *Expr = SparcMCExpr::create(SparcMCExpr::VK_Sparc_HI, ValExpr, getContext()); @@ -458,10 +471,23 @@ PrevReg = MCRegOp; } - if (!IsImm || ((ImmValue & 0x1fff) != 0 || ImmValue == 0)) { + // The low bits require touching in 3 cases: + // * A non-immediate value will always require both instructions. + // * An effectively imm13 value needs only an 'or' instruction. + // * Otherwise, an immediate that is not effectively imm13 requires the + // 'or' only if bits remain after clearing the 22 bits that 'sethi' set. + // If the low bits are known zeros, there's nothing to do. + // In the second case, and only in that case, must we NOT clear + // bits of the immediate value via the %lo() assembler function. + // Note also, the 'or' instruction doesn't mind a large value in the case + // where operand to 'set' was 0xfffffzzz - it does exactly what you mean. + if (!IsImm || IsEffectivelyImm13 || (ImmValue & 0x3ff)) { MCInst TmpInst; - const MCExpr *Expr = - SparcMCExpr::create(SparcMCExpr::VK_Sparc_LO, ValExpr, getContext()); + const MCExpr *Expr; + if (IsEffectivelyImm13) + Expr = ValExpr; + else + Expr = SparcMCExpr::create(SparcMCExpr::VK_Sparc_LO, ValExpr, getContext()); TmpInst.setLoc(IDLoc); TmpInst.setOpcode(SP::ORri); TmpInst.addOperand(MCRegOp); Index: test/MC/Sparc/sparc-synthetic-instructions.s =================================================================== --- test/MC/Sparc/sparc-synthetic-instructions.s +++ test/MC/Sparc/sparc-synthetic-instructions.s @@ -27,13 +27,35 @@ ! CHECK: or %g1, %lo(40000), %g1 ! encoding: [0x82,0x10,0b011000AA,A] ! CHECK: ! fixup A - offset: 0, value: %lo(40000), kind: fixup_sparc_lo10 set 40000, %g1 - ! CHECK: mov %lo(1), %g1 ! encoding: [0x82,0x10,0b001000AA,A] - ! CHECK: ! fixup A - offset: 0, value: %lo(1), kind: fixup_sparc_lo10 + ! CHECK: mov 1, %g1 ! encoding: [0x82,0x10,0x20,0x01] set 1, %g1 ! CHECK: sethi %hi(32768), %g1 ! encoding: [0x03,0b00AAAAAA,A,A] ! CHECK: ! fixup A - offset: 0, value: %hi(32768), kind: fixup_sparc_hi22 set 32768, %g1 + ! More tests of 'set' + ! expect a 'sethi' without an 'or' + ! CHECK: sethi %hi(268431360), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] + ! CHECK: ! fixup A - offset: 0, value: %hi(268431360), kind: fixup_sparc_hi22 + set 0x0ffff000, %o1 + + ! CHECK: sethi %hi(268433408), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] + ! CHECK: ! fixup A - offset: 0, value: %hi(268433408), kind: fixup_sparc_hi22 + set 0x0ffff800, %o1 + + ! This is the edge case that uses the lowest of the 22 bits in sethi, + ! still without needing an 'or' + ! CHECK: sethi %hi(268434432), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] + ! CHECK: ! fixup A - offset: 0, value: %hi(268434432), kind: fixup_sparc_hi22 + set 0x0ffffc00, %o1 + + ! Now the synthetic instruction becomes two instructions. + ! CHECK: sethi %hi(2147483647), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] + ! CHECK: ! fixup A - offset: 0, value: %hi(2147483647), kind: fixup_sparc_hi22 + ! CHECK: or %o1, %lo(2147483647), %o1 ! encoding: [0x92,0x12,0b011000AA,A] + ! CHECK: ! fixup A - offset: 0, value: %lo(2147483647), kind: fixup_sparc_lo10 + set 2147483647, %o1 + ! CHECK: xnor %g1, %g0, %g2 ! encoding: [0x84,0x38,0x40,0x00] not %g1, %g2 ! CHECK: xnor %g1, %g0, %g1 ! encoding: [0x82,0x38,0x40,0x00] @@ -143,3 +165,43 @@ wr %i0, %tbr ! CHECK: wr %g0, 5, %tbr ! encoding: [0x81,0x98,0x20,0x05] wr 5, %tbr + +! The following tests exercise 'set' in such a way that its output differs +! depending on whether targeting V8 or V9. +! FIXME: The V9 expected results are suboptimal. The 'or' should not be there. +! +! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s --check-prefix=V8 +! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9 + + ! V8: mov 4294967295, %o1 ! encoding: [0x92,0x10,0x3f,0xff] + ! V9: sethi %hi(4294967295), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] + ! V9: ! fixup A - offset: 0, value: %hi(4294967295), kind: fixup_sparc_hi22 + ! V9: or %o1, %lo(4294967295), %o1 ! encoding: [0x92,0x12,0b011000AA,A] + ! V9: ! fixup A - offset: 0, value: %lo(4294967295), kind: fixup_sparc_lo10 + set 0xffffffff, %o1 + + ! V8: mov 4294967294, %o1 ! encoding: [0x92,0x10,0x3f,0xfe] + ! V9: sethi %hi(4294967294), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] + ! V9: ! fixup A - offset: 0, value: %hi(4294967294), kind: fixup_sparc_hi22 + ! V9: or %o1, %lo(4294967294), %o1 ! encoding: [0x92,0x12,0b011000AA,A] + ! V9: ! fixup A - offset: 0, value: %lo(4294967294), kind: fixup_sparc_lo10 + set 0xfffffffe, %o1 + + ! V8: mov 4294967280, %o1 ! encoding: [0x92,0x10,0x3f,0xf0] + ! V9: sethi %hi(4294967280), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] + ! V9: ! fixup A - offset: 0, value: %hi(4294967280), kind: fixup_sparc_hi22 + ! V9: or %o1, %lo(4294967280), %o1 ! encoding: [0x92,0x12,0b011000AA,A] + ! V9: ! fixup A - offset: 0, value: %lo(4294967280), kind: fixup_sparc_lo10 + set 0xfffffff0, %o1 + + ! V8: mov 4294967040, %o1 ! encoding: [0x92,0x10,0x3f,0x00] + ! V9: sethi %hi(4294967040), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] + ! V9: ! fixup A - offset: 0, value: %hi(4294967040), kind: fixup_sparc_hi22 + ! V9: or %o1, %lo(4294967040), %o1 ! encoding: [0x92,0x12,0b011000AA,A] + ! V9: ! fixup A - offset: 0, value: %lo(4294967040), kind: fixup_sparc_lo10 + set 0xffffff00, %o1 + + ! V8: mov 4294963200, %o1 ! encoding: [0x92,0x10,0x30,0x00] + ! V9: sethi %hi(4294963200), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] + ! V9: ! fixup A - offset: 0, value: %hi(4294963200), kind: fixup_sparc_hi22 + set 0xfffff000, %o1