Index: Makefile.rules =================================================================== --- Makefile.rules +++ Makefile.rules @@ -383,7 +383,7 @@ # If DISABLE_ASSERTIONS=1 is specified (make command line or configured), # then disable assertions by defining the appropriate preprocessor symbols. ifeq ($(DISABLE_ASSERTIONS),1) - CPP.Defines += -DNDEBUG + CPP.Defines += -DNDEBUG -DLLVM_NDEBUG else BuildMode := $(BuildMode)+Asserts CPP.Defines += -D_DEBUG Index: cmake/modules/HandleLLVMOptions.cmake =================================================================== --- cmake/modules/HandleLLVMOptions.cmake +++ cmake/modules/HandleLLVMOptions.cmake @@ -76,6 +76,8 @@ "${flags_var_to_scrub}" "${${flags_var_to_scrub}}") endforeach() endif() +else() + add_definitions( -DLLVM_NDEBUG ) endif() string(TOUPPER "${LLVM_ABI_BREAKING_CHECKS}" uppercase_LLVM_ABI_BREAKING_CHECKS) Index: include/llvm/ADT/IntervalMap.h =================================================================== --- include/llvm/ADT/IntervalMap.h +++ include/llvm/ADT/IntervalMap.h @@ -363,7 +363,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned n = 0; n != Nodes; n++) assert(CurSize[n] == NewSize[n] && "Insufficient element shuffle"); #endif Index: include/llvm/ADT/Statistic.h =================================================================== --- include/llvm/ADT/Statistic.h +++ include/llvm/ADT/Statistic.h @@ -52,7 +52,7 @@ // Allow use of this class as the value itself. operator unsigned() const { return Value; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_STATS) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_STATS) const Statistic &operator=(unsigned Val) { Value = Val; return init(); @@ -146,7 +146,7 @@ return *this; } -#endif // !defined(NDEBUG) || defined(LLVM_ENABLE_STATS) +#endif // !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_STATS) protected: Statistic &init() { Index: include/llvm/Analysis/DominanceFrontier.h =================================================================== --- include/llvm/Analysis/DominanceFrontier.h +++ include/llvm/Analysis/DominanceFrontier.h @@ -102,7 +102,7 @@ void print(raw_ostream &OS) const; /// dump - Dump the dominance frontier to dbgs(). -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void dump() const; #endif }; Index: include/llvm/Analysis/DominanceFrontierImpl.h =================================================================== --- include/llvm/Analysis/DominanceFrontierImpl.h +++ include/llvm/Analysis/DominanceFrontierImpl.h @@ -141,7 +141,7 @@ } } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) template void DominanceFrontierBase::dump() const { print(dbgs()); Index: include/llvm/Analysis/LoopAccessAnalysis.h =================================================================== --- include/llvm/Analysis/LoopAccessAnalysis.h +++ include/llvm/Analysis/LoopAccessAnalysis.h @@ -531,7 +531,7 @@ /// \brief Used to ensure that if the analysis was run with speculating the /// value of symbolic strides, the client queries it with the same assumption. - /// Only used in DEBUG build but we don't want NDEBUG-dependent ABI. + /// Only used in DEBUG build but we don't want LLVM_NDEBUG-dependent ABI. unsigned NumSymbolicStrides; /// \brief Checks existence of store to invariant address inside loop. Index: include/llvm/Analysis/LoopInfoImpl.h =================================================================== --- include/llvm/Analysis/LoopInfoImpl.h +++ include/llvm/Analysis/LoopInfoImpl.h @@ -222,7 +222,7 @@ /// verifyLoop - Verify loop structure template void LoopBase::verifyLoop() const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG assert(!Blocks.empty() && "Loop header is missing"); // Setup for using a depth-first iterator to visit every block in the loop. @@ -525,7 +525,7 @@ } // Verify that blocks are mapped to valid loops. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (auto &Entry : BBMap) { const BlockT *BB = Entry.first; LoopT *L = Entry.second; Index: include/llvm/Analysis/RegionInfo.h =================================================================== --- include/llvm/Analysis/RegionInfo.h +++ include/llvm/Analysis/RegionInfo.h @@ -424,7 +424,7 @@ void print(raw_ostream &OS, bool printTree = true, unsigned level = 0, PrintStyle Style = PrintNone) const; -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) /// @brief Print the region to stderr. void dump() const; #endif @@ -734,7 +734,7 @@ static typename RegionT::PrintStyle printStyle; void print(raw_ostream &OS) const; -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void dump() const; #endif Index: include/llvm/Analysis/RegionInfoImpl.h =================================================================== --- include/llvm/Analysis/RegionInfoImpl.h +++ include/llvm/Analysis/RegionInfoImpl.h @@ -508,7 +508,7 @@ OS.indent(level * 2) << "} \n"; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) template void RegionBase::dump() const { print(dbgs(), true, getDepth(), RegionInfoBase::printStyle); @@ -771,7 +771,7 @@ OS << "End region tree\n"; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) template void RegionInfoBase::dump() const { print(dbgs()); } #endif Index: include/llvm/Analysis/ScalarEvolution.h =================================================================== --- include/llvm/Analysis/ScalarEvolution.h +++ include/llvm/Analysis/ScalarEvolution.h @@ -131,7 +131,7 @@ /// purposes. void print(raw_ostream &OS) const; -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) /// dump - This method is used for debugging. /// void dump() const; Index: include/llvm/Analysis/ScalarEvolutionExpander.h =================================================================== --- include/llvm/Analysis/ScalarEvolutionExpander.h +++ include/llvm/Analysis/ScalarEvolutionExpander.h @@ -83,7 +83,7 @@ typedef IRBuilder BuilderType; BuilderType Builder; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const char *DebugType; #endif @@ -96,12 +96,12 @@ : SE(se), DL(DL), IVName(name), IVIncInsertLoop(nullptr), IVIncInsertPos(nullptr), CanonicalMode(true), LSRMode(false), Builder(se.getContext(), TargetFolder(DL)) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DebugType = ""; #endif } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void setDebugType(const char* s) { DebugType = s; } #endif Index: include/llvm/CodeGen/DIE.h =================================================================== --- include/llvm/CodeGen/DIE.h +++ include/llvm/CodeGen/DIE.h @@ -100,7 +100,7 @@ /// void Emit(const AsmPrinter *AP) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O); void dump(); #endif @@ -143,7 +143,7 @@ void EmitValue(const AsmPrinter *AP, dwarf::Form Form) const; unsigned SizeOf(const AsmPrinter *AP, dwarf::Form Form) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; #endif }; @@ -164,7 +164,7 @@ void EmitValue(const AsmPrinter *AP, dwarf::Form Form) const; unsigned SizeOf(const AsmPrinter *AP, dwarf::Form Form) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; #endif }; @@ -185,7 +185,7 @@ void EmitValue(const AsmPrinter *AP, dwarf::Form Form) const; unsigned SizeOf(const AsmPrinter *AP, dwarf::Form Form) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; #endif }; @@ -203,7 +203,7 @@ void EmitValue(const AsmPrinter *AP, dwarf::Form Form) const; unsigned SizeOf(const AsmPrinter *AP, dwarf::Form Form) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; #endif }; @@ -223,7 +223,7 @@ void EmitValue(const AsmPrinter *AP, dwarf::Form Form) const; unsigned SizeOf(const AsmPrinter *AP, dwarf::Form Form) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; #endif }; @@ -252,7 +252,7 @@ : sizeof(int32_t); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; #endif }; @@ -273,7 +273,7 @@ return 8; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; #endif }; @@ -295,7 +295,7 @@ void EmitValue(const AsmPrinter *AP, dwarf::Form Form) const; unsigned SizeOf(const AsmPrinter *AP, dwarf::Form Form) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; #endif }; @@ -444,7 +444,7 @@ /// unsigned SizeOf(const AsmPrinter *AP) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; void dump() const; #endif @@ -710,7 +710,7 @@ /// gives \a DIEValue::isNone) if no such attribute exists. DIEValue findAttribute(dwarf::Attribute Attribute) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O, unsigned IndentCount = 0) const; void dump(); #endif @@ -747,7 +747,7 @@ void EmitValue(const AsmPrinter *AP, dwarf::Form Form) const; unsigned SizeOf(const AsmPrinter *AP, dwarf::Form Form) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; #endif }; @@ -780,7 +780,7 @@ void EmitValue(const AsmPrinter *AP, dwarf::Form Form) const; unsigned SizeOf(const AsmPrinter *AP, dwarf::Form Form) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const; #endif }; Index: include/llvm/CodeGen/FunctionLoweringInfo.h =================================================================== --- include/llvm/CodeGen/FunctionLoweringInfo.h +++ include/llvm/CodeGen/FunctionLoweringInfo.h @@ -111,7 +111,7 @@ /// MBB - The current insert position inside the current block. MachineBasicBlock::iterator InsertPt; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG SmallPtrSet CatchInfoLost; SmallPtrSet CatchInfoFound; #endif Index: include/llvm/CodeGen/LiveInterval.h =================================================================== --- include/llvm/CodeGen/LiveInterval.h +++ include/llvm/CodeGen/LiveInterval.h @@ -561,7 +561,7 @@ /// \brief Walk the range and assert if any invariants fail to hold. /// /// Note that this is a no-op when asserts are disabled. -#ifdef NDEBUG +#ifdef LLVM_NDEBUG void verify() const {} #else void verify() const; @@ -734,7 +734,7 @@ /// \brief Walks the interval and assert if any invariants fail to hold. /// /// Note that this is a no-op when asserts are disabled. -#ifdef NDEBUG +#ifdef LLVM_NDEBUG void verify(const MachineRegisterInfo *MRI = nullptr) const {} #else void verify(const MachineRegisterInfo *MRI = nullptr) const; Index: include/llvm/CodeGen/LiveIntervalUnion.h =================================================================== --- include/llvm/CodeGen/LiveIntervalUnion.h +++ include/llvm/CodeGen/LiveIntervalUnion.h @@ -24,7 +24,7 @@ class TargetRegisterInfo; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // forward declaration template class SparseBitVector; typedef SparseBitVector<128> LiveVirtRegBitSet; @@ -101,7 +101,7 @@ // Print union, using TRI to translate register names void print(raw_ostream &OS, const TargetRegisterInfo *TRI) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Verify the live intervals in this union and add them to the visited set. void verify(LiveVirtRegBitSet& VisitedVRegs); #endif Index: include/llvm/CodeGen/MachineRegisterInfo.h =================================================================== --- include/llvm/CodeGen/MachineRegisterInfo.h +++ include/llvm/CodeGen/MachineRegisterInfo.h @@ -545,7 +545,7 @@ /// preserve conservative kill flag information. void clearKillFlags(unsigned Reg) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void dumpUses(unsigned RegNo) const; #endif Index: include/llvm/CodeGen/MachineScheduler.h =================================================================== --- include/llvm/CodeGen/MachineScheduler.h +++ include/llvm/CodeGen/MachineScheduler.h @@ -241,7 +241,7 @@ const SUnit *NextClusterPred; const SUnit *NextClusterSucc; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// The number of instructions scheduled so far. Used to cut off the /// scheduler at the point determined by misched-cutoff. unsigned NumInstrsScheduled; @@ -253,7 +253,7 @@ /*RemoveKillFlags=*/IsPostRA, C->LIS), AA(C->AA), SchedImpl(std::move(S)), Topo(SUnits, &ExitSU), CurrentTop(), CurrentBottom(), NextClusterPred(nullptr), NextClusterSucc(nullptr) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG NumInstrsScheduled = 0; #endif } @@ -620,7 +620,7 @@ // scheduled instruction. SmallVector ReservedCycles; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Remember the greatest possible stall as an upper bound on the number of // times we should retry the pending queue because of a hazard. unsigned MaxObservedStall; @@ -731,7 +731,7 @@ /// available instruction, or NULL if there are multiple candidates. SUnit *pickOnlyChoice(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void dumpScheduledState(); #endif }; @@ -748,7 +748,7 @@ ResourceReduce, ResourceDemand, BotHeightReduce, BotPathReduce, TopDepthReduce, TopPathReduce, NextDefUse, NodeOrder}; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static const char *getReasonStr(GenericSchedulerBase::CandReason Reason); #endif @@ -834,7 +834,7 @@ void setPolicy(CandPolicy &Policy, bool IsPostRA, SchedBoundary &CurrZone, SchedBoundary *OtherZone); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void traceCandidate(const SchedCandidate &Cand); #endif }; Index: include/llvm/CodeGen/PBQP/ReductionRules.h =================================================================== --- include/llvm/CodeGen/PBQP/ReductionRules.h +++ include/llvm/CodeGen/PBQP/ReductionRules.h @@ -144,7 +144,7 @@ // TODO: Try to normalize newly added/modified edge. } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Does this Cost vector have any register options ? template bool hasRegisterOptions(const VectorT &V) { @@ -189,7 +189,7 @@ RawVector v = G.getNodeCosts(NId); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Although a conservatively allocatable node can be allocated to a register, // spilling it may provide a lower cost solution. Assert here that spilling // is done by choice, not because there were no register available. Index: include/llvm/CodeGen/RegAllocPBQP.h =================================================================== --- include/llvm/CodeGen/RegAllocPBQP.h +++ include/llvm/CodeGen/RegAllocPBQP.h @@ -193,7 +193,7 @@ NodeMetadata() : RS(Unprocessed), NumOpts(0), DeniedOpts(0), OptUnsafeEdges(nullptr), VReg(0) -#ifndef NDEBUG +#ifndef LLVM_NDEBUG , everConservativelyAllocatable(false) #endif {} @@ -204,7 +204,7 @@ : RS(Other.RS), NumOpts(Other.NumOpts), DeniedOpts(Other.DeniedOpts), OptUnsafeEdges(new unsigned[NumOpts]), VReg(Other.VReg), AllowedRegs(Other.AllowedRegs) -#ifndef NDEBUG +#ifndef LLVM_NDEBUG , everConservativelyAllocatable(Other.everConservativelyAllocatable) #endif { @@ -220,7 +220,7 @@ : RS(Other.RS), NumOpts(Other.NumOpts), DeniedOpts(Other.DeniedOpts), OptUnsafeEdges(std::move(Other.OptUnsafeEdges)), VReg(Other.VReg), AllowedRegs(std::move(Other.AllowedRegs)) -#ifndef NDEBUG +#ifndef LLVM_NDEBUG , everConservativelyAllocatable(Other.everConservativelyAllocatable) #endif {} @@ -236,7 +236,7 @@ OptUnsafeEdges.get()); VReg = Other.VReg; AllowedRegs = Other.AllowedRegs; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG everConservativelyAllocatable = Other.everConservativelyAllocatable; #endif return *this; @@ -251,7 +251,7 @@ OptUnsafeEdges = std::move(Other.OptUnsafeEdges); VReg = Other.VReg; AllowedRegs = std::move(Other.AllowedRegs); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG everConservativelyAllocatable = Other.everConservativelyAllocatable; #endif return *this; @@ -275,7 +275,7 @@ assert(RS >= this->RS && "A node's reduction state can not be downgraded"); this->RS = RS; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Remember this state to assert later that a non-infinite register // option was available. if (RS == ConservativelyAllocatable) @@ -306,7 +306,7 @@ &OptUnsafeEdges[NumOpts]); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool wasConservativelyAllocatable() const { return everConservativelyAllocatable; } @@ -320,7 +320,7 @@ unsigned VReg; GraphMetadata::AllowedRegVecRef AllowedRegs; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool everConservativelyAllocatable; #endif }; Index: include/llvm/CodeGen/ScheduleDAG.h =================================================================== --- include/llvm/CodeGen/ScheduleDAG.h +++ include/llvm/CodeGen/ScheduleDAG.h @@ -566,7 +566,7 @@ SUnit EntrySU; // Special node for the region entry. SUnit ExitSU; // Special node for the region exit. -#ifdef NDEBUG +#ifdef LLVM_NDEBUG static const bool StressSched = false; #else bool StressSched; @@ -605,7 +605,7 @@ /// the ScheduleDAG. virtual void addCustomGraphFeatures(GraphWriter &) const {} -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// VerifyScheduledDAG - Verify that all SUnits were scheduled and that /// their state is consistent. Return the number of scheduled SUnits. unsigned VerifyScheduledDAG(bool isBottomUp); Index: include/llvm/CodeGen/ScheduleDAGInstrs.h =================================================================== --- include/llvm/CodeGen/ScheduleDAGInstrs.h +++ include/llvm/CodeGen/ScheduleDAGInstrs.h @@ -257,7 +257,7 @@ /// newSUnit - Creates a new SUnit and return a ptr to it. inline SUnit *ScheduleDAGInstrs::newSUnit(MachineInstr *MI) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const SUnit *Addr = SUnits.empty() ? nullptr : &SUnits[0]; #endif SUnits.emplace_back(MI, (unsigned)SUnits.size()); Index: include/llvm/CodeGen/ScoreboardHazardRecognizer.h =================================================================== --- include/llvm/CodeGen/ScoreboardHazardRecognizer.h +++ include/llvm/CodeGen/ScoreboardHazardRecognizer.h @@ -83,7 +83,7 @@ void dump() const; }; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Support for tracing ScoreboardHazardRecognizer as a component within // another module. Follows the current thread-unsafe model of tracing. static const char *DebugType; Index: include/llvm/CodeGen/SelectionDAG.h =================================================================== --- include/llvm/CodeGen/SelectionDAG.h +++ include/llvm/CodeGen/SelectionDAG.h @@ -292,7 +292,7 @@ void viewGraph(const std::string &Title); void viewGraph(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG std::map NodeGraphAttrs; #endif Index: include/llvm/CodeGen/TargetSchedule.h =================================================================== --- include/llvm/CodeGen/TargetSchedule.h +++ include/llvm/CodeGen/TargetSchedule.h @@ -107,7 +107,7 @@ return SchedModel.getProcResource(PIdx); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const char *getResourceName(unsigned PIdx) const { if (!PIdx) return "MOps"; Index: include/llvm/IR/DebugInfoMetadata.h =================================================================== --- include/llvm/IR/DebugInfoMetadata.h +++ include/llvm/IR/DebugInfoMetadata.h @@ -845,7 +845,7 @@ /// of its movement if necessary. /// @{ void replaceElements(DINodeArray Elements) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (DINode *Op : getElements()) assert(std::find(Elements->op_begin(), Elements->op_end(), Op) && "Lost a member during member list replacement"); Index: include/llvm/IR/Instructions.h =================================================================== --- include/llvm/IR/Instructions.h +++ include/llvm/IR/Instructions.h @@ -1120,7 +1120,7 @@ ) : CmpInst(makeCmpResultType(LHS->getType()), Instruction::ICmp, pred, LHS, RHS, NameStr, InsertBefore) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG AssertOK(); #endif } @@ -1135,7 +1135,7 @@ ) : CmpInst(makeCmpResultType(LHS->getType()), Instruction::ICmp, pred, LHS, RHS, NameStr, &InsertAtEnd) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG AssertOK(); #endif } @@ -1148,7 +1148,7 @@ const Twine &NameStr = "" ///< Name of the instruction ) : CmpInst(makeCmpResultType(LHS->getType()), Instruction::ICmp, pred, LHS, RHS, NameStr) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG AssertOK(); #endif } Index: include/llvm/IR/Statepoint.h =================================================================== --- include/llvm/IR/Statepoint.h +++ include/llvm/IR/Statepoint.h @@ -257,7 +257,7 @@ return nullptr; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// Asserts if this statepoint is malformed. Common cases for failure /// include incorrect length prefixes for variable length sections or /// illegal values for parameters. Index: include/llvm/IR/ValueHandle.h =================================================================== --- include/llvm/IR/ValueHandle.h +++ include/llvm/IR/ValueHandle.h @@ -191,13 +191,13 @@ /// class turns into a trivial wrapper around a pointer. template class AssertingVH -#ifndef NDEBUG +#ifndef LLVM_NDEBUG : public ValueHandleBase #endif { friend struct DenseMapInfo >; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Value *getRawValPtr() const { return ValueHandleBase::getValPtr(); } void setRawValPtr(Value *P) { ValueHandleBase::operator=(P); } #else @@ -213,7 +213,7 @@ void setValPtr(ValueTy *P) { setRawValPtr(GetAsValue(P)); } public: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG AssertingVH() : ValueHandleBase(Assert) {} AssertingVH(ValueTy *P) : ValueHandleBase(Assert, GetAsValue(P)) {} AssertingVH(const AssertingVH &RHS) : ValueHandleBase(Assert, RHS) {} @@ -263,7 +263,7 @@ template struct isPodLike > { -#ifdef NDEBUG +#ifdef LLVM_NDEBUG static const bool value = true; #else static const bool value = false; Index: include/llvm/MC/MCSchedule.h =================================================================== --- include/llvm/MC/MCSchedule.h +++ include/llvm/MC/MCSchedule.h @@ -24,7 +24,7 @@ /// Define a kind of processor resource that will be modeled by the scheduler. struct MCProcResourceDesc { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const char *Name; #endif unsigned NumUnits; // Number of resource of this kind @@ -102,7 +102,7 @@ static const unsigned short InvalidNumMicroOps = UINT16_MAX; static const unsigned short VariantNumMicroOps = UINT16_MAX - 1; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const char* Name; #endif unsigned short NumMicroOps; Index: include/llvm/MC/MachineLocation.h =================================================================== --- include/llvm/MC/MachineLocation.h +++ include/llvm/MC/MachineLocation.h @@ -69,7 +69,7 @@ Offset = O; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void dump(); #endif }; Index: include/llvm/Support/Compiler.h =================================================================== --- include/llvm/Support/Compiler.h +++ include/llvm/Support/Compiler.h @@ -340,7 +340,7 @@ /// \brief Mark debug helper function definitions like dump() that should not be /// stripped from debug builds. // FIXME: Move this to a private config.h as it's not usable in public headers. -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) #define LLVM_DUMP_METHOD LLVM_ATTRIBUTE_NOINLINE LLVM_ATTRIBUTE_USED #else #define LLVM_DUMP_METHOD LLVM_ATTRIBUTE_NOINLINE Index: include/llvm/Support/Debug.h =================================================================== --- include/llvm/Support/Debug.h +++ include/llvm/Support/Debug.h @@ -31,7 +31,7 @@ namespace llvm { class raw_ostream; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// DebugFlag - This boolean is set to true if the '-debug' command line option /// is specified. This should probably not be referenced directly, instead, use /// the DEBUG macro below. Index: include/llvm/Support/ErrorHandling.h =================================================================== --- include/llvm/Support/ErrorHandling.h +++ include/llvm/Support/ErrorHandling.h @@ -87,14 +87,14 @@ } /// Marks that the current location is not supposed to be reachable. -/// In !NDEBUG builds, prints the message and location info to stderr. -/// In NDEBUG builds, becomes an optimizer hint that the current location +/// In !LLVM_NDEBUG builds, prints the message and location info to stderr. +/// In LLVM_NDEBUG builds, becomes an optimizer hint that the current location /// is not supposed to be reachable. On compilers that don't support /// such hints, prints a reduced message instead. /// /// Use this instead of assert(0). It conveys intent more clearly and /// allows compilers to omit some unnecessary code. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG #define llvm_unreachable(msg) \ ::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__) #elif defined(LLVM_BUILTIN_UNREACHABLE) Index: include/llvm/Support/UnicodeCharRanges.h =================================================================== --- include/llvm/Support/UnicodeCharRanges.h +++ include/llvm/Support/UnicodeCharRanges.h @@ -50,7 +50,7 @@ /// the UnicodeCharSet instance, and should not change. Array is validated by /// the constructor, so it makes sense to create as few UnicodeCharSet /// instances per each array of ranges, as possible. -#ifdef NDEBUG +#ifdef LLVM_NDEBUG LLVM_CONSTEXPR UnicodeCharSet(CharRanges Ranges) : Ranges(Ranges) {} #else UnicodeCharSet(CharRanges Ranges) : Ranges(Ranges) { Index: include/llvm/Support/Valgrind.h =================================================================== --- include/llvm/Support/Valgrind.h +++ include/llvm/Support/Valgrind.h @@ -20,7 +20,7 @@ #include "llvm/Support/Compiler.h" #include -#if LLVM_ENABLE_THREADS != 0 && !defined(NDEBUG) +#if LLVM_ENABLE_THREADS != 0 && !defined(LLVM_NDEBUG) // tsan (Thread Sanitizer) is a valgrind-based tool that detects these exact // functions by name. extern "C" { @@ -40,7 +40,7 @@ // Otherwise valgrind may continue to execute the old version of the code. void ValgrindDiscardTranslations(const void *Addr, size_t Len); -#if LLVM_ENABLE_THREADS != 0 && !defined(NDEBUG) +#if LLVM_ENABLE_THREADS != 0 && !defined(LLVM_NDEBUG) // Thread Sanitizer is a valgrind tool that finds races in code. // See http://code.google.com/p/data-race-test/wiki/DynamicAnnotations . Index: lib/Analysis/AliasSetTracker.cpp =================================================================== --- lib/Analysis/AliasSetTracker.cpp +++ lib/Analysis/AliasSetTracker.cpp @@ -607,7 +607,7 @@ OS << "\n"; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void AliasSet::dump() const { print(dbgs()); } void AliasSetTracker::dump() const { print(dbgs()); } #endif Index: lib/Analysis/AssumptionCache.cpp =================================================================== --- lib/Analysis/AssumptionCache.cpp +++ lib/Analysis/AssumptionCache.cpp @@ -50,7 +50,7 @@ AssumeHandles.push_back(CI); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG assert(CI->getParent() && "Cannot register @llvm.assume call not in a basic block"); assert(&F == CI->getParent()->getParent() && @@ -113,7 +113,7 @@ } void AssumptionCacheTracker::verifyAnalysis() const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG SmallPtrSet AssumptionSet; for (const auto &I : AssumptionCaches) { for (auto &VH : I.second->assumptions()) Index: lib/Analysis/BlockFrequencyInfo.cpp =================================================================== --- lib/Analysis/BlockFrequencyInfo.cpp +++ lib/Analysis/BlockFrequencyInfo.cpp @@ -26,7 +26,7 @@ #define DEBUG_TYPE "block-freq" -#ifndef NDEBUG +#ifndef LLVM_NDEBUG enum GVDAGType { GVDT_None, GVDT_Fraction, @@ -119,7 +119,7 @@ if (!BFI) BFI.reset(new ImplType); BFI->calculate(F, BPI, LI); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (ViewBlockFreqPropagationDAG != GVDT_None) view(); #endif @@ -133,12 +133,12 @@ /// rendered using dot. void BlockFrequencyInfo::view() const { // This code is only for debugging. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG ViewGraph(const_cast(this), "BlockFrequencyDAGs"); #else errs() << "BlockFrequencyInfo::view is only available in debug builds on " "systems with Graphviz or gv!\n"; -#endif // NDEBUG +#endif // LLVM_NDEBUG } const Function *BlockFrequencyInfo::getFunction() const { Index: lib/Analysis/BlockFrequencyInfoImpl.cpp =================================================================== --- lib/Analysis/BlockFrequencyInfoImpl.cpp +++ lib/Analysis/BlockFrequencyInfoImpl.cpp @@ -271,7 +271,7 @@ BlockNode Resolved = Working[Succ.Index].getResolvedNode(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG auto debugSuccessor = [&](const char *Type) { dbgs() << " =>" << " [" << Type << "] weight = " << Weight; @@ -378,7 +378,7 @@ Loop.IsPackaged = true; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static void debugAssign(const BlockFrequencyInfoImplBase &BFI, const DitheringDistributer &D, const BlockNode &T, const BlockMass &M, const char *Desc) { Index: lib/Analysis/CFG.cpp =================================================================== --- lib/Analysis/CFG.cpp +++ lib/Analysis/CFG.cpp @@ -71,7 +71,7 @@ /// successor. unsigned llvm::GetSuccessorNumber(BasicBlock *BB, BasicBlock *Succ) { TerminatorInst *Term = BB->getTerminator(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned e = Term->getNumSuccessors(); #endif for (unsigned i = 0; ; ++i) { Index: lib/Analysis/DependenceAnalysis.cpp =================================================================== --- lib/Analysis/DependenceAnalysis.cpp +++ lib/Analysis/DependenceAnalysis.cpp @@ -2522,7 +2522,7 @@ Bound[K].Direction = Dependence::DVEntry::ALL; Bound[K].DirSet = Dependence::DVEntry::NONE; findBoundsALL(A, B, Bound, K); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DEBUG(dbgs() << "\t " << K << '\t'); if (Bound[K].Lower[Dependence::DVEntry::ALL]) DEBUG(dbgs() << *Bound[K].Lower[Dependence::DVEntry::ALL] << '\t'); @@ -2593,7 +2593,7 @@ for (unsigned K = 1; K <= CommonLevels; ++K) { if (Loops[K]) { Bound[K].DirSet |= Bound[K].Direction; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG switch (Bound[K].Direction) { case Dependence::DVEntry::LT: DEBUG(dbgs() << " <"); @@ -2623,7 +2623,7 @@ findBoundsLT(A, B, Bound, Level); findBoundsGT(A, B, Bound, Level); findBoundsEQ(A, B, Bound, Level); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DEBUG(dbgs() << "\tBound for level = " << Level << '\n'); DEBUG(dbgs() << "\t <\t"); if (Bound[Level].Lower[Dependence::DVEntry::LT]) @@ -2910,7 +2910,7 @@ Subscript = AddRec->getStart(); } Constant = Subscript; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DEBUG(dbgs() << "\tCoefficient Info\n"); for (unsigned K = 1; K <= MaxLevels; ++K) { DEBUG(dbgs() << "\t " << K << "\t" << *CI[K].Coeff); @@ -3318,7 +3318,7 @@ //===----------------------------------------------------------------------===// -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // For debugging purposes, dump a small bit vector to dbgs(). static void dumpSmallBitVector(SmallBitVector &BV) { dbgs() << "{"; Index: lib/Analysis/DominanceFrontier.cpp =================================================================== --- lib/Analysis/DominanceFrontier.cpp +++ lib/Analysis/DominanceFrontier.cpp @@ -50,7 +50,7 @@ Base.print(OS); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void DominanceFrontier::dump() const { print(dbgs()); } Index: lib/Analysis/IPA/CallGraph.cpp =================================================================== --- lib/Analysis/IPA/CallGraph.cpp +++ lib/Analysis/IPA/CallGraph.cpp @@ -39,7 +39,7 @@ // Reset all node's use counts to zero before deleting them to prevent an // assertion from firing. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (auto &I : FunctionMap) I.second->allReferencesDropped(); #endif @@ -118,7 +118,7 @@ CN->print(OS); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void CallGraph::dump() const { print(dbgs()); } #endif @@ -188,7 +188,7 @@ OS << '\n'; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void CallGraphNode::dump() const { print(dbgs()); } #endif @@ -289,6 +289,6 @@ G->print(OS); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void CallGraphWrapperPass::dump() const { print(dbgs(), nullptr); } #endif Index: lib/Analysis/IPA/CallGraphSCCPass.cpp =================================================================== --- lib/Analysis/IPA/CallGraphSCCPass.cpp +++ lib/Analysis/IPA/CallGraphSCCPass.cpp @@ -128,7 +128,7 @@ // After the CGSCCPass is done, when assertions are enabled, use // RefreshCallGraph to verify that the callgraph was correctly updated. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (Changed) RefreshCallGraph(CurSCC, CG, true); #endif @@ -399,7 +399,7 @@ // otherwise avoid constructing this string as it is expensive. if (isPassDebuggingExecutionsOrMore()) { std::string Functions; - #ifndef NDEBUG + #ifndef LLVM_NDEBUG raw_string_ostream OS(Functions); for (CallGraphSCC::iterator I = CurSCC.begin(), E = CurSCC.end(); I != E; ++I) { Index: lib/Analysis/IPA/InlineCost.cpp =================================================================== --- lib/Analysis/IPA/InlineCost.cpp +++ lib/Analysis/IPA/InlineCost.cpp @@ -1298,7 +1298,7 @@ return Cost < Threshold; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) /// \brief Dump stats about this call's analysis. void CallAnalyzer::dump() { #define DEBUG_PRINT_STAT(x) dbgs() << " " #x ": " << x << "\n" Index: lib/Analysis/IVUsers.cpp =================================================================== --- lib/Analysis/IVUsers.cpp +++ lib/Analysis/IVUsers.cpp @@ -311,7 +311,7 @@ } } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void IVUsers::dump() const { print(dbgs()); } Index: lib/Analysis/LazyCallGraph.cpp =================================================================== --- lib/Analysis/LazyCallGraph.cpp +++ lib/Analysis/LazyCallGraph.cpp @@ -509,7 +509,7 @@ IsLeafSCC = false; } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (!ResultSCCs.empty()) assert(!IsLeafSCC && "This SCC cannot be a leaf as we have split out new " "SCCs by removing this edge."); Index: lib/Analysis/LoopAccessAnalysis.cpp =================================================================== --- lib/Analysis/LoopAccessAnalysis.cpp +++ lib/Analysis/LoopAccessAnalysis.cpp @@ -1779,7 +1779,7 @@ LoopAccessAnalysis::getInfo(Loop *L, const ValueToValueMap &Strides) { auto &LAI = LoopAccessInfoMap[L]; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG assert((!LAI || LAI->NumSymbolicStrides == Strides.size()) && "Symbolic strides changed for loop"); #endif @@ -1788,7 +1788,7 @@ const DataLayout &DL = L->getHeader()->getModule()->getDataLayout(); LAI = llvm::make_unique(L, SE, DL, TLI, AA, DT, LI, Strides); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG LAI->NumSymbolicStrides = Strides.size(); #endif } Index: lib/Analysis/LoopInfo.cpp =================================================================== --- lib/Analysis/LoopInfo.cpp +++ lib/Analysis/LoopInfo.cpp @@ -400,7 +400,7 @@ return nullptr; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void Loop::dump() const { print(dbgs()); } Index: lib/Analysis/MemoryDependenceAnalysis.cpp =================================================================== --- lib/Analysis/MemoryDependenceAnalysis.cpp +++ lib/Analysis/MemoryDependenceAnalysis.cpp @@ -714,7 +714,7 @@ return LocalCache; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// AssertSorted - This method is used when -debug is specified to verify that /// cache arrays are properly kept sorted. static void AssertSorted(MemoryDependenceAnalysis::NonLocalDepInfo &Cache, @@ -1631,7 +1631,7 @@ /// in our internal data structures. This function verifies by asserting in /// debug builds. void MemoryDependenceAnalysis::verifyRemoved(Instruction *D) const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (LocalDepMapType::const_iterator I = LocalDeps.begin(), E = LocalDeps.end(); I != E; ++I) { assert(I->first != D && "Inst occurs in data structures"); Index: lib/Analysis/PHITransAddr.cpp =================================================================== --- lib/Analysis/PHITransAddr.cpp +++ lib/Analysis/PHITransAddr.cpp @@ -41,7 +41,7 @@ return false; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void PHITransAddr::dump() const { if (!Addr) { dbgs() << "PHITransAddr: null\n"; Index: lib/Analysis/RegionInfo.cpp =================================================================== --- lib/Analysis/RegionInfo.cpp +++ lib/Analysis/RegionInfo.cpp @@ -145,7 +145,7 @@ RI.print(OS); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void RegionInfoPass::dump() const { RI.dump(); } Index: lib/Analysis/ScalarEvolution.cpp =================================================================== --- lib/Analysis/ScalarEvolution.cpp +++ lib/Analysis/ScalarEvolution.cpp @@ -132,7 +132,7 @@ // Implementation of the SCEV class. // -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void SCEV::dump() const { print(dbgs()); dbgs() << '\n'; @@ -1973,7 +1973,7 @@ "only nuw or nsw allowed"); assert(!Ops.empty() && "Cannot get empty add!"); if (Ops.size() == 1) return Ops[0]; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Type *ETy = getEffectiveSCEVType(Ops[0]->getType()); for (unsigned i = 1, e = Ops.size(); i != e; ++i) assert(getEffectiveSCEVType(Ops[i]->getType()) == ETy && @@ -2381,7 +2381,7 @@ "only nuw or nsw allowed"); assert(!Ops.empty() && "Cannot get empty mul!"); if (Ops.size() == 1) return Ops[0]; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Type *ETy = getEffectiveSCEVType(Ops[0]->getType()); for (unsigned i = 1, e = Ops.size(); i != e; ++i) assert(getEffectiveSCEVType(Ops[i]->getType()) == ETy && @@ -2833,7 +2833,7 @@ ScalarEvolution::getAddRecExpr(SmallVectorImpl &Operands, const Loop *L, SCEV::NoWrapFlags Flags) { if (Operands.size() == 1) return Operands[0]; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Type *ETy = getEffectiveSCEVType(Operands[0]->getType()); for (unsigned i = 1, e = Operands.size(); i != e; ++i) assert(getEffectiveSCEVType(Operands[i]->getType()) == ETy && @@ -2989,7 +2989,7 @@ ScalarEvolution::getSMaxExpr(SmallVectorImpl &Ops) { assert(!Ops.empty() && "Cannot get empty smax!"); if (Ops.size() == 1) return Ops[0]; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Type *ETy = getEffectiveSCEVType(Ops[0]->getType()); for (unsigned i = 1, e = Ops.size(); i != e; ++i) assert(getEffectiveSCEVType(Ops[i]->getType()) == ETy && @@ -3093,7 +3093,7 @@ ScalarEvolution::getUMaxExpr(SmallVectorImpl &Ops) { assert(!Ops.empty() && "Cannot get empty umax!"); if (Ops.size() == 1) return Ops[0]; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Type *ETy = getEffectiveSCEVType(Ops[0]->getType()); for (unsigned i = 1, e = Ops.size(); i != e; ++i) assert(getEffectiveSCEVType(Ops[i]->getType()) == ETy && @@ -6702,7 +6702,7 @@ bool &Increasing) { bool Result = isMonotonicPredicateImpl(LHS, Pred, Increasing); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Verify an invariant: inverting the predicate should turn a monotonically // increasing change to a monotonically decreasing one, and vice versa. bool IncreasingSwapped; Index: lib/Analysis/TargetLibraryInfo.cpp =================================================================== --- lib/Analysis/TargetLibraryInfo.cpp +++ lib/Analysis/TargetLibraryInfo.cpp @@ -53,13 +53,13 @@ /// target triple gets a sane set of defaults. static void initialize(TargetLibraryInfoImpl &TLI, const Triple &T, const char *const *StandardNames) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Verify that the StandardNames array is in alphabetical order. for (unsigned F = 1; F < LibFunc::NumLibFuncs; ++F) { if (strcmp(StandardNames[F-1], StandardNames[F]) >= 0) llvm_unreachable("TargetLibraryInfoImpl function names must be sorted"); } -#endif // !NDEBUG +#endif // !LLVM_NDEBUG // There are no library implementations of mempcy and memset for AMD gpus and // these can be difficult to lower in the backend. Index: lib/Analysis/Trace.cpp =================================================================== --- lib/Analysis/Trace.cpp +++ lib/Analysis/Trace.cpp @@ -42,7 +42,7 @@ O << "; Trace parent function: \n" << *F; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) /// dump - Debugger convenience method; writes trace to standard error /// output stream. /// Index: lib/AsmParser/LLParser.cpp =================================================================== --- lib/AsmParser/LLParser.cpp +++ lib/AsmParser/LLParser.cpp @@ -3718,7 +3718,7 @@ } /// ParseDIModule: -/// ::= !DIModule(scope: !0, name: "SomeModule", configMacros: "-DNDEBUG", +/// ::= !DIModule(scope: !0, name: "SomeModule", configMacros: "-DLLVM_NDEBUG", /// includePath: "/usr/include", isysroot: "/") bool LLParser::ParseDIModule(MDNode *&Result, bool IsDistinct) { #define VISIT_MD_FIELDS(OPTIONAL, REQUIRED) \ Index: lib/Bitcode/Writer/BitcodeWriter.cpp =================================================================== --- lib/Bitcode/Writer/BitcodeWriter.cpp +++ lib/Bitcode/Writer/BitcodeWriter.cpp @@ -1617,7 +1617,7 @@ Record.push_back(VE.getValueID(BA->getFunction())); Record.push_back(VE.getGlobalBasicBlockID(BA->getBasicBlock())); } else { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG C->dump(); #endif llvm_unreachable("Unknown constant!"); Index: lib/CodeGen/AggressiveAntiDepBreaker.cpp =================================================================== --- lib/CodeGen/AggressiveAntiDepBreaker.cpp +++ lib/CodeGen/AggressiveAntiDepBreaker.cpp @@ -583,7 +583,7 @@ return false; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // If DebugDiv > 0 then only rename (renamecnt % DebugDiv) == DebugMod if (DebugDiv > 0) { static int renamecnt = 0; @@ -759,7 +759,7 @@ CriticalPathMI = CriticalPathSU->getInstr(); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DEBUG(dbgs() << "\n===== Aggressive anti-dependency breaking\n"); DEBUG(dbgs() << "Available regs:"); for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { Index: lib/CodeGen/AllocationOrder.cpp =================================================================== --- lib/CodeGen/AllocationOrder.cpp +++ lib/CodeGen/AllocationOrder.cpp @@ -46,7 +46,7 @@ dbgs() << '\n'; } }); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned I = 0, E = Hints.size(); I != E; ++I) assert(std::find(Order.begin(), Order.end(), Hints[I]) != Order.end() && "Target hint is outside allocation order."); Index: lib/CodeGen/AsmPrinter/DIE.cpp =================================================================== --- lib/CodeGen/AsmPrinter/DIE.cpp +++ lib/CodeGen/AsmPrinter/DIE.cpp @@ -86,7 +86,7 @@ AP->EmitULEB128(0, "EOM(2)"); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIEAbbrev::print(raw_ostream &O) { O << "Abbreviation @" << format("0x%lx", (long)(intptr_t)this) @@ -144,7 +144,7 @@ return DIEValue(); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static void printValues(raw_ostream &O, const DIEValueList &Values, StringRef Type, unsigned Size, unsigned IndentCount) { O << Type << ": Size: " << Size << "\n"; @@ -213,7 +213,7 @@ llvm_unreachable("Unknown DIE kind"); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIEValue::print(raw_ostream &O) const { switch (Ty) { case isNone: @@ -303,7 +303,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIEInteger::print(raw_ostream &O) const { O << "Int: " << (int64_t)Integer << " 0x"; O.write_hex(Integer); @@ -329,7 +329,7 @@ return AP->getPointerSize(); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIEExpr::print(raw_ostream &O) const { O << "Expr: " << *Expr; } #endif @@ -355,7 +355,7 @@ return AP->getPointerSize(); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIELabel::print(raw_ostream &O) const { O << "Lbl: " << Label->getName(); } #endif @@ -378,7 +378,7 @@ return AP->getPointerSize(); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIEDelta::print(raw_ostream &O) const { O << "Del: " << LabelHi->getName() << "-" << LabelLo->getName(); } @@ -431,7 +431,7 @@ return DIEInteger(S.getOffset()).SizeOf(AP, Form); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIEString::print(raw_ostream &O) const { O << "String: " << S.getString(); } @@ -476,7 +476,7 @@ return sizeof(int32_t); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIEEntry::print(raw_ostream &O) const { O << format("Die: 0x%lx", (long)(intptr_t)&Entry); } @@ -491,7 +491,7 @@ Asm->OutStreamer->EmitIntValue(Unit->getTypeSignature(), 8); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIETypeSignature::print(raw_ostream &O) const { O << format("Type Unit: 0x%lx", Unit->getTypeSignature()); } @@ -543,7 +543,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIELoc::print(raw_ostream &O) const { printValues(O, *this, "ExprLoc", Size, 5); } @@ -591,7 +591,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIEBlock::print(raw_ostream &O) const { printValues(O, *this, "Blk", Size, 5); } @@ -617,6 +617,6 @@ AP->emitDwarfSymbolReference(Label, /*ForceOffset*/ DD->useSplitDwarf()); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DIELocList::print(raw_ostream &O) const { O << "LocList: " << Index; } #endif Index: lib/CodeGen/AsmPrinter/DwarfAccelTable.h =================================================================== --- lib/CodeGen/AsmPrinter/DwarfAccelTable.h +++ lib/CodeGen/AsmPrinter/DwarfAccelTable.h @@ -95,7 +95,7 @@ hash_function(dwarf::DW_hash_function_djb), bucket_count(0), hashes_count(0), header_data_len(data_len) {} -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) { O << "Magic: " << format("0x%x", magic) << "\n" << "Version: " << version << "\n" @@ -128,7 +128,7 @@ LLVM_CONSTEXPR Atom(uint16_t type, uint16_t form) : type(type), form(form) {} -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) { O << "Type: " << dwarf::AtomTypeString(type) << "\n" << "Form: " << dwarf::FormEncodingString(form) << "\n"; @@ -145,7 +145,7 @@ TableHeaderData(ArrayRef AtomList, uint32_t offset = 0) : die_offset_base(offset), Atoms(AtomList.begin(), AtomList.end()) {} -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) { O << "die_offset_base: " << die_offset_base << "\n"; for (size_t i = 0; i < Atoms.size(); i++) @@ -169,7 +169,7 @@ char Flags; // Specific flags to output HashDataContents(const DIE *D, char Flags) : Die(D), Flags(Flags) {} -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) const { O << " Offset: " << Die->getOffset() << "\n"; O << " Tag: " << dwarf::TagString(Die->getTag()) << "\n"; @@ -194,7 +194,7 @@ : Str(S), Data(Data) { HashValue = DwarfAccelTable::HashDJB(S); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O) { O << "Name: " << Str << "\n"; O << " Hash Value: " << format("0x%x", HashValue) << "\n"; @@ -247,7 +247,7 @@ void AddName(DwarfStringPoolEntryRef Name, const DIE *Die, char Flags = 0); void FinalizeTable(AsmPrinter *, StringRef); void emit(AsmPrinter *, const MCSymbol *, DwarfDebug *); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void print(raw_ostream &O); void dump() { print(dbgs()); } #endif Index: lib/CodeGen/AsmPrinter/DwarfAccelTable.cpp =================================================================== --- lib/CodeGen/AsmPrinter/DwarfAccelTable.cpp +++ lib/CodeGen/AsmPrinter/DwarfAccelTable.cpp @@ -258,7 +258,7 @@ EmitData(Asm, D); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void DwarfAccelTable::print(raw_ostream &O) { Header.print(O); Index: lib/CodeGen/AsmPrinter/DwarfDebug.cpp =================================================================== --- lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -1240,7 +1240,7 @@ return; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG size_t NumAbstractScopes = LScopes.getAbstractScopesList().size(); #endif // Construct abstract scopes. Index: lib/CodeGen/CallingConvLower.cpp =================================================================== --- lib/CodeGen/CallingConvLower.cpp +++ lib/CodeGen/CallingConvLower.cpp @@ -74,7 +74,7 @@ MVT ArgVT = Ins[i].VT; ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Formal argument #" << i << " has unhandled type " << EVT(ArgVT).getEVTString() << '\n'; #endif @@ -106,7 +106,7 @@ MVT VT = Outs[i].VT; ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Return operand #" << i << " has unhandled type " << EVT(VT).getEVTString() << '\n'; #endif @@ -124,7 +124,7 @@ MVT ArgVT = Outs[i].VT; ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Call operand #" << i << " has unhandled type " << EVT(ArgVT).getEVTString() << '\n'; #endif @@ -142,7 +142,7 @@ MVT ArgVT = ArgVTs[i]; ISD::ArgFlagsTy ArgFlags = Flags[i]; if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Call operand #" << i << " has unhandled type " << EVT(ArgVT).getEVTString() << '\n'; #endif @@ -159,7 +159,7 @@ MVT VT = Ins[i].VT; ISD::ArgFlagsTy Flags = Ins[i].Flags; if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Call result #" << i << " has unhandled type " << EVT(VT).getEVTString() << '\n'; #endif @@ -171,7 +171,7 @@ /// Same as above except it's specialized for calls that produce a single value. void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Call result has unhandled type " << EVT(VT).getEVTString() << '\n'; #endif @@ -204,7 +204,7 @@ bool HaveRegParm = true; while (HaveRegParm) { if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Call has unhandled type " << EVT(VT).getEVTString() << " while computing remaining regparms\n"; #endif Index: lib/CodeGen/CodeGenPrepare.cpp =================================================================== --- lib/CodeGen/CodeGenPrepare.cpp +++ lib/CodeGen/CodeGenPrepare.cpp @@ -808,7 +808,7 @@ if (AddI->getParent() != CI->getParent() && !AddI->hasOneUse()) return false; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Someday m_UAddWithOverflow may get smarter, but this is a safe assumption // for now: if (AddI->hasOneUse()) @@ -1610,7 +1610,7 @@ } }; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static inline raw_ostream &operator<<(raw_ostream &OS, const ExtAddrMode &AM) { AM.print(OS); return OS; @@ -1648,7 +1648,7 @@ OS << ']'; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void ExtAddrMode::dump() const { print(dbgs()); dbgs() << '\n'; Index: lib/CodeGen/CriticalAntiDepBreaker.cpp =================================================================== --- lib/CodeGen/CriticalAntiDepBreaker.cpp +++ lib/CodeGen/CriticalAntiDepBreaker.cpp @@ -444,7 +444,7 @@ Max = SU; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG { DEBUG(dbgs() << "Critical path has total latency " << (Max->getDepth() + Max->Latency) << "\n"); Index: lib/CodeGen/IfConversion.cpp =================================================================== --- lib/CodeGen/IfConversion.cpp +++ lib/CodeGen/IfConversion.cpp @@ -1589,7 +1589,7 @@ // be predicated. MaySpec = false; if (!TII->PredicateInstruction(I, Cond)) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Unable to predicate " << *I << "!\n"; #endif llvm_unreachable(nullptr); @@ -1634,7 +1634,7 @@ if (!TII->isPredicated(I) && !MI->isDebugValue()) { if (!TII->PredicateInstruction(MI, Cond)) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Unable to predicate " << *I << "!\n"; #endif llvm_unreachable(nullptr); Index: lib/CodeGen/InlineSpiller.cpp =================================================================== --- lib/CodeGen/InlineSpiller.cpp +++ lib/CodeGen/InlineSpiller.cpp @@ -315,7 +315,7 @@ VRM.getOriginal(Reg) == Original; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static raw_ostream &operator<<(raw_ostream &OS, const InlineSpiller::SibValueInfo &SVI) { OS << "spill " << PrintReg(SVI.SpillReg) << ':' @@ -1038,7 +1038,7 @@ return true; } -#if !defined(NDEBUG) +#if !defined(LLVM_NDEBUG) // Dump the range of instructions from B to E with their slot indexes. static void dumpMachineInstrRangeWithSlotIndex(MachineBasicBlock::iterator B, MachineBasicBlock::iterator E, Index: lib/CodeGen/LexicalScopes.cpp =================================================================== --- lib/CodeGen/LexicalScopes.cpp +++ lib/CodeGen/LexicalScopes.cpp @@ -314,7 +314,7 @@ /// dump - Print data structures. void LexicalScope::dump(unsigned Indent) const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG raw_ostream &err = dbgs(); err.indent(Indent); err << "DFSIn: " << DFSIn << " DFSOut: " << DFSOut << "\n"; Index: lib/CodeGen/LiveDebugVariables.cpp =================================================================== --- lib/CodeGen/LiveDebugVariables.cpp +++ lib/CodeGen/LiveDebugVariables.cpp @@ -1051,7 +1051,7 @@ return Pass::doInitialization(M); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void LiveDebugVariables::dump() { if (pImpl) static_cast(pImpl)->print(dbgs()); Index: lib/CodeGen/LiveInterval.cpp =================================================================== --- lib/CodeGen/LiveInterval.cpp +++ lib/CodeGen/LiveInterval.cpp @@ -1025,7 +1025,7 @@ return os << '[' << S.start << ',' << S.end << ':' << S.valno->id << ")"; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void LiveRange::Segment::dump() const { dbgs() << *this << "\n"; } @@ -1070,7 +1070,7 @@ } } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void LiveRange::dump() const { dbgs() << *this << "\n"; } @@ -1080,7 +1080,7 @@ } #endif -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void LiveRange::verify() const { for (const_iterator I = begin(), E = end(); I != E; ++I) { assert(I->start.isValid()); Index: lib/CodeGen/LiveIntervalAnalysis.cpp =================================================================== --- lib/CodeGen/LiveIntervalAnalysis.cpp +++ lib/CodeGen/LiveIntervalAnalysis.cpp @@ -55,13 +55,13 @@ INITIALIZE_PASS_END(LiveIntervals, "liveintervals", "Live Interval Analysis", false, false) -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static cl::opt EnablePrecomputePhysRegs( "precompute-phys-liveness", cl::Hidden, cl::desc("Eagerly compute live intervals for all physreg units.")); #else static bool EnablePrecomputePhysRegs = false; -#endif // NDEBUG +#endif // LLVM_NDEBUG static cl::opt EnableSubRegLiveness( "enable-subreg-liveness", cl::Hidden, cl::init(true), @@ -180,7 +180,7 @@ MF->print(OS, Indexes); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void LiveIntervals::dumpInstrs() const { printInstrs(dbgs()); } Index: lib/CodeGen/LiveIntervalUnion.cpp =================================================================== --- lib/CodeGen/LiveIntervalUnion.cpp +++ lib/CodeGen/LiveIntervalUnion.cpp @@ -91,13 +91,13 @@ OS << '\n'; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Verify the live intervals in this union and add them to the visited set. void LiveIntervalUnion::verify(LiveVirtRegBitSet& VisitedVRegs) { for (SegmentIter SI = Segments.begin(); SI.valid(); ++SI) VisitedVRegs.set(SI.value()->reg); } -#endif //!NDEBUG +#endif //!LLVM_NDEBUG // Scan the vector of interfering virtual registers in this union. Assume it's // quite small. Index: lib/CodeGen/LivePhysRegs.cpp =================================================================== --- lib/CodeGen/LivePhysRegs.cpp +++ lib/CodeGen/LivePhysRegs.cpp @@ -121,7 +121,7 @@ /// Dumps the currently live registers to the debug output. void LivePhysRegs::dump() const { -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) dbgs() << " " << *this; #endif } Index: lib/CodeGen/LiveRangeCalc.cpp =================================================================== --- lib/CodeGen/LiveRangeCalc.cpp +++ lib/CodeGen/LiveRangeCalc.cpp @@ -269,7 +269,7 @@ for (unsigned i = 0; i != WorkList.size(); ++i) { MachineBasicBlock *MBB = MF->getBlockNumbered(WorkList[i]); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (MBB->pred_empty()) { MBB->getParent()->verify(); errs() << "Use of " << PrintReg(PhysReg) Index: lib/CodeGen/LiveVariables.cpp =================================================================== --- lib/CodeGen/LiveVariables.cpp +++ lib/CodeGen/LiveVariables.cpp @@ -65,7 +65,7 @@ } void LiveVariables::VarInfo::dump() const { -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) dbgs() << " Alive in blocks: "; for (SparseBitVector<>::iterator I = AliveBlocks.begin(), E = AliveBlocks.end(); I != E; ++I) @@ -144,7 +144,7 @@ return; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned i = 0, e = VRInfo.Kills.size(); i != e; ++i) assert(VRInfo.Kills[i]->getParent() != MBB && "entry should be at end!"); #endif @@ -664,7 +664,7 @@ // Check to make sure there are no unreachable blocks in the MC CFG for the // function. If so, it is due to a bug in the instruction selector or some // other part of the code generator if this happens. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for(MachineFunction::iterator i = MF->begin(), e = MF->end(); i != e; ++i) assert(Visited.count(&*i) != 0 && "unreachable basic block found"); #endif Index: lib/CodeGen/MachineBasicBlock.cpp =================================================================== --- lib/CodeGen/MachineBasicBlock.cpp +++ lib/CodeGen/MachineBasicBlock.cpp @@ -213,7 +213,7 @@ return nullptr; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MachineBasicBlock::dump() const { print(dbgs()); } Index: lib/CodeGen/MachineBlockFrequencyInfo.cpp =================================================================== --- lib/CodeGen/MachineBlockFrequencyInfo.cpp +++ lib/CodeGen/MachineBlockFrequencyInfo.cpp @@ -26,7 +26,7 @@ #define DEBUG_TYPE "block-freq" -#ifndef NDEBUG +#ifndef LLVM_NDEBUG enum GVDAGType { GVDT_None, GVDT_Fraction, @@ -144,7 +144,7 @@ if (!MBFI) MBFI.reset(new ImplType); MBFI->calculate(F, MBPI, MLI); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (ViewMachineBlockFreqPropagationDAG != GVDT_None) { view(); } @@ -158,13 +158,13 @@ /// rendered using dot. void MachineBlockFrequencyInfo::view() const { // This code is only for debugging. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG ViewGraph(const_cast(this), "MachineBlockFrequencyDAGs"); #else errs() << "MachineBlockFrequencyInfo::view is only available in debug builds " "on systems with Graphviz or gv!\n"; -#endif // NDEBUG +#endif // LLVM_NDEBUG } BlockFrequency MachineBlockFrequencyInfo:: Index: lib/CodeGen/MachineBlockPlacement.cpp =================================================================== --- lib/CodeGen/MachineBlockPlacement.cpp +++ lib/CodeGen/MachineBlockPlacement.cpp @@ -165,13 +165,13 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// \brief Dump the blocks in this chain. LLVM_DUMP_METHOD void dump() { for (MachineBasicBlock *MBB : *this) MBB->dump(); } -#endif // NDEBUG +#endif // LLVM_NDEBUG /// \brief Count of predecessors within the loop currently being processed. /// @@ -280,7 +280,7 @@ INITIALIZE_PASS_END(MachineBlockPlacement, "block-placement", "Branch Probability Basic Block Placement", false, false) -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// \brief Helper to print the name of a MBB. /// /// Only used by debug logging. @@ -964,7 +964,7 @@ BlockChain &FunctionChain = *BlockToChain[&F.front()]; buildChain(&F.front(), FunctionChain, BlockWorkList); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG typedef SmallPtrSet FunctionBlockSetType; #endif DEBUG({ Index: lib/CodeGen/MachineFunction.cpp =================================================================== --- lib/CodeGen/MachineFunction.cpp +++ lib/CodeGen/MachineFunction.cpp @@ -334,7 +334,7 @@ return Dest; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MachineFunction::dump() const { print(dbgs()); } @@ -428,22 +428,22 @@ void MachineFunction::viewCFG() const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG ViewGraph(this, "mf" + getName()); #else errs() << "MachineFunction::viewCFG is only available in debug builds on " << "systems with Graphviz or gv!\n"; -#endif // NDEBUG +#endif // LLVM_NDEBUG } void MachineFunction::viewCFGOnly() const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG ViewGraph(this, "mf" + getName(), true); #else errs() << "MachineFunction::viewCFGOnly is only available in debug builds on " << "systems with Graphviz or gv!\n"; -#endif // NDEBUG +#endif // LLVM_NDEBUG } /// Add the specified physical register as a live-in value and @@ -698,7 +698,7 @@ } } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MachineFrameInfo::dump(const MachineFunction &MF) const { print(MF, dbgs()); } @@ -796,7 +796,7 @@ OS << '\n'; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MachineJumpTableInfo::dump() const { print(dbgs()); } #endif @@ -959,6 +959,6 @@ } } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MachineConstantPool::dump() const { print(dbgs()); } #endif Index: lib/CodeGen/MachineInstr.cpp =================================================================== --- lib/CodeGen/MachineInstr.cpp +++ lib/CodeGen/MachineInstr.cpp @@ -732,7 +732,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool isMetaDataOp = Op.getType() == MachineOperand::MO_Metadata; // OpNo now points as the desired insertion point. Unless this is a variadic // instruction, only implicit regs are allowed beyond MCID->getNumOperands(). @@ -803,7 +803,7 @@ assert(OpNo < getNumOperands() && "Invalid operand number"); untieRegOperand(OpNo); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Moving tied operands would break the ties. for (unsigned i = OpNo + 1, e = getNumOperands(); i != e; ++i) if (Operands[i].isReg()) @@ -1526,7 +1526,7 @@ } void MachineInstr::dump() const { -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) dbgs() << " " << *this; #endif } Index: lib/CodeGen/MachineLoopInfo.cpp =================================================================== --- lib/CodeGen/MachineLoopInfo.cpp +++ lib/CodeGen/MachineLoopInfo.cpp @@ -75,7 +75,7 @@ return BotMBB; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MachineLoop::dump() const { print(dbgs()); } Index: lib/CodeGen/MachineRegionInfo.cpp =================================================================== --- lib/CodeGen/MachineRegionInfo.cpp +++ lib/CodeGen/MachineRegionInfo.cpp @@ -112,7 +112,7 @@ RI.print(OS); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MachineRegionInfoPass::dump() const { RI.dump(); } Index: lib/CodeGen/MachineRegisterInfo.cpp =================================================================== --- lib/CodeGen/MachineRegisterInfo.cpp +++ lib/CodeGen/MachineRegisterInfo.cpp @@ -106,7 +106,7 @@ /// clearVirtRegs - Remove all virtual registers (after physreg assignment). void MachineRegisterInfo::clearVirtRegs() { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned i = 0, e = getNumVirtRegs(); i != e; ++i) { unsigned Reg = TargetRegisterInfo::index2VirtReg(i); if (!VRegInfo[Reg].second) @@ -121,7 +121,7 @@ } void MachineRegisterInfo::verifyUseList(unsigned Reg) const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool Valid = true; for (MachineOperand &M : reg_operands(Reg)) { MachineOperand *MO = &M; @@ -159,7 +159,7 @@ } void MachineRegisterInfo::verifyUseLists() const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned i = 0, e = getNumVirtRegs(); i != e; ++i) verifyUseList(TargetRegisterInfo::index2VirtReg(i)); for (unsigned i = 1, e = getTargetRegisterInfo()->getNumRegs(); i != e; ++i) @@ -403,7 +403,7 @@ return TRC.getLaneMask(); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void MachineRegisterInfo::dumpUses(unsigned Reg) const { for (MachineInstr &I : use_instructions(Reg)) I.dump(); Index: lib/CodeGen/MachineScheduler.cpp =================================================================== --- lib/CodeGen/MachineScheduler.cpp +++ lib/CodeGen/MachineScheduler.cpp @@ -45,7 +45,7 @@ cl::desc("Print critical path length to stdout")); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static cl::opt ViewMISchedDAGs("view-misched-dags", cl::Hidden, cl::desc("Pop up a window to show MISched dags after they are processed")); @@ -58,7 +58,7 @@ cl::desc("Only schedule this MBB#")); #else static bool ViewMISchedDAGs = false; -#endif // NDEBUG +#endif // LLVM_NDEBUG static cl::opt EnableRegPressure("misched-regpressure", cl::Hidden, cl::desc("Enable register pressure scheduling."), cl::init(true)); @@ -402,7 +402,7 @@ Scheduler.startBlock(MBB); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (SchedOnlyFunc.getNumOccurrences() && SchedOnlyFunc != MF->getName()) continue; if (SchedOnlyBlock.getNumOccurrences() @@ -545,7 +545,7 @@ NextClusterSucc = SuccSU; return; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (SuccSU->NumPredsLeft == 0) { dbgs() << "*** Scheduling failed! ***\n"; SuccSU->dump(this); @@ -584,7 +584,7 @@ NextClusterPred = PredSU; return; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (PredSU->NumSuccsLeft == 0) { dbgs() << "*** Scheduling failed! ***\n"; PredSU->dump(this); @@ -645,7 +645,7 @@ } bool ScheduleDAGMI::checkSchedLimit() { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (NumInstrsScheduled == MISchedCutoff && MISchedCutoff != ~0U) { CurrentTop = CurrentBottom; return false; @@ -821,7 +821,7 @@ FirstDbgValue = nullptr; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void ScheduleDAGMI::dumpSchedule() const { for (MachineBasicBlock::iterator MI = begin(), ME = end(); MI != ME; ++MI) { if (SUnit *SU = getSUnit(&(*MI))) @@ -1629,7 +1629,7 @@ ZoneCritResIdx = 0; IsResourceLimited = false; ReservedCycles.clear(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Track the maximum number of stall cycles that could arise either from the // latency of a DAG edge or the number of cycles that a processor resource is // reserved (SchedBoundary::ReservedCycles). @@ -1735,7 +1735,7 @@ PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) { unsigned NRCycle = getNextResourceCycle(PI->ProcResourceIdx, PI->Cycles); if (NRCycle > CurrCycle) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG MaxObservedStall = std::max(PI->Cycles, MaxObservedStall); #endif DEBUG(dbgs() << " SU(" << SU->NodeNum << ") " @@ -1800,7 +1800,7 @@ void SchedBoundary::releaseNode(SUnit *SU, unsigned ReadyCycle) { assert(SU->getInstr() && "Scheduled SUnit must have instr"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // ReadyCycle was been bumped up to the CurrCycle when this node was // scheduled, but CurrCycle may have been eagerly advanced immediately after // scheduling, so may now be greater than ReadyCycle. @@ -2120,7 +2120,7 @@ return nullptr; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // This is useful information to dump after bumpNode. // Note that the Queue contents are more useful before pickNodeFromQueue. void SchedBoundary::dumpScheduledState() { @@ -2242,7 +2242,7 @@ Policy.DemandResIdx = OtherCritIdx; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const char *GenericSchedulerBase::getReasonStr( GenericSchedulerBase::CandReason Reason) { switch (Reason) { @@ -3169,7 +3169,7 @@ // Machine Instruction Shuffler for Correctness Testing //===----------------------------------------------------------------------===// -#ifndef NDEBUG +#ifndef LLVM_NDEBUG namespace { /// Apply a less-than relation on the node order, which corresponds to the /// instruction order prior to scheduling. IsReverse implements greater-than. @@ -3252,13 +3252,13 @@ static MachineSchedRegistry ShufflerRegistry( "shuffle", "Shuffle machine instructions alternating directions", createInstructionShuffler); -#endif // !NDEBUG +#endif // !LLVM_NDEBUG //===----------------------------------------------------------------------===// // GraphWriter support for ScheduleDAGMILive. //===----------------------------------------------------------------------===// -#ifndef NDEBUG +#ifndef LLVM_NDEBUG namespace llvm { template<> struct GraphTraits< @@ -3327,18 +3327,18 @@ } }; } // namespace llvm -#endif // NDEBUG +#endif // LLVM_NDEBUG /// viewGraph - Pop up a ghostview window with the reachable parts of the DAG /// rendered using 'dot'. /// void ScheduleDAGMI::viewGraph(const Twine &Name, const Twine &Title) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG ViewGraph(this, Name, false, Title); #else errs() << "ScheduleDAGMI::viewGraph is only available in debug builds on " << "systems with Graphviz or gv!\n"; -#endif // NDEBUG +#endif // LLVM_NDEBUG } /// Out-of-line implementation with no arguments is handy for gdb. Index: lib/CodeGen/MachineTraceMetrics.cpp =================================================================== --- lib/CodeGen/MachineTraceMetrics.cpp +++ lib/CodeGen/MachineTraceMetrics.cpp @@ -388,7 +388,7 @@ void MachineTraceMetrics::verifyAnalysis() const { if (!MF) return; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG assert(BlockInfo.size() == MF->getNumBlockIDs() && "Outdated BlockInfo size"); for (unsigned i = 0; i != TS_NumStrategies; ++i) if (Ensembles[i]) @@ -559,7 +559,7 @@ } void MachineTraceMetrics::Ensemble::verify() const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG assert(BlockInfo.size() == MTM.MF->getNumBlockIDs() && "Outdated BlockInfo size"); for (unsigned Num = 0, e = BlockInfo.size(); Num != e; ++Num) { Index: lib/CodeGen/PostRASchedulerList.cpp =================================================================== --- lib/CodeGen/PostRASchedulerList.cpp +++ lib/CodeGen/PostRASchedulerList.cpp @@ -238,7 +238,7 @@ ScheduleDAGInstrs::exitRegion(); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) /// dumpSchedule - dump the scheduled Sequence. void SchedulePostRATDList::dumpSchedule() const { for (unsigned i = 0, e = Sequence.size(); i != e; i++) { @@ -304,7 +304,7 @@ // Loop over all of the basic blocks for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); MBB != MBBe; ++MBB) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // If DebugDiv > 0 then only schedule MBB with (ID % DebugDiv) == DebugMod if (DebugDiv > 0) { static int bbcnt = 0; @@ -439,7 +439,7 @@ --SuccSU->WeakPredsLeft; return; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (SuccSU->NumPredsLeft == 0) { dbgs() << "*** Scheduling failed! ***\n"; SuccSU->dump(this); @@ -635,7 +635,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned ScheduledNodes = VerifyScheduledDAG(/*isBottomUp=*/false); unsigned Noops = 0; for (unsigned i = 0, e = Sequence.size(); i != e; ++i) @@ -643,7 +643,7 @@ ++Noops; assert(Sequence.size() - Noops == ScheduledNodes && "The number of nodes scheduled doesn't match the expected number!"); -#endif // NDEBUG +#endif // LLVM_NDEBUG } // EmitSchedule - Emit the machine code in scheduled order. Index: lib/CodeGen/RegAllocBase.cpp =================================================================== --- lib/CodeGen/RegAllocBase.cpp +++ lib/CodeGen/RegAllocBase.cpp @@ -22,7 +22,7 @@ #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/VirtRegMap.h" #include "llvm/Target/TargetRegisterInfo.h" -#ifndef NDEBUG +#ifndef LLVM_NDEBUG #include "llvm/ADT/SparseBitVector.h" #endif #include "llvm/Support/CommandLine.h" Index: lib/CodeGen/RegAllocGreedy.cpp =================================================================== --- lib/CodeGen/RegAllocGreedy.cpp +++ lib/CodeGen/RegAllocGreedy.cpp @@ -191,7 +191,7 @@ uint8_t CutOffInfo; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static const char *const StageName[]; #endif @@ -420,7 +420,7 @@ char RAGreedy::ID = 0; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const char *const RAGreedy::StageName[] = { "RS_New", "RS_Assign", @@ -1038,7 +1038,7 @@ BitVector Todo = SA->getThroughBlocks(); SmallVectorImpl &ActiveBlocks = Cand.ActiveBlocks; unsigned AddedTo = 0; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned Visited = 0; #endif @@ -1057,7 +1057,7 @@ Todo.reset(Block); // This is a new through block. Add it to SpillPlacer later. ActiveBlocks.push_back(Block); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG ++Visited; #endif } Index: lib/CodeGen/RegAllocPBQP.cpp =================================================================== --- lib/CodeGen/RegAllocPBQP.cpp +++ lib/CodeGen/RegAllocPBQP.cpp @@ -70,7 +70,7 @@ cl::desc("Attempt coalescing during PBQP register allocation."), cl::init(false), cl::Hidden); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static cl::opt PBQPDumpGraphs("pbqp-dump-graphs", cl::desc("Dump graphs for each function/round in the compilation unit."), @@ -747,7 +747,7 @@ // Find the vreg intervals in need of allocation. findVRegIntervalsToAlloc(MF, LIS); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const Function &F = *MF.getFunction(); std::string FullyQualifiedName = F.getParent()->getModuleIdentifier() + "." + F.getName().str(); @@ -775,7 +775,7 @@ initializeGraph(G, VRM, *VRegSpiller); ConstraintsRoot->apply(G); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (PBQPDumpGraphs) { std::ostringstream RS; RS << Round; Index: lib/CodeGen/RegisterCoalescer.cpp =================================================================== --- lib/CodeGen/RegisterCoalescer.cpp +++ lib/CodeGen/RegisterCoalescer.cpp @@ -2988,7 +2988,7 @@ // remove the subranges. LI.clearSubRanges(); } else { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // If subranges are still supported, then the same subregs should still // be supported. for (LiveInterval::SubRange &S : LI.subranges()) { Index: lib/CodeGen/RegisterPressure.cpp =================================================================== --- lib/CodeGen/RegisterPressure.cpp +++ lib/CodeGen/RegisterPressure.cpp @@ -789,7 +789,7 @@ P.MaxSetPressure.swap(SavedMaxPressure); CurrSetPressure.swap(SavedPressure); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (!PDiff) return; Index: lib/CodeGen/RegisterScavenging.cpp =================================================================== --- lib/CodeGen/RegisterScavenging.cpp +++ lib/CodeGen/RegisterScavenging.cpp @@ -191,7 +191,7 @@ determineKillsAndDefs(); // Verify uses and defs. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); if (!MO.isReg()) @@ -242,7 +242,7 @@ #endif } } -#endif // NDEBUG +#endif // LLVM_NDEBUG // Commit the changes. setUnused(KillRegUnits); Index: lib/CodeGen/ScheduleDAG.cpp =================================================================== --- lib/CodeGen/ScheduleDAG.cpp +++ lib/CodeGen/ScheduleDAG.cpp @@ -27,7 +27,7 @@ #define DEBUG_TYPE "pre-RA-sched" -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static cl::opt StressSchedOpt( "stress-sched", cl::Hidden, cl::init(false), cl::desc("Stress test instruction scheduling")); @@ -39,7 +39,7 @@ : TM(mf.getTarget()), TII(mf.getSubtarget().getInstrInfo()), TRI(mf.getSubtarget().getRegisterInfo()), MF(mf), MRI(mf.getRegInfo()), EntrySU(), ExitSU() { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG StressSched = StressSchedOpt; #endif } @@ -310,7 +310,7 @@ std::swap(*Preds.begin(), *BestI); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) /// SUnit - Scheduling unit. It's an wrapper around either a single SDNode or /// a group of nodes flagged together. void SUnit::dump(const ScheduleDAG *G) const { @@ -376,7 +376,7 @@ } #endif -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// VerifyScheduledDAG - Verify that all SUnits were scheduled and that /// their state is consistent. Return the number of scheduled nodes. /// @@ -501,7 +501,7 @@ Visited.resize(DAGSize); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Check correctness of the ordering for (unsigned i = 0, e = DAGSize; i != e; ++i) { SUnit *SU = &SUnits[i]; Index: lib/CodeGen/ScheduleDAGInstrs.cpp =================================================================== --- lib/CodeGen/ScheduleDAGInstrs.cpp +++ lib/CodeGen/ScheduleDAGInstrs.cpp @@ -1263,7 +1263,7 @@ } void ScheduleDAGInstrs::dumpNode(const SUnit *SU) const { -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) SU->getInstr()->dump(); #endif } Index: lib/CodeGen/ScheduleDAGPrinter.cpp =================================================================== --- lib/CodeGen/ScheduleDAGPrinter.cpp +++ lib/CodeGen/ScheduleDAGPrinter.cpp @@ -84,12 +84,12 @@ /// void ScheduleDAG::viewGraph(const Twine &Name, const Twine &Title) { // This code is only for debugging! -#ifndef NDEBUG +#ifndef LLVM_NDEBUG ViewGraph(this, Name, false, Title); #else errs() << "ScheduleDAG::viewGraph is only available in debug builds on " << "systems with Graphviz or gv!\n"; -#endif // NDEBUG +#endif // LLVM_NDEBUG } /// Out-of-line implementation with no arguments is handy for gdb. Index: lib/CodeGen/ScoreboardHazardRecognizer.cpp =================================================================== --- lib/CodeGen/ScoreboardHazardRecognizer.cpp +++ lib/CodeGen/ScoreboardHazardRecognizer.cpp @@ -25,7 +25,7 @@ #define DEBUG_TYPE ::llvm::ScoreboardHazardRecognizer::DebugType -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const char *ScoreboardHazardRecognizer::DebugType = ""; #endif @@ -36,7 +36,7 @@ ScheduleHazardRecognizer(), ItinData(II), DAG(SchedDAG), IssueWidth(0), IssueCount(0) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DebugType = ParentDebugType; #endif @@ -90,7 +90,7 @@ ReservedScoreboard.reset(); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void ScoreboardHazardRecognizer::Scoreboard::dump() const { dbgs() << "Scoreboard:\n"; Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -62,7 +62,7 @@ UseTBAA("combiner-use-tbaa", cl::Hidden, cl::init(true), cl::desc("Enable DAG combiner's use of TBAA")); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static cl::opt CombinerAAOnlyFunc("combiner-aa-only-func", cl::Hidden, cl::desc("Only use DAG-combiner alias analysis in this" @@ -9618,7 +9618,7 @@ bool UseAA = CombinerAA.getNumOccurrences() > 0 ? CombinerAA : DAG.getSubtarget().useAA(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (CombinerAAOnlyFunc.getNumOccurrences() && CombinerAAOnlyFunc != DAG.getMachineFunction().getName()) UseAA = false; @@ -11313,7 +11313,7 @@ bool UseAA = CombinerAA.getNumOccurrences() > 0 ? CombinerAA : DAG.getSubtarget().useAA(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (CombinerAAOnlyFunc.getNumOccurrences() && CombinerAAOnlyFunc != DAG.getMachineFunction().getName()) UseAA = false; @@ -13938,7 +13938,7 @@ bool UseAA = CombinerGlobalAA.getNumOccurrences() > 0 ? CombinerGlobalAA : DAG.getSubtarget().useAA(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (CombinerAAOnlyFunc.getNumOccurrences() && CombinerAAOnlyFunc != DAG.getMachineFunction().getName()) UseAA = false; Index: lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp =================================================================== --- lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp +++ lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp @@ -336,7 +336,7 @@ MBBMap.clear(); ValueMap.clear(); StaticAllocaMap.clear(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG CatchInfoLost.clear(); CatchInfoFound.clear(); #endif Index: lib/CodeGen/SelectionDAG/InstrEmitter.cpp =================================================================== --- lib/CodeGen/SelectionDAG/InstrEmitter.cpp +++ lib/CodeGen/SelectionDAG/InstrEmitter.cpp @@ -768,7 +768,7 @@ unsigned NodeOperands = countOperands(Node, II.getNumOperands() - NumDefs, NumImpUses); bool HasPhysRegOuts = NumResults > NumDefs && II.getImplicitDefs()!=nullptr; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned NumMIOperands = NodeOperands + NumResults; if (II.isVariadic()) assert(NumMIOperands >= II.getNumOperands() && @@ -883,7 +883,7 @@ DenseMap &VRBaseMap) { switch (Node->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Node->dump(); #endif llvm_unreachable("This target-independent node should have been selected!"); Index: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp =================================================================== --- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1165,7 +1165,7 @@ if (Node->getOpcode() == ISD::TargetConstant) // Allow illegal target nodes. return; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) assert(TLI.getTypeAction(*DAG.getContext(), Node->getValueType(i)) == TargetLowering::TypeLegal && @@ -1377,7 +1377,7 @@ switch (Node->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "NODE: "; Node->dump( &DAG); dbgs() << "\n"; Index: lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp =================================================================== --- lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp +++ lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp @@ -53,7 +53,7 @@ switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "SoftenFloatResult #" << ResNo << ": "; N->dump(&DAG); dbgs() << "\n"; #endif @@ -680,7 +680,7 @@ switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "SoftenFloatOperand Op #" << OpNo << ": "; N->dump(&DAG); dbgs() << "\n"; #endif @@ -872,7 +872,7 @@ switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "ExpandFloatResult #" << ResNo << ": "; N->dump(&DAG); dbgs() << "\n"; #endif @@ -1369,7 +1369,7 @@ switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "ExpandFloatOperand Op #" << OpNo << ": "; N->dump(&DAG); dbgs() << "\n"; #endif Index: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp =================================================================== --- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -44,7 +44,7 @@ switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "PromoteIntegerResult #" << ResNo << ": "; N->dump(&DAG); dbgs() << "\n"; #endif @@ -844,7 +844,7 @@ switch (N->getOpcode()) { default: - #ifndef NDEBUG + #ifndef LLVM_NDEBUG dbgs() << "PromoteIntegerOperand Op #" << OpNo << ": "; N->dump(&DAG); dbgs() << "\n"; #endif @@ -1243,7 +1243,7 @@ switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "ExpandIntegerResult #" << ResNo << ": "; N->dump(&DAG); dbgs() << "\n"; #endif @@ -2595,7 +2595,7 @@ switch (N->getOpcode()) { default: - #ifndef NDEBUG + #ifndef LLVM_NDEBUG dbgs() << "ExpandIntegerOperand Op #" << OpNo << ": "; N->dump(&DAG); dbgs() << "\n"; #endif Index: lib/CodeGen/SelectionDAG/LegalizeTypes.cpp =================================================================== --- lib/CodeGen/SelectionDAG/LegalizeTypes.cpp +++ lib/CodeGen/SelectionDAG/LegalizeTypes.cpp @@ -406,7 +406,7 @@ // In a debug build, scan all the nodes to make sure we found them all. This // ensures that there are no cycles and that everything got processed. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (SDNode &Node : DAG.allnodes()) { bool Failed = false; Index: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp =================================================================== --- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -40,7 +40,7 @@ switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "ScalarizeVectorResult #" << ResNo << ": "; N->dump(&DAG); dbgs() << "\n"; @@ -417,7 +417,7 @@ if (!Res.getNode()) { switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": "; N->dump(&DAG); dbgs() << "\n"; @@ -574,7 +574,7 @@ switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "SplitVectorResult #" << ResNo << ": "; N->dump(&DAG); dbgs() << "\n"; @@ -1361,7 +1361,7 @@ if (!Res.getNode()) { switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "SplitVectorOperand Op #" << OpNo << ": "; N->dump(&DAG); dbgs() << "\n"; @@ -1920,7 +1920,7 @@ SDValue Res = SDValue(); switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "WidenVectorResult #" << ResNo << ": "; N->dump(&DAG); dbgs() << "\n"; @@ -2843,7 +2843,7 @@ switch (N->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "WidenVectorOperand op #" << OpNo << ": "; N->dump(&DAG); dbgs() << "\n"; Index: lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp =================================================================== --- lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp +++ lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp @@ -140,7 +140,7 @@ void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) { SUnit *PredSU = PredEdge->getSUnit(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (PredSU->NumSuccsLeft == 0) { dbgs() << "*** Scheduling failed! ***\n"; PredSU->dump(this); @@ -636,7 +636,7 @@ // Reverse the order since it is bottom up. std::reverse(Sequence.begin(), Sequence.end()); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG VerifyScheduledSequence(/*isBottomUp=*/true); #endif } Index: lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp =================================================================== --- lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -365,7 +365,7 @@ void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) { SUnit *PredSU = PredEdge->getSUnit(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (PredSU->NumSuccsLeft == 0) { dbgs() << "*** Scheduling failed! ***\n"; PredSU->dump(this); @@ -707,7 +707,7 @@ DEBUG(dbgs() << "\n*** Scheduling [" << CurCycle << "]: "); DEBUG(SU->dump(this)); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (CurCycle < SU->getHeight()) DEBUG(dbgs() << " Height [" << SU->getHeight() << "] pipeline stall!\n"); @@ -1531,7 +1531,7 @@ // Reverse the order if it is bottom up. std::reverse(Sequence.begin(), Sequence.end()); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG VerifyScheduledSequence(/*isBottomUp=*/true); #endif } @@ -1550,7 +1550,7 @@ bool isReady(SUnit* SU, unsigned CurCycle) const { return true; } }; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG template struct reverse_sort : public queue_sort { SF &SortFunc; @@ -1562,7 +1562,7 @@ return SortFunc(right, left); } }; -#endif // NDEBUG +#endif // LLVM_NDEBUG /// bu_ls_rr_sort - Priority function for bottom up register pressure // reduction scheduler. @@ -1759,7 +1759,7 @@ template SUnit *popFromQueue(std::vector &Q, SF &Picker, ScheduleDAG *DAG) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (DAG->StressSched) { reverse_sort RPicker(Picker); return popFromQueueImpl(Q, RPicker); @@ -1798,7 +1798,7 @@ return V; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void dump(ScheduleDAG *DAG) const override { // Emulate pop() without clobbering NodeQueueIds. std::vector DumpQueue = Queue; @@ -1937,7 +1937,7 @@ //===----------------------------------------------------------------------===// void RegReductionPQBase::dumpRegPressure() const { -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), E = TRI->regclass_end(); I != E; ++I) { const TargetRegisterClass *RC = *I; @@ -2408,7 +2408,7 @@ bool LHasPhysReg = left->hasPhysRegDefs; bool RHasPhysReg = right->hasPhysRegDefs; if (LHasPhysReg != RHasPhysReg) { - #ifndef NDEBUG + #ifndef LLVM_NDEBUG static const char *const PhysRegMsg[] = { " has no physreg", " defines a physreg" }; #endif Index: lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp =================================================================== --- lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -66,7 +66,7 @@ /// NewSUnit - Creates a new SUnit and return a ptr to it. /// SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const SUnit *Addr = nullptr; if (!SUnits.empty()) Addr = &SUnits[0]; @@ -650,7 +650,7 @@ } void ScheduleDAGSDNodes::dumpNode(const SUnit *SU) const { -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) if (!SU->getNode()) { dbgs() << "PHYS REG COPY\n"; return; @@ -670,7 +670,7 @@ #endif } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void ScheduleDAGSDNodes::dumpSchedule() const { for (unsigned i = 0, e = Sequence.size(); i != e; i++) { if (SUnit *SU = Sequence[i]) @@ -681,7 +681,7 @@ } #endif -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// VerifyScheduledSequence - Verify that all SUnits were scheduled and that /// their state is consistent with the nodes listed in Sequence. /// @@ -694,7 +694,7 @@ assert(Sequence.size() - Noops == ScheduledNodes && "The number of nodes scheduled doesn't match the expected number!"); } -#endif // NDEBUG +#endif // LLVM_NDEBUG /// ProcessSDDbgValues - Process SDDbgValues associated with this node. static void Index: lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp =================================================================== --- lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp +++ lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp @@ -116,7 +116,7 @@ void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { SUnit *SuccSU = D.getSUnit(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (SuccSU->NumPredsLeft == 0) { dbgs() << "*** Scheduling failed! ***\n"; SuccSU->dump(this); @@ -263,7 +263,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG VerifyScheduledSequence(/*isBottomUp=*/false); #endif } Index: lib/CodeGen/SelectionDAG/SelectionDAG.cpp =================================================================== --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -719,7 +719,7 @@ DbgInfo->erase(N); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. static void VerifySDNode(SDNode *N) { switch (N->getOpcode()) { @@ -757,7 +757,7 @@ } } } -#endif // NDEBUG +#endif // LLVM_NDEBUG /// \brief Insert a newly allocated node into the DAG. /// @@ -765,7 +765,7 @@ /// verification and other common operations when a new node is allocated. void SelectionDAG::InsertNode(SDNode *N) { AllNodes.push_back(N); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG VerifySDNode(N); #endif } @@ -816,7 +816,7 @@ Erased = CSEMap.RemoveNode(N); break; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Verify that the node was actually in one of the CSE maps, unless it has a // flag result (which cannot be CSE'd) or is one of the special cases that are // not subject to CSE. @@ -6222,7 +6222,7 @@ /// corresponding value in To in the same position with the same type. /// void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) assert((!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && @@ -6500,7 +6500,7 @@ } } if (&Node == SortedPos) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG allnodes_iterator I = N; SDNode *S = ++I; dbgs() << "Overran sorted position:\n"; @@ -7133,7 +7133,7 @@ return true; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static void checkForCyclesHelper(const SDNode *N, SmallPtrSetImpl &Visited, SmallPtrSetImpl &Checked, @@ -7162,7 +7162,7 @@ void llvm::checkForCycles(const llvm::SDNode *N, const llvm::SelectionDAG *DAG, bool force) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool check = force; #ifdef XDEBUG check = true; @@ -7173,7 +7173,7 @@ SmallPtrSet checked; checkForCyclesHelper(N, visited, checked, DAG); } -#endif // !NDEBUG +#endif // !LLVM_NDEBUG } void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) { Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp =================================================================== --- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -2064,7 +2064,7 @@ } void SelectionDAGBuilder::sortAndRangeify(CaseClusterVector &Clusters) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (const CaseCluster &CC : Clusters) assert(CC.Low == CC.High && "Input clusters must be single-case"); #endif @@ -7568,7 +7568,7 @@ void SelectionDAGBuilder::findJumpTables(CaseClusterVector &Clusters, const SwitchInst *SI, MachineBasicBlock *DefaultMBB) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Clusters must be non-empty, sorted, and only contain Range clusters. assert(!Clusters.empty()); for (CaseCluster &C : Clusters) @@ -7800,7 +7800,7 @@ // Partition Clusters into as few subsets as possible, where each subset has a // range that fits in a machine word and has <= 3 unique destinations. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Clusters must be sorted and contain Range or JumpTable clusters. assert(!Clusters.empty()); assert(Clusters[0].Kind == CC_Range || Clusters[0].Kind == CC_JumpTable); Index: lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp =================================================================== --- lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp +++ lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp @@ -50,7 +50,7 @@ } return "<>"; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG case ISD::DELETED_NODE: return "<>"; #endif case ISD::PREFETCH: return "Prefetch"; Index: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp =================================================================== --- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -71,7 +71,7 @@ STATISTIC(NumFastIselFailLowerArguments, "Number of entry blocks where fast isel failed to lower arguments"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static cl::opt EnableFastISelVerbose2("fast-isel-verbose2", cl::Hidden, cl::desc("Enable extra verbose messages in the \"fast\" " @@ -182,7 +182,7 @@ cl::desc("use Machine Branch Probability Info"), cl::init(true), cl::Hidden); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static cl::opt FilterDAGBasicBlockName("filter-view-dags", cl::Hidden, cl::desc("Only display the basic block whose name " @@ -326,7 +326,7 @@ MachineBasicBlock * TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "If a target marks an instruction with " "'usesCustomInserter', it must implement " "TargetLowering::EmitInstrWithCustomInserter!"; @@ -675,12 +675,12 @@ int BlockNumber = -1; (void)BlockNumber; bool MatchFilterBB = false; (void)MatchFilterBB; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG MatchFilterBB = (FilterDAGBasicBlockName.empty() || FilterDAGBasicBlockName == FuncInfo->MBB->getBasicBlock()->getName().str()); #endif -#ifdef NDEBUG +#ifdef LLVM_NDEBUG if (ViewDAGCombine1 || ViewLegalizeTypesDAGs || ViewLegalizeDAGs || ViewDAGCombine2 || ViewDAGCombineLT || ViewISelDAGs || ViewSchedDAGs || ViewSUnitDAGs) @@ -1004,7 +1004,7 @@ !FuncInfo->isExportedInst(I); // Exported instrs must be computed. } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Collect per Instruction statistics for fast-isel misses. Only those // instructions that cause the bail are accounted for. It does not account for // instructions higher in the block. Thus, summing the per instructions stats @@ -1234,7 +1234,7 @@ continue; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (EnableFastISelVerbose2) collectFailStats(Inst); #endif @@ -2668,7 +2668,7 @@ while (1) { assert(MatcherIndex < TableSize && "Invalid index"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned CurrentOpcodeIndex = MatcherIndex; #endif BuiltinOpcodes Opcode = (BuiltinOpcodes)MatcherTable[MatcherIndex++]; Index: lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp =================================================================== --- lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp +++ lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp @@ -112,7 +112,7 @@ std::string getNodeLabel(const SDNode *Node, const SelectionDAG *Graph); static std::string getNodeAttributes(const SDNode *N, const SelectionDAG *Graph) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const std::string &Attrs = Graph->getGraphAttrs(N); if (!Attrs.empty()) { if (Attrs.find("shape=") == std::string::npos) @@ -145,13 +145,13 @@ /// void SelectionDAG::viewGraph(const std::string &Title) { // This code is only for debugging! -#ifndef NDEBUG +#ifndef LLVM_NDEBUG ViewGraph(this, "dag." + getMachineFunction().getName(), false, Title); #else errs() << "SelectionDAG::viewGraph is only available in debug builds on " << "systems with Graphviz or gv!\n"; -#endif // NDEBUG +#endif // LLVM_NDEBUG } // This overload is defined out-of-line here instead of just using a @@ -163,7 +163,7 @@ /// clearGraphAttrs - Clear all previously defined node graph attributes. /// Intended to be used from a debugging tool (eg. gdb). void SelectionDAG::clearGraphAttrs() { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG NodeGraphAttrs.clear(); #else errs() << "SelectionDAG::clearGraphAttrs is only available in debug builds" @@ -175,7 +175,7 @@ /// setGraphAttrs - Set graph attributes for a node. (eg. "color=red".) /// void SelectionDAG::setGraphAttrs(const SDNode *N, const char *Attrs) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG NodeGraphAttrs[N] = Attrs; #else errs() << "SelectionDAG::setGraphAttrs is only available in debug builds" @@ -187,7 +187,7 @@ /// getGraphAttrs - Get graph attributes for a node. (eg. "color=red".) /// Used from getNodeAttributes. const std::string SelectionDAG::getGraphAttrs(const SDNode *N) const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG std::map::const_iterator I = NodeGraphAttrs.find(N); @@ -205,7 +205,7 @@ /// setGraphColor - Convenience for setting node color attribute. /// void SelectionDAG::setGraphColor(const SDNode *N, const char *Color) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG NodeGraphAttrs[N] = std::string("color=") + Color; #else errs() << "SelectionDAG::setGraphColor is only available in debug builds" @@ -220,7 +220,7 @@ int level, bool &printed) { bool hit_limit = false; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (level >= 20) { if (!printed) { printed = true; @@ -249,7 +249,7 @@ /// setSubgraphColor - Convenience for setting subgraph color attribute. /// void SelectionDAG::setSubgraphColor(SDNode *N, const char *Color) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DenseSet visited; bool printed = false; if (setSubgraphColorHelper(N, Color, visited, 0, printed)) { Index: lib/CodeGen/SelectionDAG/StatepointLowering.cpp =================================================================== --- lib/CodeGen/SelectionDAG/StatepointLowering.cpp +++ lib/CodeGen/SelectionDAG/StatepointLowering.cpp @@ -491,7 +491,7 @@ getIncomingStatepointGCValues(Bases, Ptrs, Relocations, StatepointSite, Builder); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Check that each of the gc pointer and bases we've gotten out of the // safepoint is something the strategy thinks might be a pointer into the GC // heap. This is basically just here to help catch errors during statepoint @@ -635,7 +635,7 @@ ImmutableCallSite CS(ISP.getCallSite()); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Consistency check. Don't do this for invokes. It would be too // expensive to preserve this information across different basic blocks if (!CS.isInvoke()) { @@ -647,7 +647,7 @@ } #endif -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // If this is a malformed statepoint, report it early to simplify debugging. // This should catch any IR level mistake that's made when constructing or // transforming statepoints. @@ -847,7 +847,7 @@ void SelectionDAGBuilder::visitGCRelocate(const CallInst &CI) { GCRelocateOperands RelocateOpers(&CI); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Consistency check // We skip this check for invoke statepoints. It would be too expensive to // preserve validation info through different basic blocks. Index: lib/CodeGen/SlotIndexes.cpp =================================================================== --- lib/CodeGen/SlotIndexes.cpp +++ lib/CodeGen/SlotIndexes.cpp @@ -213,7 +213,7 @@ } } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void SlotIndexes::dump() const { for (IndexList::const_iterator itr = indexList.begin(); itr != indexList.end(); ++itr) { @@ -240,7 +240,7 @@ os << "invalid"; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) // Dump a SlotIndex to stderr. void SlotIndex::dump() const { print(dbgs()); Index: lib/CodeGen/SplitKit.cpp =================================================================== --- lib/CodeGen/SplitKit.cpp +++ lib/CodeGen/SplitKit.cpp @@ -343,7 +343,7 @@ Edit->anyRematerializable(nullptr); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void SplitEditor::dump() const { if (RegAssign.empty()) { dbgs() << " empty\n"; Index: lib/CodeGen/StackColoring.cpp =================================================================== --- lib/CodeGen/StackColoring.cpp +++ lib/CodeGen/StackColoring.cpp @@ -551,7 +551,7 @@ // NOTE: Alloca address calculations which happen outside the lifetime // zone are are okay, despite the fact that we don't have a good way // for validating all of the usages of the calculation. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool TouchesMemory = I.mayLoad() || I.mayStore(); // If we *don't* protect the user from escaped allocas, don't bother // validating the instructions. Index: lib/CodeGen/StackMaps.cpp =================================================================== --- lib/CodeGen/StackMaps.cpp +++ lib/CodeGen/StackMaps.cpp @@ -40,7 +40,7 @@ !MI->getOperand(0).isImplicit()), IsAnyReg(MI->getOperand(getMetaIdx(CCPos)).getImm() == CallingConv::AnyReg) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned CheckStartIdx = 0, e = MI->getNumOperands(); while (CheckStartIdx < e && MI->getOperand(CheckStartIdx).isReg() && MI->getOperand(CheckStartIdx).isDef() && @@ -359,7 +359,7 @@ recordStackMapOpers(MI, ID, MOI, MI.operands_end(), opers.isAnyReg() && opers.hasDef()); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // verify anyregcc auto &Locations = CSInfos.back().Locations; if (opers.isAnyReg()) { Index: lib/CodeGen/StackSlotColoring.cpp =================================================================== --- lib/CodeGen/StackSlotColoring.cpp +++ lib/CodeGen/StackSlotColoring.cpp @@ -303,7 +303,7 @@ // Sort them by new weight. std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter()); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) DEBUG(SSIntervals[i]->dump()); DEBUG(dbgs() << '\n'); Index: lib/CodeGen/TargetInstrInfo.cpp =================================================================== --- lib/CodeGen/TargetInstrInfo.cpp +++ lib/CodeGen/TargetInstrInfo.cpp @@ -519,7 +519,7 @@ ArrayRef Ops, MachineInstr *LoadMI) const { assert(LoadMI->canFoldAsLoad() && "LoadMI isn't foldable!"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned i = 0, e = Ops.size(); i != e; ++i) assert(MI->getOperand(Ops[i]).isUse() && "Folding load into def!"); #endif Index: lib/CodeGen/TargetRegisterInfo.cpp =================================================================== --- lib/CodeGen/TargetRegisterInfo.cpp +++ lib/CodeGen/TargetRegisterInfo.cpp @@ -329,7 +329,7 @@ return false; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void TargetRegisterInfo::dumpReg(unsigned Reg, unsigned SubRegIndex, const TargetRegisterInfo *TRI) { Index: lib/CodeGen/TargetSchedule.cpp =================================================================== --- lib/CodeGen/TargetSchedule.cpp +++ lib/CodeGen/TargetSchedule.cpp @@ -107,7 +107,7 @@ if (!SCDesc->isValid()) return SCDesc; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned NIter = 0; #endif while (SCDesc->isVariant()) { @@ -207,7 +207,7 @@ } // If DefIdx does not exist in the model (e.g. implicit defs), then return // unit latency (defaultDefLatency may be too conservative). -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit() && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef() && SchedModel.isComplete()) { Index: lib/CodeGen/TwoAddressInstructionPass.cpp =================================================================== --- lib/CodeGen/TwoAddressInstructionPass.cpp +++ lib/CodeGen/TwoAddressInstructionPass.cpp @@ -1463,7 +1463,7 @@ assert(TargetRegisterInfo::isVirtualRegister(RegB) && "cannot make instruction into two-address form"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // First, verify that we don't have a use of "a" in the instruction // (a = b + a for example) because our transformation will not // work. This should never occur because we are in SSA form. Index: lib/CodeGen/VirtRegMap.cpp =================================================================== --- lib/CodeGen/VirtRegMap.cpp +++ lib/CodeGen/VirtRegMap.cpp @@ -138,7 +138,7 @@ OS << '\n'; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void VirtRegMap::dump() const { print(dbgs()); } Index: lib/CodeGen/WinEHPrepare.cpp =================================================================== --- lib/CodeGen/WinEHPrepare.cpp +++ lib/CodeGen/WinEHPrepare.cpp @@ -571,7 +571,7 @@ // Join points should not have phis at this point, unless they are a // landingpad, in which case we will demote their phis later. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (BasicBlock *BB : EHReturnBlocks) assert((BB->isLandingPad() || !isa(BB->begin())) && "non-lpad EH return block has phi"); @@ -2627,7 +2627,7 @@ } static void print_name(const Value *V) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (!V) { DEBUG(dbgs() << "null"); return; Index: lib/ExecutionEngine/ExecutionEngine.cpp =================================================================== --- lib/ExecutionEngine/ExecutionEngine.cpp +++ lib/ExecutionEngine/ExecutionEngine.cpp @@ -68,7 +68,7 @@ // IR module verification is enabled by default in debug builds, and disabled // by default in release builds. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG VerifyModules = true; #else VerifyModules = false; @@ -414,7 +414,7 @@ runStaticConstructorsDestructors(*M, isDtors); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// isTargetNullPtr - Return whether the target pointer stored at Loc is null. static bool isTargetNullPtr(ExecutionEngine *EE, void *Loc) { unsigned PtrSize = EE->getDataLayout().getPointerSize(); @@ -481,7 +481,7 @@ UseOrcMCJITReplacement(false) { // IR module verification is enabled by default in debug builds, and disabled // by default in release builds. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG VerifyModules = true; #else VerifyModules = false; Index: lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp =================================================================== --- lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp +++ lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp @@ -39,7 +39,7 @@ void RuntimeDyldImpl::deregisterEHFrames() {} -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static void dumpSectionMemory(const SectionEntry &S, StringRef State) { dbgs() << "----- Contents of section " << S.Name << " " << State << " -----"; Index: lib/IR/AttributeImpl.h =================================================================== --- lib/IR/AttributeImpl.h +++ lib/IR/AttributeImpl.h @@ -218,7 +218,7 @@ ArrayRef > Attrs) : Context(C), NumAttrs(Attrs.size()) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (Attrs.size() >= 2) { for (const std::pair *i = Attrs.begin() + 1, *e = Attrs.end(); Index: lib/IR/Attributes.cpp =================================================================== --- lib/IR/Attributes.cpp +++ lib/IR/Attributes.cpp @@ -632,7 +632,7 @@ if (Attrs.empty()) return AttributeSet(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned i = 0, e = Attrs.size(); i != e; ++i) { assert((!i || Attrs[i-1].first <= Attrs[i].first) && "Misordered Attributes list!"); @@ -772,7 +772,7 @@ if (!pImpl) return Attrs; if (!Attrs.pImpl) return *this; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // FIXME it is not obvious how this should work for alignment. For now, say // we can't change a known alignment. unsigned OldAlign = getParamAlignment(Index); Index: lib/IR/Constants.cpp =================================================================== --- lib/IR/Constants.cpp +++ lib/IR/Constants.cpp @@ -298,7 +298,7 @@ // while (!use_empty()) { Value *V = user_back(); -#ifndef NDEBUG // Only in -g mode... +#ifndef LLVM_NDEBUG // Only in -g mode... if (!isa(V)) { dbgs() << "While deleting: " << *this << "\n\nUse still stuck around after Def is destroyed: " << *V @@ -1697,7 +1697,7 @@ } Constant *ConstantExpr::getTrunc(Constant *C, Type *Ty, bool OnlyIfReduced) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; #endif @@ -1711,7 +1711,7 @@ } Constant *ConstantExpr::getSExt(Constant *C, Type *Ty, bool OnlyIfReduced) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; #endif @@ -1725,7 +1725,7 @@ } Constant *ConstantExpr::getZExt(Constant *C, Type *Ty, bool OnlyIfReduced) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; #endif @@ -1739,7 +1739,7 @@ } Constant *ConstantExpr::getFPTrunc(Constant *C, Type *Ty, bool OnlyIfReduced) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; #endif @@ -1751,7 +1751,7 @@ } Constant *ConstantExpr::getFPExtend(Constant *C, Type *Ty, bool OnlyIfReduced) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; #endif @@ -1763,7 +1763,7 @@ } Constant *ConstantExpr::getUIToFP(Constant *C, Type *Ty, bool OnlyIfReduced) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; #endif @@ -1774,7 +1774,7 @@ } Constant *ConstantExpr::getSIToFP(Constant *C, Type *Ty, bool OnlyIfReduced) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; #endif @@ -1785,7 +1785,7 @@ } Constant *ConstantExpr::getFPToUI(Constant *C, Type *Ty, bool OnlyIfReduced) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; #endif @@ -1796,7 +1796,7 @@ } Constant *ConstantExpr::getFPToSI(Constant *C, Type *Ty, bool OnlyIfReduced) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; #endif @@ -1874,7 +1874,7 @@ assert(C1->getType() == C2->getType() && "Operand types in binary constant expression should match"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG switch (Opcode) { case Instruction::Add: case Instruction::Sub: Index: lib/IR/DIBuilder.cpp =================================================================== --- lib/IR/DIBuilder.cpp +++ lib/IR/DIBuilder.cpp @@ -567,7 +567,7 @@ } static void checkGlobalVariableScope(DIScope *Context) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (auto *CT = dyn_cast_or_null(getNonCompileUnitScope(Context))) assert(CT->getIdentifier().empty() && Index: lib/IR/DebugInfoMetadata.cpp =================================================================== --- lib/IR/DebugInfoMetadata.cpp +++ lib/IR/DebugInfoMetadata.cpp @@ -167,7 +167,7 @@ return StringRef(); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static bool isCanonical(const MDString *S) { return !S || !S->getString().empty(); } Index: lib/IR/DebugLoc.cpp =================================================================== --- lib/IR/DebugLoc.cpp +++ lib/IR/DebugLoc.cpp @@ -68,7 +68,7 @@ } void DebugLoc::dump() const { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (!Loc) return; Index: lib/IR/Instructions.cpp =================================================================== --- lib/IR/Instructions.cpp +++ lib/IR/Instructions.cpp @@ -228,7 +228,7 @@ assert(getNumOperands() == Args.size() + 1 && "NumOperands not set up?"); Op<-1>() = Func; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG assert((Args.size() == FTy->getNumParams() || (FTy->isVarArg() && Args.size() > FTy->getNumParams())) && "Calling a function with bad signature!"); @@ -504,7 +504,7 @@ Op<-2>() = IfNormal; Op<-1>() = IfException; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG assert(((Args.size() == FTy->getNumParams()) || (FTy->isVarArg() && Args.size() > FTy->getNumParams())) && "Invoking a function with bad signature"); @@ -1017,7 +1017,7 @@ Op<-1>() = IfTrue; Op<-2>() = IfFalse; Op<-3>() = Cond; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG AssertOK(); #endif } @@ -1038,7 +1038,7 @@ Op<-1>() = IfTrue; Op<-2>() = IfFalse; Op<-3>() = Cond; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG AssertOK(); #endif } @@ -1919,7 +1919,7 @@ (void)LHS; (void)RHS; // Silence warnings. assert(LHS->getType() == RHS->getType() && "Binary operator operand types must match!"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG switch (iType) { case Add: case Sub: case Mul: Index: lib/IR/LLVMContextImpl.cpp =================================================================== --- lib/IR/LLVMContextImpl.cpp +++ lib/IR/LLVMContextImpl.cpp @@ -203,7 +203,7 @@ unsigned MDNodeOpsKey::calculateHash(MDNode *N, unsigned Offset) { unsigned Hash = hash_combine_range(N->op_begin() + Offset, N->op_end()); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG { SmallVector MDs(N->op_begin() + Offset, N->op_end()); unsigned RawHash = calculateHash(MDs); Index: lib/IR/LegacyPassManager.cpp =================================================================== --- lib/IR/LegacyPassManager.cpp +++ lib/IR/LegacyPassManager.cpp @@ -851,7 +851,7 @@ /// verifyPreservedAnalysis -- Verify analysis preserved by pass P. void PMDataManager::verifyPreservedAnalysis(Pass *P) { // Don't do this unless assertions are enabled. -#ifdef NDEBUG +#ifdef LLVM_NDEBUG return; #endif AnalysisUsage *AnUsage = TPM->findAnalysisUsage(P); @@ -1245,7 +1245,7 @@ // When Pass manager is not able to order required analysis info, Pass manager // checks whether any lower level manager will be able to provide this // analysis info on demand or not. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Unable to schedule '" << RequiredPass->getPassName(); dbgs() << "' required by '" << P->getPassName() << "'\n"; #endif Index: lib/IR/Type.cpp =================================================================== --- lib/IR/Type.cpp +++ lib/IR/Type.cpp @@ -745,7 +745,7 @@ PointerType::PointerType(Type *E, unsigned AddrSpace) : SequentialType(PointerTyID, E) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const unsigned oldNCT = NumContainedTys; #endif setSubclassData(AddrSpace); Index: lib/IR/Value.cpp =================================================================== --- lib/IR/Value.cpp +++ lib/IR/Value.cpp @@ -67,7 +67,7 @@ if (isUsedByMetadata()) ValueAsMetadata::handleDeletion(this); -#ifndef NDEBUG // Only in -g mode... +#ifndef LLVM_NDEBUG // Only in -g mode... // Check to make sure that there are no uses of this value that are still // around when the value is destroyed. If there are, then we have a dangling // reference and something is wrong. This code is here to print out where @@ -313,7 +313,7 @@ ST->reinsertValue(this); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static bool contains(SmallPtrSetImpl &Cache, ConstantExpr *Expr, Constant *C) { if (!Cache.insert(Expr).second) @@ -678,7 +678,7 @@ // All callbacks, weak references, and assertingVHs should be dropped by now. if (V->HasValueHandle) { -#ifndef NDEBUG // Only in +Asserts mode... +#ifndef LLVM_NDEBUG // Only in +Asserts mode... dbgs() << "While deleting: " << *V->getType() << " %" << V->getName() << "\n"; if (pImpl->ValueHandles[V]->getKind() == Assert) @@ -735,7 +735,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // If any new tracking or weak value handles were added while processing the // list, then complain about it now. if (Old->HasValueHandle) Index: lib/IR/ValueSymbolTable.cpp =================================================================== --- lib/IR/ValueSymbolTable.cpp +++ lib/IR/ValueSymbolTable.cpp @@ -23,7 +23,7 @@ // Class destructor ValueSymbolTable::~ValueSymbolTable() { -#ifndef NDEBUG // Only do this in -g mode... +#ifndef LLVM_NDEBUG // Only do this in -g mode... for (iterator VI = vmap.begin(), VE = vmap.end(); VI != VE; ++VI) dbgs() << "Value still in symbol table! Type = '" << *VI->getValue()->getType() << "' Name = '" Index: lib/Linker/LinkModules.cpp =================================================================== --- lib/Linker/LinkModules.cpp +++ lib/Linker/LinkModules.cpp @@ -260,7 +260,7 @@ // These are types that LLVM itself will unique. bool IsUniqued = !isa(Ty) || cast(Ty)->isLiteral(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (!IsUniqued) { for (auto &Pair : MappedTypes) { assert(!(Pair.first != Ty && Pair.second == Ty) && Index: lib/MC/MCAsmStreamer.cpp =================================================================== --- lib/MC/MCAsmStreamer.cpp +++ lib/MC/MCAsmStreamer.cpp @@ -320,7 +320,7 @@ void MCAsmStreamer::EmitLOHDirective(MCLOHType Kind, const MCLOHArgs &Args) { StringRef str = MCLOHIdToName(Kind); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG int NbArgs = MCLOHIdToNbArgs(Kind); assert(NbArgs != -1 && ((size_t)NbArgs) == Args.size() && "Malformed LOH!"); assert(str != "" && "Invalid LOH name"); Index: lib/MC/MCAssembler.cpp =================================================================== --- lib/MC/MCAssembler.cpp +++ lib/MC/MCAssembler.cpp @@ -1122,7 +1122,7 @@ } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MCFragment::dump() { raw_ostream &OS = llvm::errs(); Index: lib/MC/MCExpr.cpp =================================================================== --- lib/MC/MCExpr.cpp +++ lib/MC/MCExpr.cpp @@ -128,7 +128,7 @@ llvm_unreachable("Invalid expression kind!"); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MCExpr::dump() const { dbgs() << *this; dbgs() << '\n'; Index: lib/MC/MCInst.cpp =================================================================== --- lib/MC/MCInst.cpp +++ lib/MC/MCInst.cpp @@ -32,7 +32,7 @@ OS << ">"; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MCOperand::dump() const { print(dbgs()); dbgs() << "\n"; @@ -63,7 +63,7 @@ OS << ">"; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MCInst::dump() const { print(dbgs()); dbgs() << "\n"; Index: lib/MC/MCLabel.cpp =================================================================== --- lib/MC/MCLabel.cpp +++ lib/MC/MCLabel.cpp @@ -16,7 +16,7 @@ OS << '"' << getInstance() << '"'; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MCLabel::dump() const { print(dbgs()); } Index: lib/MC/MCObjectStreamer.cpp =================================================================== --- lib/MC/MCObjectStreamer.cpp +++ lib/MC/MCObjectStreamer.cpp @@ -280,7 +280,7 @@ IF->getContents().append(Code.begin(), Code.end()); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static const char *const BundlingNotImplementedMsg = "Aligned bundling is not implemented for this object format"; #endif Index: lib/MC/MCParser/MCAsmParser.cpp =================================================================== --- lib/MC/MCParser/MCAsmParser.cpp +++ lib/MC/MCParser/MCAsmParser.cpp @@ -44,7 +44,7 @@ } void MCParsedAsmOperand::dump() const { -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) dbgs() << " " << *this; #endif } Index: lib/MC/MCSection.cpp =================================================================== --- lib/MC/MCSection.cpp +++ lib/MC/MCSection.cpp @@ -85,7 +85,7 @@ return IP; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MCSection::dump() { raw_ostream &OS = llvm::errs(); Index: lib/MC/MCSubtargetInfo.cpp =================================================================== --- lib/MC/MCSubtargetInfo.cpp +++ lib/MC/MCSubtargetInfo.cpp @@ -78,7 +78,7 @@ assert(ProcSchedModels && "Processor machine model not available!"); unsigned NumProcs = ProcDesc.size(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (size_t i = 1; i < NumProcs; i++) { assert(strcmp(ProcSchedModels[i - 1].Key, ProcSchedModels[i].Key) < 0 && "Processor machine model table is not sorted"); Index: lib/MC/MCSymbol.cpp =================================================================== --- lib/MC/MCSymbol.cpp +++ lib/MC/MCSymbol.cpp @@ -73,6 +73,6 @@ OS << '"'; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MCSymbol::dump() const { dbgs() << *this; } #endif Index: lib/MC/MCValue.cpp =================================================================== --- lib/MC/MCValue.cpp +++ lib/MC/MCValue.cpp @@ -37,7 +37,7 @@ OS << " + " << getConstant(); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void MCValue::dump() const { print(dbgs()); } Index: lib/MC/MachObjectWriter.cpp =================================================================== --- lib/MC/MachObjectWriter.cpp +++ lib/MC/MachObjectWriter.cpp @@ -900,7 +900,7 @@ // Write out the loh commands, if there is one. if (LOHSize) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned Start = OS.tell(); #endif Asm.getLOHContainer().emit(*this, Layout); Index: lib/MC/SubtargetFeature.cpp =================================================================== --- lib/MC/SubtargetFeature.cpp +++ lib/MC/SubtargetFeature.cpp @@ -233,7 +233,7 @@ if (CPUTable.empty() || FeatureTable.empty()) return FeatureBitset(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (size_t i = 1, e = CPUTable.size(); i != e; ++i) { assert(strcmp(CPUTable[i - 1].Key, CPUTable[i].Key) < 0 && "CPU table is not sorted"); @@ -291,7 +291,7 @@ OS << "\n"; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) /// dump - Dump feature info. /// void SubtargetFeatures::dump() const { Index: lib/Object/COFFObjectFile.cpp =================================================================== --- lib/Object/COFFObjectFile.cpp +++ lib/Object/COFFObjectFile.cpp @@ -103,7 +103,7 @@ reinterpret_cast(Ref.p); assert(!checkOffset(Data, uintptr_t(Addr), sizeof(*Addr))); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Verify that the symbol points to a valid entry in the symbol table. uintptr_t Offset = uintptr_t(Addr) - uintptr_t(base()); @@ -117,7 +117,7 @@ const coff_section *COFFObjectFile::toSec(DataRefImpl Ref) const { const coff_section *Addr = reinterpret_cast(Ref.p); -# ifndef NDEBUG +# ifndef LLVM_NDEBUG // Verify that the section points to a valid entry in the section table. if (Addr < SectionTable || Addr >= (SectionTable + getNumberOfSections())) report_fatal_error("Section was outside of section table."); @@ -887,7 +887,7 @@ if (Symbol.getNumberOfAuxSymbols() > 0) { // AUX data comes immediately after the symbol in COFF Aux = reinterpret_cast(Symbol.getRawPtr()) + SymbolSize; -# ifndef NDEBUG +# ifndef LLVM_NDEBUG // Verify that the Aux symbol points to a valid entry in the symbol table. uintptr_t Offset = uintptr_t(Aux) - uintptr_t(base()); if (Offset < getPointerToSymbolTable() || Index: lib/Option/OptTable.cpp =================================================================== --- lib/Option/OptTable.cpp +++ lib/Option/OptTable.cpp @@ -46,7 +46,7 @@ return (a < b) ? -1 : 1; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static int StrCmpOptionName(const char *A, const char *B) { if (int N = StrCmpOptionNameIgnoreCase(A, B)) return N; @@ -108,7 +108,7 @@ } assert(FirstSearchableIndex != 0 && "No searchable options?"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Check that everything after the first searchable option is a // regular option class. for (unsigned i = FirstSearchableIndex, e = getNumOptions(); i != e; ++i) { Index: lib/Passes/PassBuilder.cpp =================================================================== --- lib/Passes/PassBuilder.cpp +++ lib/Passes/PassBuilder.cpp @@ -113,7 +113,7 @@ #include "PassRegistry.def" } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static bool isModulePassName(StringRef Name) { #define MODULE_PASS(NAME, CREATE_PASS) if (Name == NAME) return true; #define MODULE_ANALYSIS(NAME, CREATE_PASS) \ Index: lib/Support/CommandLine.cpp =================================================================== --- lib/Support/CommandLine.cpp +++ lib/Support/CommandLine.cpp @@ -1752,7 +1752,7 @@ #else OS << "Optimized build"; #endif -#ifndef NDEBUG +#ifndef LLVM_NDEBUG OS << " with assertions"; #endif std::string CPU = sys::getHostCPUName(); Index: lib/Support/Debug.cpp =================================================================== --- lib/Support/Debug.cpp +++ lib/Support/Debug.cpp @@ -35,8 +35,8 @@ using namespace llvm; -// Even though LLVM might be built with NDEBUG, define symbols that the code -// built without NDEBUG can depend on via the llvm/Support/Debug.h header. +// Even though LLVM might be built with LLVM_NDEBUG, define symbols that the code +// built without LLVM_NDEBUG can depend on via the llvm/Support/Debug.h header. namespace llvm { /// Exported boolean set by the -debug option. bool DebugFlag = false; @@ -69,8 +69,8 @@ } // namespace llvm -// All Debug.h functionality is a no-op in NDEBUG mode. -#ifndef NDEBUG +// All Debug.h functionality is a no-op in LLVM_NDEBUG mode. +#ifndef LLVM_NDEBUG // -debug - Command line option to enable the DEBUG statements in the passes. // This flag may only be enabled in debug builds. @@ -110,9 +110,9 @@ // Signal handlers - dump debug output on termination. static void debug_user_sig_handler(void *Cookie) { - // This is a bit sneaky. Since this is under #ifndef NDEBUG, we + // This is a bit sneaky. Since this is under #ifndef LLVM_NDEBUG, we // know that debug mode is enabled and dbgs() really is a - // circular_raw_ostream. If NDEBUG is defined, then dbgs() == + // circular_raw_ostream. If LLVM_NDEBUG is defined, then dbgs() == // errs() but this will never be invoked. llvm::circular_raw_ostream &dbgout = static_cast(llvm::dbgs()); Index: lib/Support/IntervalMap.cpp =================================================================== --- lib/Support/IntervalMap.cpp +++ lib/Support/IntervalMap.cpp @@ -144,7 +144,7 @@ --NewSize[PosPair.first]; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Sum = 0; for (unsigned n = 0; n != Nodes; ++n) { assert(NewSize[n] <= Capacity && "Overallocated node"); Index: lib/Support/Statistic.cpp =================================================================== --- lib/Support/Statistic.cpp +++ lib/Support/Statistic.cpp @@ -137,7 +137,7 @@ } void llvm::PrintStatistics() { -#if !defined(NDEBUG) || defined(LLVM_ENABLE_STATS) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_STATS) StatisticInfo &Stats = *StatInfo; // Statistics not enabled? Index: lib/Support/raw_ostream.cpp =================================================================== --- lib/Support/raw_ostream.cpp +++ lib/Support/raw_ostream.cpp @@ -828,7 +828,7 @@ //===----------------------------------------------------------------------===// raw_null_ostream::~raw_null_ostream() { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // ~raw_ostream asserts that the buffer is empty. This isn't necessary // with raw_null_ostream, but it's better to have raw_null_ostream follow // the rules than to change the rules just for raw_null_ostream. Index: lib/Support/regengine.inc =================================================================== --- lib/Support/regengine.inc +++ lib/Support/regengine.inc @@ -244,7 +244,7 @@ if (endp == NULL) break; /* defeat */ /* try it on a shorter possibility */ -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (i = 1; i <= m->g->nsub; i++) { assert(m->pmatch[i].rm_so == -1); assert(m->pmatch[i].rm_eo == -1); Index: lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp =================================================================== --- lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp +++ lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp @@ -106,7 +106,7 @@ /// A "color", which is either even or odd. Yes, these aren't really colors /// but the algorithm is conceptually doing two-color graph coloring. enum class Color { Even, Odd }; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static const char *ColorNames[2] = { "Even", "Odd" }; #endif @@ -515,7 +515,7 @@ if (J.isDead()) for (; AI.isValid(); ++AI) AvailableRegs.reset(*AI); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG else for (; AI.isValid(); ++AI) assert(!AvailableRegs[*AI] && Index: lib/Target/AArch64/AArch64BranchRelaxation.cpp =================================================================== --- lib/Target/AArch64/AArch64BranchRelaxation.cpp +++ lib/Target/AArch64/AArch64BranchRelaxation.cpp @@ -117,7 +117,7 @@ /// verify - check BBOffsets, BBSizes, alignment of islands void AArch64BranchRelaxation::verify() { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned PrevNum = MF->begin()->getNumber(); for (MachineBasicBlock &MBB : *MF) { unsigned Align = MBB.getAlignment(); Index: lib/Target/AArch64/AArch64CollectLOH.cpp =================================================================== --- lib/Target/AArch64/AArch64CollectLOH.cpp +++ lib/Target/AArch64/AArch64CollectLOH.cpp @@ -460,7 +460,7 @@ ReachableUses, RegToId.size()); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// print the result of the reaching definition algorithm. static void printReachingDef(const InstrToInstrs *ColorOpToReachedUses, unsigned NbReg, const TargetRegisterInfo *TRI, @@ -481,7 +481,7 @@ } } } -#endif // NDEBUG +#endif // LLVM_NDEBUG /// Answer the following question: Can Def be one of the definition /// involved in a part of a LOH? @@ -778,7 +778,7 @@ // FIXME: When the statistics are not important, // This initial filtering loop can be merged into the next loop. // Currently, we didn't do it to have the same code for both DEBUG and - // NDEBUG builds. Indeed, the iterator of the second loop would need + // LLVM_NDEBUG builds. Indeed, the iterator of the second loop would need // to be changed. SetOfMachineInstr PotentialCandidates; SetOfMachineInstr PotentialADROpportunities; Index: lib/Target/AArch64/AArch64ISelLowering.cpp =================================================================== --- lib/Target/AArch64/AArch64ISelLowering.cpp +++ lib/Target/AArch64/AArch64ISelLowering.cpp @@ -986,7 +986,7 @@ MachineBasicBlock *BB) const { switch (MI->getOpcode()) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG MI->dump(); #endif llvm_unreachable("Unexpected instruction for custom inserter!"); Index: lib/Target/AArch64/AArch64PBQPRegAlloc.cpp =================================================================== --- lib/Target/AArch64/AArch64PBQPRegAlloc.cpp +++ lib/Target/AArch64/AArch64PBQPRegAlloc.cpp @@ -33,7 +33,7 @@ namespace { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool isFPReg(unsigned reg) { return AArch64::FPR32RegClass.contains(reg) || AArch64::FPR64RegClass.contains(reg) || Index: lib/Target/AArch64/AArch64PromoteConstant.cpp =================================================================== --- lib/Target/AArch64/AArch64PromoteConstant.cpp +++ lib/Target/AArch64/AArch64PromoteConstant.cpp @@ -467,7 +467,7 @@ for (const auto &FctToInstPtsIt : InsPtsPerFunc) { const InsertionPoints &InsertPts = FctToInstPtsIt.second; // Do more checking for debug purposes. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DominatorTree &DT = getAnalysis( *FctToInstPtsIt.first).getDomTree(); #endif @@ -498,7 +498,7 @@ // Update the dominated uses. for (Use *Use : IPI.second) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG assert(DT.dominates(LoadedCst, findInsertionPoint(*Use)) && "Inserted definition does not dominate all its uses!"); #endif Index: lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp =================================================================== --- lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp +++ lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp @@ -675,7 +675,7 @@ } bool AArch64InstPrinter::printSysAlias(const MCInst *MI, raw_ostream &O) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned Opcode = MI->getOpcode(); assert(Opcode == AArch64::SYSxt && "Invalid opcode for SYS alias!"); #endif Index: lib/Target/AMDGPU/SILowerControlFlow.cpp =================================================================== --- lib/Target/AMDGPU/SILowerControlFlow.cpp +++ lib/Target/AMDGPU/SILowerControlFlow.cpp @@ -297,7 +297,7 @@ DebugLoc DL = MI.getDebugLoc(); const MachineOperand &Op = MI.getOperand(0); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const SIMachineFunctionInfo *MFI = MBB.getParent()->getInfo(); // Kill is only allowed in pixel / geometry shaders. Index: lib/Target/ARM/ARMBaseInstrInfo.cpp =================================================================== --- lib/Target/ARM/ARMBaseInstrInfo.cpp +++ lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -804,14 +804,14 @@ BeginIdx = BeginIdx + ((SubRegs - 1) * Spacing); Spacing = -Spacing; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG SmallSet DstRegs; #endif for (unsigned i = 0; i != SubRegs; ++i) { unsigned Dst = TRI->getSubReg(DestReg, BeginIdx + i * Spacing); unsigned Src = TRI->getSubReg(SrcReg, BeginIdx + i * Spacing); assert(Dst && Src && "Bad sub-register"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG assert(!DstRegs.count(Src) && "destructive vector copy"); DstRegs.insert(Dst); #endif Index: lib/Target/ARM/ARMBaseRegisterInfo.cpp =================================================================== --- lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -697,7 +697,7 @@ // call frame setup/destroy instructions have already been eliminated. That // means the stack pointer cannot be used to access the emergency spill slot // when !hasReservedCallFrame(). -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){ assert(TFI->hasReservedCallFrame(MF) && "Cannot use SP to access the emergency spill slot in " @@ -706,7 +706,7 @@ "Cannot use SP to access the emergency spill slot in " "functions with variable sized frame objects"); } -#endif // NDEBUG +#endif // LLVM_NDEBUG assert(!MI.isDebugValue() && "DBG_VALUEs should be handled in target-independent code"); Index: lib/Target/ARM/ARMConstantIslandPass.cpp =================================================================== --- lib/Target/ARM/ARMConstantIslandPass.cpp +++ lib/Target/ARM/ARMConstantIslandPass.cpp @@ -339,7 +339,7 @@ /// verify - check BBOffsets, BBSizes, alignment of islands void ARMConstantIslands::verify() { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (MachineFunction::iterator MBBI = MF->begin(), E = MF->end(); MBBI != E; ++MBBI) { MachineBasicBlock *MBB = MBBI; @@ -1144,7 +1144,7 @@ return isOffsetInRange(UserOffset, CPEOffset, MaxDisp, NegOk); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// BBIsJumpedOver - Return true of the specified basic block's only predecessor /// unconditionally branches to its only successor. static bool BBIsJumpedOver(MachineBasicBlock *MBB) { @@ -1159,7 +1159,7 @@ return PredMI->getOperand(0).getMBB() == Succ; return false; } -#endif // NDEBUG +#endif // LLVM_NDEBUG void ARMConstantIslands::adjustBBOffsetsAfter(MachineBasicBlock *BB) { unsigned BBNum = BB->getNumber(); Index: lib/Target/ARM/ARMExpandPseudoInsts.cpp =================================================================== --- lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -332,7 +332,7 @@ static const NEONLdStTableEntry *LookupNEONLdSt(unsigned Opcode) { const unsigned NumEntries = array_lengthof(NEONLdStTable); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Make sure the table is sorted. static bool TableChecked = false; if (!TableChecked) { Index: lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp =================================================================== --- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -486,7 +486,7 @@ return; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const MCOperand &MO3 = MI->getOperand(Op + 2); unsigned IdxMode = ARM_AM::getAM2IdxMode(MO3.getImm()); assert(IdxMode != ARMII::IndexModePost && "Should be pre or offset index op"); Index: lib/Target/ARM/ThumbRegisterInfo.cpp =================================================================== --- lib/Target/ARM/ThumbRegisterInfo.cpp +++ lib/Target/ARM/ThumbRegisterInfo.cpp @@ -531,7 +531,7 @@ // call frame setup/destroy instructions have already been eliminated. That // means the stack pointer cannot be used to access the emergency spill slot // when !hasReservedCallFrame(). -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){ assert(STI.getFrameLowering()->hasReservedCallFrame(MF) && "Cannot use SP to access the emergency spill slot in " @@ -540,7 +540,7 @@ "Cannot use SP to access the emergency spill slot in " "functions with variable sized frame objects"); } -#endif // NDEBUG +#endif // LLVM_NDEBUG // Special handling of dbg_value instructions. if (MI.isDebugValue()) { Index: lib/Target/BPF/InstPrinter/BPFInstPrinter.cpp =================================================================== --- lib/Target/BPF/InstPrinter/BPFInstPrinter.cpp +++ lib/Target/BPF/InstPrinter/BPFInstPrinter.cpp @@ -33,7 +33,7 @@ } static void printExpr(const MCExpr *Expr, raw_ostream &O) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const MCSymbolRefExpr *SRE; if (const MCBinaryExpr *BE = dyn_cast(Expr)) Index: lib/Target/Hexagon/HexagonBitTracker.cpp =================================================================== --- lib/Target/Hexagon/HexagonBitTracker.cpp +++ lib/Target/Hexagon/HexagonBitTracker.cpp @@ -89,7 +89,7 @@ default: break; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << PrintReg(Reg, &TRI, Sub) << '\n'; #endif llvm_unreachable("Unexpected register/subregister"); Index: lib/Target/Hexagon/HexagonFrameLowering.cpp =================================================================== --- lib/Target/Hexagon/HexagonFrameLowering.cpp +++ lib/Target/Hexagon/HexagonFrameLowering.cpp @@ -993,7 +993,7 @@ } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static void dump_registers(BitVector &Regs, const TargetRegisterInfo &TRI) { dbgs() << '{'; for (int x = Regs.find_first(); x >= 0; x = Regs.find_next(x)) { @@ -1124,7 +1124,7 @@ dbgs() << " }\n"; }); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Verify that all registers were handled. bool MissedReg = false; for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { Index: lib/Target/Hexagon/HexagonGenInsert.cpp =================================================================== --- lib/Target/Hexagon/HexagonGenInsert.cpp +++ lib/Target/Hexagon/HexagonGenInsert.cpp @@ -65,7 +65,7 @@ // The preprocessor gets confused when the DEBUG macro is passed larger // chunks of code. Use this function to detect debugging. inline bool isDebug() { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG return ::llvm::DebugFlag && ::llvm::isCurrentDebugType(DEBUG_TYPE); #else return false; Index: lib/Target/Hexagon/HexagonHardwareLoops.cpp =================================================================== --- lib/Target/Hexagon/HexagonHardwareLoops.cpp +++ lib/Target/Hexagon/HexagonHardwareLoops.cpp @@ -47,7 +47,7 @@ #define DEBUG_TYPE "hwloops" -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static cl::opt HWLoopLimit("hexagon-max-hwloop", cl::Hidden, cl::init(-1)); // Option to create preheader only for a specific function. @@ -74,7 +74,7 @@ MachineRegisterInfo *MRI; MachineDominatorTree *MDT; const HexagonInstrInfo *TII; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static int Counter; #endif @@ -276,7 +276,7 @@ }; char HexagonHardwareLoops::ID = 0; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG int HexagonHardwareLoops::Counter = 0; #endif @@ -1122,7 +1122,7 @@ ENDLOOP = Hexagon::ENDLOOP0; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Stop trying after reaching the limit (if any). int Limit = HWLoopLimit; if (Limit >= 0) { @@ -1822,7 +1822,7 @@ MachineFunction *MF = Header->getParent(); DebugLoc DL; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if ((PHFn != "") && (PHFn != MF->getName())) return nullptr; #endif Index: lib/Target/Hexagon/HexagonISelLowering.cpp =================================================================== --- lib/Target/Hexagon/HexagonISelLowering.cpp +++ lib/Target/Hexagon/HexagonISelLowering.cpp @@ -2284,7 +2284,7 @@ unsigned Opc = Op.getOpcode(); switch (Opc) { default: -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Op.getNode()->dumpr(&DAG); if (Opc > HexagonISD::OP_BEGIN && Opc < HexagonISD::OP_END) errs() << "Check for a non-legal type in this operation\n"; Index: lib/Target/Hexagon/HexagonMachineScheduler.h =================================================================== --- lib/Target/Hexagon/HexagonMachineScheduler.h +++ lib/Target/Hexagon/HexagonMachineScheduler.h @@ -232,7 +232,7 @@ CandResult pickNodeFromQueue(ReadyQueue &Q, const RegPressureTracker &RPTracker, SchedCandidate &Candidate); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void traceCandidate(const char *Label, const ReadyQueue &Q, SUnit *SU, PressureChange P = PressureChange()); #endif Index: lib/Target/Hexagon/HexagonMachineScheduler.cpp =================================================================== --- lib/Target/Hexagon/HexagonMachineScheduler.cpp +++ lib/Target/Hexagon/HexagonMachineScheduler.cpp @@ -116,7 +116,7 @@ } Packet.push_back(SU); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DEBUG(dbgs() << "Packet[" << TotalPackets << "]:\n"); for (unsigned i = 0, e = Packet.size(); i != e; ++i) { DEBUG(dbgs() << "\t[" << i << "] SU("); @@ -229,7 +229,7 @@ I != E; ++I) { unsigned PredReadyCycle = I->getSUnit()->TopReadyCycle; unsigned MinLatency = I->getLatency(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Top.MaxMinLatency = std::max(MinLatency, Top.MaxMinLatency); #endif if (SU->TopReadyCycle < PredReadyCycle + MinLatency) @@ -248,7 +248,7 @@ I != E; ++I) { unsigned SuccReadyCycle = I->getSUnit()->BotReadyCycle; unsigned MinLatency = I->getLatency(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Bot.MaxMinLatency = std::max(MinLatency, Bot.MaxMinLatency); #endif if (SU->BotReadyCycle < SuccReadyCycle + MinLatency) @@ -408,7 +408,7 @@ return nullptr; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void ConvergingVLIWScheduler::traceCandidate(const char *Label, const ReadyQueue &Q, SUnit *SU, PressureChange P) { Index: lib/Target/Hexagon/HexagonRegisterInfo.cpp =================================================================== --- lib/Target/Hexagon/HexagonRegisterInfo.cpp +++ lib/Target/Hexagon/HexagonRegisterInfo.cpp @@ -203,7 +203,7 @@ return; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const Function *F = MF.getFunction(); dbgs() << "In function "; if (F) dbgs() << F->getName(); Index: lib/Target/Hexagon/HexagonVLIWPacketizer.cpp =================================================================== --- lib/Target/Hexagon/HexagonVLIWPacketizer.cpp +++ lib/Target/Hexagon/HexagonVLIWPacketizer.cpp @@ -469,7 +469,7 @@ static MachineOperand& GetPostIncrementOperand(MachineInstr *MI, const HexagonInstrInfo *QII) { assert(QII->isPostIncrement(MI) && "Not a post increment operation."); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Post Increment means duplicates. Use dense map to find duplicates in the // list. Caution: Densemap initializes with the minimum of 64 buckets, // whereas there are at most 5 operands in the post increment. Index: lib/Target/MSP430/MSP430ISelLowering.cpp =================================================================== --- lib/Target/MSP430/MSP430ISelLowering.cpp +++ lib/Target/MSP430/MSP430ISelLowering.cpp @@ -457,7 +457,7 @@ switch (RegVT.getSimpleVT().SimpleTy) { default: { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG errs() << "LowerFormalArguments Unhandled argument type: " << RegVT.getSimpleVT().SimpleTy << "\n"; #endif Index: lib/Target/Mips/Mips16ISelLowering.cpp =================================================================== --- lib/Target/Mips/Mips16ISelLowering.cpp +++ lib/Target/Mips/Mips16ISelLowering.cpp @@ -375,7 +375,7 @@ getMips16HelperFunction (Type* RetTy, ArgListTy &Args, bool &needHelper) const { const unsigned int stubNum = getMips16HelperFunctionStubNumber(Args); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const unsigned int maxStubNum = 10; assert(stubNum <= maxStubNum); const bool validStubNum[maxStubNum+1] = Index: lib/Target/Mips/MipsCCState.cpp =================================================================== --- lib/Target/Mips/MipsCCState.cpp +++ lib/Target/Mips/MipsCCState.cpp @@ -34,7 +34,7 @@ // Check that LibCalls is sorted alphabetically. MipsTargetLowering::LTStr Comp; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (const char *const *I = LibCalls; I < End - 1; ++I) assert(Comp(*I, *(I + 1))); #endif Index: lib/Target/Mips/MipsConstantIslandPass.cpp =================================================================== --- lib/Target/Mips/MipsConstantIslandPass.cpp +++ lib/Target/Mips/MipsConstantIslandPass.cpp @@ -1024,7 +1024,7 @@ return isOffsetInRange(UserOffset, CPEOffset, MaxDisp, NegOk); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// BBIsJumpedOver - Return true of the specified basic block's only predecessor /// unconditionally branches to its only successor. static bool BBIsJumpedOver(MachineBasicBlock *MBB) { Index: lib/Target/Mips/MipsDelaySlotFiller.cpp =================================================================== --- lib/Target/Mips/MipsDelaySlotFiller.cpp +++ lib/Target/Mips/MipsDelaySlotFiller.cpp @@ -280,7 +280,7 @@ if (!MO.isReg() || !MO.isDef() || !(R = MO.getReg())) continue; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const MachineFunction &MF = *MBB.getParent(); assert(MF.getSubtarget().getRegisterInfo()->getAllocatableSet(MF).test(R) && "Shouldn't move an instruction with unallocatable registers across " Index: lib/Target/Mips/MipsISelDAGToDAG.cpp =================================================================== --- lib/Target/Mips/MipsISelDAGToDAG.cpp +++ lib/Target/Mips/MipsISelDAGToDAG.cpp @@ -208,7 +208,7 @@ case ISD::GLOBAL_OFFSET_TABLE: return getGlobalBaseReg(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG case ISD::LOAD: case ISD::STORE: assert((Subtarget->systemSupportsUnalignedAccess() || Index: lib/Target/Mips/MipsMachineFunction.h =================================================================== --- lib/Target/Mips/MipsMachineFunction.h +++ lib/Target/Mips/MipsMachineFunction.h @@ -42,7 +42,7 @@ private: void printCustom(raw_ostream &O) const override; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG std::string Name; const GlobalValue *Val; #endif Index: lib/Target/Mips/MipsMachineFunction.cpp =================================================================== --- lib/Target/Mips/MipsMachineFunction.cpp +++ lib/Target/Mips/MipsMachineFunction.cpp @@ -26,14 +26,14 @@ // class MipsCallEntry. MipsCallEntry::MipsCallEntry(StringRef N) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Name = N; Val = nullptr; #endif } MipsCallEntry::MipsCallEntry(const GlobalValue *V) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Val = V; #endif } @@ -52,7 +52,7 @@ void MipsCallEntry::printCustom(raw_ostream &O) const { O << "MipsCallEntry: "; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (Val) O << Val->getName(); else Index: lib/Target/PowerPC/PPC.h =================================================================== --- lib/Target/PowerPC/PPC.h +++ lib/Target/PowerPC/PPC.h @@ -31,7 +31,7 @@ class MCInst; FunctionPass *createPPCCTRLoops(PPCTargetMachine &TM); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG FunctionPass *createPPCCTRLoopsVerify(); #endif FunctionPass *createPPCLoopDataPrefetchPass(); Index: lib/Target/PowerPC/PPCCTRLoops.cpp =================================================================== --- lib/Target/PowerPC/PPCCTRLoops.cpp +++ lib/Target/PowerPC/PPCCTRLoops.cpp @@ -47,7 +47,7 @@ #include "llvm/Transforms/Utils/Local.h" #include "llvm/Transforms/Utils/LoopUtils.h" -#ifndef NDEBUG +#ifndef LLVM_NDEBUG #include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -61,7 +61,7 @@ #define DEBUG_TYPE "ctrloops" -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static cl::opt CTRLoopLimit("ppc-max-ctrloop", cl::Hidden, cl::init(-1)); #endif @@ -69,7 +69,7 @@ namespace llvm { void initializePPCCTRLoopsPass(PassRegistry&); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void initializePPCCTRLoopsVerifyPass(PassRegistry&); #endif } @@ -77,7 +77,7 @@ namespace { struct PPCCTRLoops : public FunctionPass { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static int Counter; #endif @@ -115,11 +115,11 @@ }; char PPCCTRLoops::ID = 0; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG int PPCCTRLoops::Counter = 0; #endif -#ifndef NDEBUG +#ifndef LLVM_NDEBUG struct PPCCTRLoopsVerify : public MachineFunctionPass { public: static char ID; @@ -140,7 +140,7 @@ }; char PPCCTRLoopsVerify::ID = 0; -#endif // NDEBUG +#endif // LLVM_NDEBUG } // end anonymous namespace INITIALIZE_PASS_BEGIN(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops", @@ -155,7 +155,7 @@ return new PPCCTRLoops(TM); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG INITIALIZE_PASS_BEGIN(PPCCTRLoopsVerify, "ppc-ctr-loops-verify", "PowerPC CTR Loops Verify", false, false) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree) @@ -165,7 +165,7 @@ FunctionPass *llvm::createPPCCTRLoopsVerify() { return new PPCCTRLoopsVerify(); } -#endif // NDEBUG +#endif // LLVM_NDEBUG bool PPCCTRLoops::runOnFunction(Function &F) { LI = &getAnalysis().getLoopInfo(); @@ -432,7 +432,7 @@ if (MadeChange) return MadeChange; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Stop trying after reaching the limit (if any). int Limit = CTRLoopLimit; if (Limit >= 0) { @@ -571,7 +571,7 @@ return MadeChange; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static bool clobbersCTR(const MachineInstr *MI) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); @@ -679,5 +679,5 @@ return false; } -#endif // NDEBUG +#endif // LLVM_NDEBUG Index: lib/Target/PowerPC/PPCISelLowering.cpp =================================================================== --- lib/Target/PowerPC/PPCISelLowering.cpp +++ lib/Target/PowerPC/PPCISelLowering.cpp @@ -4538,7 +4538,7 @@ } if (Result) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG errs() << "Call operand #" << i << " has unhandled type " << EVT(ArgVT).getEVTString() << "\n"; #endif Index: lib/Target/PowerPC/PPCTargetMachine.cpp =================================================================== --- lib/Target/PowerPC/PPCTargetMachine.cpp +++ lib/Target/PowerPC/PPCTargetMachine.cpp @@ -332,7 +332,7 @@ // Install an instruction selector. addPass(createPPCISelDag(getPPCTargetMachine())); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None) addPass(createPPCCTRLoopsVerify()); #endif Index: lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp =================================================================== --- lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp +++ lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp @@ -149,7 +149,7 @@ if (MI.getOpcode() == SP::TLS_CALL) { // No fixups for __tls_get_addr. Will emit for fixups for tls_symbol in // encodeInstruction. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Verify that the callee is actually __tls_get_addr. const SparcMCExpr *SExpr = dyn_cast(MO.getExpr()); assert(SExpr && SExpr->getSubExpr()->getKind() == MCExpr::SymbolRef && Index: lib/Target/Sparc/SparcAsmPrinter.cpp =================================================================== --- lib/Target/Sparc/SparcAsmPrinter.cpp +++ lib/Target/Sparc/SparcAsmPrinter.cpp @@ -300,7 +300,7 @@ const MachineOperand &MO = MI->getOperand (opNum); SparcMCExpr::VariantKind TF = (SparcMCExpr::VariantKind) MO.getTargetFlags(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Verify the target flags. if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) { if (MI->getOpcode() == SP::CALL) Index: lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp =================================================================== --- lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp +++ lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp @@ -47,7 +47,7 @@ #include "X86GenDisassemblerTables.inc" -#ifndef NDEBUG +#ifndef LLVM_NDEBUG #define debug(s) do { Debug(__FILE__, __LINE__, s); } while (0) #else #define debug(s) do { } while (0) Index: lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp =================================================================== --- lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -236,7 +236,7 @@ /// Is64BitMemOperand - Return true if the specified instruction has /// a 64-bit memory operand. Op specifies the operand # of the memoperand. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static bool Is64BitMemOperand(const MCInst &MI, unsigned Op) { const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); @@ -1487,7 +1487,7 @@ if (TSFlags & X86II::Has3DNow0F0FOpcode) EmitByte(X86II::getBaseOpcodeFor(TSFlags), CurByte, OS); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // FIXME: Verify. if (/*!Desc.isVariadic() &&*/ CurOp != NumOps) { errs() << "Cannot encode all operands of: "; Index: lib/Target/X86/X86FloatingPoint.cpp =================================================================== --- lib/Target/X86/X86FloatingPoint.cpp +++ lib/Target/X86/X86FloatingPoint.cpp @@ -158,7 +158,7 @@ // Shuffle live registers to match the expectations of successor blocks. void finishBlockStack(); -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void dumpStack() const { dbgs() << "Stack contents:"; for (unsigned i = 0; i != StackTop; ++i) { @@ -547,7 +547,7 @@ }; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) { for (unsigned i = 0; i != NumEntries-1; ++i) if (!(Table[i] < Table[i+1])) return false; @@ -562,7 +562,7 @@ return -1; } -#ifdef NDEBUG +#ifdef LLVM_NDEBUG #define ASSERT_SORTED(TABLE) #else #define ASSERT_SORTED(TABLE) \ @@ -1033,7 +1033,7 @@ /// void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) { MachineInstr *MI = I; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG unsigned NumOps = MI->getDesc().getNumOperands(); assert(NumOps >= 2 && "FPRW instructions must have 2 ops!!"); #endif @@ -1443,7 +1443,7 @@ DEBUG(dbgs() << "Asm uses " << NumSTUses << " fixed regs, pops " << NumSTPopped << ", and defines " << NumSTDefs << " regs.\n"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // If any input operand uses constraint "f", all output register // constraints must be early-clobber defs. for (unsigned I = 0, E = MI->getNumOperands(); I < E; ++I) Index: lib/Target/X86/X86FrameLowering.cpp =================================================================== --- lib/Target/X86/X86FrameLowering.cpp +++ lib/Target/X86/X86FrameLowering.cpp @@ -1200,7 +1200,7 @@ // Does not include any dynamic realign. const uint64_t StackSize = MFI->getStackSize(); { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Note: LLVM arranges the stack as: // Args > Saved RetPC (<--FP) > CSRs > dynamic alignment (<--BP) // > "Stack Slots" (<--SP) Index: lib/Target/X86/X86ISelDAGToDAG.cpp =================================================================== --- lib/Target/X86/X86ISelDAGToDAG.cpp +++ lib/Target/X86/X86ISelDAGToDAG.cpp @@ -102,7 +102,7 @@ Base_Reg = Reg; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void dump() { dbgs() << "X86ISelAddressMode " << this << '\n'; dbgs() << "Base_Reg "; Index: lib/Target/X86/X86ISelLowering.cpp =================================================================== --- lib/Target/X86/X86ISelLowering.cpp +++ lib/Target/X86/X86ISelLowering.cpp @@ -13584,7 +13584,7 @@ SDLoc dl(Op); if (isFP) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG MVT EltVT = Op0.getSimpleValueType().getVectorElementType(); assert(EltVT == MVT::f32 || EltVT == MVT::f64); #endif @@ -16448,7 +16448,7 @@ if (!TFI.hasFP(MF)) report_fatal_error("register " + StringRef(RegName) + " is allocatable: function has no frame pointer"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG else { const X86RegisterInfo *RegInfo = Subtarget->getRegisterInfo(); unsigned FrameReg = @@ -21595,7 +21595,7 @@ // matter. Check that the upper masks are repeats and remove them. if (VT.getSizeInBits() > 128) { int LaneElts = 128 / VT.getScalarSizeInBits(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (int i = 1, NumLanes = VT.getSizeInBits() / 128; i < NumLanes; ++i) for (int j = 0; j < LaneElts; ++j) assert(Mask[j] == Mask[i * LaneElts + j] - (LaneElts * i) && Index: lib/Target/X86/X86SelectionDAGInfo.cpp =================================================================== --- lib/Target/X86/X86SelectionDAGInfo.cpp +++ lib/Target/X86/X86SelectionDAGInfo.cpp @@ -55,7 +55,7 @@ const X86Subtarget &Subtarget = DAG.getMachineFunction().getSubtarget(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // If the base register might conflict with our physical registers, bail out. const unsigned ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI, X86::ECX, X86::EAX, X86::EDI}; Index: lib/Target/X86/X86WinEHState.cpp =================================================================== --- lib/Target/X86/X86WinEHState.cpp +++ lib/Target/X86/X86WinEHState.cpp @@ -524,7 +524,7 @@ for (auto &Handler : ActionList) { if (auto *CH = dyn_cast(Handler.get())) { auto *BA = cast(CH->getHandlerBlockOrFunc()); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (BasicBlock *Pred : predecessors(BA->getBasicBlock())) assert(Pred->isLandingPad() && "WinEHPrepare failed to split block"); Index: lib/Target/XCore/XCoreFrameLowering.cpp =================================================================== --- lib/Target/XCore/XCoreFrameLowering.cpp +++ lib/Target/XCore/XCoreFrameLowering.cpp @@ -498,7 +498,7 @@ bool isU6 = isImmU6(Amount); if (!isU6 && !isImmU16(Amount)) { // FIX could emit multiple instructions in this case. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG errs() << "eliminateCallFramePseudoInstr size too big: " << Amount << "\n"; #endif Index: lib/Target/XCore/XCoreISelLowering.cpp =================================================================== --- lib/Target/XCore/XCoreISelLowering.cpp +++ lib/Target/XCore/XCoreISelLowering.cpp @@ -1336,7 +1336,7 @@ switch (RegVT.getSimpleVT().SimpleTy) { default: { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG errs() << "LowerFormalArguments Unhandled argument type: " << RegVT.getSimpleVT().SimpleTy << "\n"; #endif Index: lib/Target/XCore/XCoreRegisterInfo.cpp =================================================================== --- lib/Target/XCore/XCoreRegisterInfo.cpp +++ lib/Target/XCore/XCoreRegisterInfo.cpp @@ -274,7 +274,7 @@ int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex); int StackSize = MF.getFrameInfo()->getStackSize(); - #ifndef NDEBUG + #ifndef LLVM_NDEBUG DEBUG(errs() << "\nFunction : " << MF.getName() << "\n"); DEBUG(errs() << "<--------->\n"); Index: lib/Transforms/InstCombine/InstCombineAddSub.cpp =================================================================== --- lib/Transforms/InstCombine/InstCombineAddSub.cpp +++ lib/Transforms/InstCombine/InstCombineAddSub.cpp @@ -184,7 +184,7 @@ private: // Debugging stuff are clustered here. - #ifndef NDEBUG + #ifndef LLVM_NDEBUG unsigned CreateInstrNum; void initCreateInstNum() { CreateInstrNum = 0; } void incCreateInstNum() { CreateInstrNum++; } @@ -743,7 +743,7 @@ LastVal = createFNeg(LastVal); } - #ifndef NDEBUG + #ifndef LLVM_NDEBUG assert(CreateInstrNum == InstrNeeded && "Inconsistent in instruction numbers"); #endif Index: lib/Transforms/InstCombine/InstructionCombining.cpp =================================================================== --- lib/Transforms/InstCombine/InstructionCombining.cpp +++ lib/Transforms/InstCombine/InstructionCombining.cpp @@ -2768,7 +2768,7 @@ Builder->SetInsertPoint(I->getParent(), I); Builder->SetCurrentDebugLocation(I->getDebugLoc()); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG std::string OrigI; #endif DEBUG(raw_string_ostream SS(OrigI); I->print(SS); OrigI = SS.str();); @@ -2806,7 +2806,7 @@ EraseInstFromFunction(*I); } else { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DEBUG(dbgs() << "IC: Mod = " << OrigI << '\n' << " New = " << *I << '\n'); #endif Index: lib/Transforms/Instrumentation/MemorySanitizer.cpp =================================================================== --- lib/Transforms/Instrumentation/MemorySanitizer.cpp +++ lib/Transforms/Instrumentation/MemorySanitizer.cpp @@ -1155,7 +1155,7 @@ void insertShadowCheck(Value *Shadow, Value *Origin, Instruction *OrigIns) { assert(Shadow); if (!InsertChecks) return; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Type *ShadowTy = Shadow->getType(); assert((isa(ShadowTy) || isa(ShadowTy)) && "Can only insert checks for integer and vector shadow types"); Index: lib/Transforms/ObjCARC/ObjCARCOpts.cpp =================================================================== --- lib/Transforms/ObjCARC/ObjCARCOpts.cpp +++ lib/Transforms/ObjCARC/ObjCARCOpts.cpp @@ -165,7 +165,7 @@ "retain+autoreleases eliminated"); STATISTIC(NumRRs, "Number of retain+release paths eliminated"); STATISTIC(NumPeeps, "Number of calls peephole-optimized"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG STATISTIC(NumRetainsBeforeOpt, "Number of retains before optimization"); STATISTIC(NumReleasesBeforeOpt, @@ -536,7 +536,7 @@ void OptimizeReturns(Function &F); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void GatherStatistics(Function &F, bool AfterOptimization = false); #endif @@ -2135,7 +2135,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void ObjCARCOpt::GatherStatistics(Function &F, bool AfterOptimization) { llvm::Statistic &NumRetains = @@ -2194,7 +2194,7 @@ PA.setAA(&getAnalysis()); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (AreStatisticsEnabled()) { GatherStatistics(F, false); } @@ -2232,7 +2232,7 @@ OptimizeReturns(F); // Gather statistics after optimization. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (AreStatisticsEnabled()) { GatherStatistics(F, true); } Index: lib/Transforms/Scalar/GVN.cpp =================================================================== --- lib/Transforms/Scalar/GVN.cpp +++ lib/Transforms/Scalar/GVN.cpp @@ -741,7 +741,7 @@ INITIALIZE_AG_DEPENDENCY(AliasAnalysis) INITIALIZE_PASS_END(GVN, "gvn", "Global Value Numbering", false, false) -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void GVN::dump(DenseMap& d) { errs() << "{\n"; for (DenseMap::iterator I = d.begin(), Index: lib/Transforms/Scalar/IndVarSimplify.cpp =================================================================== --- lib/Transforms/Scalar/IndVarSimplify.cpp +++ lib/Transforms/Scalar/IndVarSimplify.cpp @@ -59,7 +59,7 @@ STATISTIC(NumElimExt , "Number of IV sign/zero extends eliminated"); STATISTIC(NumElimIV , "Number of congruent IVs eliminated"); -// Trip count verification can be enabled by default under NDEBUG if we +// Trip count verification can be enabled by default under LLVM_NDEBUG if we // implement a strong expression equivalence checker in SCEV. Until then, we // use the verify-indvars flag, which may assert in some cases. static cl::opt VerifyIndvars( @@ -2013,7 +2013,7 @@ // Create a rewriter object which we'll use to transform the code with. SCEVExpander Rewriter(*SE, DL, "indvars"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Rewriter.setDebugType(DEBUG_TYPE); #endif @@ -2084,7 +2084,7 @@ // Verify that LFTR, and any other change have not interfered with SCEV's // ability to compute trip count. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (VerifyIndvars && !isa(BackedgeTakenCount)) { SE->forgetLoop(L); const SCEV *NewBECount = SE->getBackedgeTakenCount(L); Index: lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp =================================================================== --- lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp +++ lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp @@ -155,7 +155,7 @@ OS << "\n"; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void dump() { print(dbgs()); } Index: lib/Transforms/Scalar/JumpThreading.cpp =================================================================== --- lib/Transforms/Scalar/JumpThreading.cpp +++ lib/Transforms/Scalar/JumpThreading.cpp @@ -80,7 +80,7 @@ class JumpThreading : public FunctionPass { TargetLibraryInfo *TLI; LazyValueInfo *LVI; -#ifdef NDEBUG +#ifdef LLVM_NDEBUG SmallPtrSet LoopHeaders; #else SmallSet, 16> LoopHeaders; Index: lib/Transforms/Scalar/LICM.cpp =================================================================== --- lib/Transforms/Scalar/LICM.cpp +++ lib/Transforms/Scalar/LICM.cpp @@ -588,7 +588,7 @@ ++NumSunk; Changed = true; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG SmallVector ExitBlocks; CurLoop->getUniqueExitBlocks(ExitBlocks); SmallPtrSet ExitBlockSet(ExitBlocks.begin(), Index: lib/Transforms/Scalar/LoopDistribute.cpp =================================================================== --- lib/Transforms/Scalar/LoopDistribute.cpp +++ lib/Transforms/Scalar/LoopDistribute.cpp @@ -470,7 +470,7 @@ void dump() const { print(dbgs()); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG friend raw_ostream &operator<<(raw_ostream &OS, const InstPartitionContainer &Partitions) { Partitions.print(OS); Index: lib/Transforms/Scalar/LoopStrengthReduce.cpp =================================================================== --- lib/Transforms/Scalar/LoopStrengthReduce.cpp +++ lib/Transforms/Scalar/LoopStrengthReduce.cpp @@ -94,7 +94,7 @@ "enable-lsr-phielim", cl::Hidden, cl::init(true), cl::desc("Enable LSR phi elimination")); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Stress test IV chain generation. static cl::opt StressIVChain( "stress-ivchain", cl::Hidden, cl::init(false), @@ -122,7 +122,7 @@ OS << "[NumUses=" << UsedByIndices.count() << ']'; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void RegSortData::dump() const { print(errs()); errs() << '\n'; } @@ -481,7 +481,7 @@ } } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void Formula::dump() const { print(errs()); errs() << '\n'; } @@ -863,7 +863,7 @@ void Lose(); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Once any of the metrics loses, they must all remain losers. bool isValid() { return ((NumRegs | AddRecCost | NumIVMuls | NumBaseAdds @@ -1061,7 +1061,7 @@ OS << ", plus " << SetupCost << " setup cost"; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void Cost::dump() const { print(errs()); errs() << '\n'; } @@ -1149,7 +1149,7 @@ OS << ", Offset=" << Offset; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void LSRFixup::dump() const { print(errs()); errs() << '\n'; } @@ -1284,7 +1284,7 @@ // Using a register to hold the value of 0 is not profitable. assert((!F.ScaledReg || !F.ScaledReg->isZero()) && "Zero allocated in a scaled register!"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (const SCEV *BaseReg : F.BaseRegs) assert(!BaseReg->isZero() && "Zero allocated in a base register!"); #endif @@ -1353,7 +1353,7 @@ OS << ", widest fixup type: " << *WidestFixupType; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void LSRUse::dump() const { print(errs()); errs() << '\n'; } @@ -3651,7 +3651,7 @@ << " , add offset " << Imm; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void WorkItem::dump() const { print(errs()); errs() << '\n'; } @@ -3861,7 +3861,7 @@ DenseSet VisitedRegs; SmallPtrSet Regs; SmallPtrSet LoserRegs; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG bool ChangedFormulae = false; #endif @@ -3932,7 +3932,7 @@ " in favor of formula "; Best.print(dbgs()); dbgs() << '\n'); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG ChangedFormulae = true; #endif LU.DeleteFormula(F); @@ -4750,7 +4750,7 @@ SCEVExpander Rewriter(SE, L->getHeader()->getModule()->getDataLayout(), "lsr"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Rewriter.setDebugType(DEBUG_TYPE); #endif Rewriter.disableCanonicalMode(); @@ -4806,7 +4806,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // All dominating loops must have preheaders, or SCEVExpander may not be able // to materialize an AddRecExpr whose Start is an outer AddRecExpr. // @@ -4868,7 +4868,7 @@ if (Solution.empty()) return; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Formulae should be legal. for (const LSRUse &LU : Uses) { for (const Formula &F : LU.Formulae) @@ -4930,7 +4930,7 @@ print_uses(OS); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void LSRInstance::dump() const { print(errs()); errs() << '\n'; } @@ -5006,7 +5006,7 @@ SmallVector DeadInsts; const DataLayout &DL = L->getHeader()->getModule()->getDataLayout(); SCEVExpander Rewriter(getAnalysis(), DL, "lsr"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Rewriter.setDebugType(DEBUG_TYPE); #endif unsigned numFolded = Rewriter.replaceCongruentIVs( Index: lib/Transforms/Scalar/Reassociate.cpp =================================================================== --- lib/Transforms/Scalar/Reassociate.cpp +++ lib/Transforms/Scalar/Reassociate.cpp @@ -59,7 +59,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// Print out the expression identified in the Ops list. /// static void PrintOps(Instruction *I, const SmallVectorImpl &Ops) { @@ -584,7 +584,7 @@ LeafMap Leaves; // Leaf -> Total weight so far. SmallVector LeafOrder; // Ensure deterministic leaf output order. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG SmallPtrSet Visited; // For sanity checking the iteration scheme. #endif while (!Worklist.empty()) { Index: lib/Transforms/Scalar/RewriteStatepointsForGC.cpp =================================================================== --- lib/Transforms/Scalar/RewriteStatepointsForGC.cpp +++ lib/Transforms/Scalar/RewriteStatepointsForGC.cpp @@ -222,7 +222,7 @@ return false; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// Returns true if this type contains a gc pointer whether we know how to /// handle that type or not. static bool containsGCPtrType(Type *Ty) { @@ -720,7 +720,7 @@ // analougous to pessimistic data flow and would likely lead to an // overall worse solution. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG auto isExpectedBDVType = [](Value *BDV) { return isa(BDV) || isa(BDV); }; @@ -789,7 +789,7 @@ bool progress = true; while (progress) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG size_t oldSize = states.size(); #endif progress = false; @@ -906,7 +906,7 @@ if (blockIndex != -1) { Value *oldBase = basephi->getIncomingValue(blockIndex); basephi->addIncoming(oldBase, InBB); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Value *base = findBaseOrBDV(InVal, cache); if (!isKnownBaseResult(base)) { // Either conflict or base. @@ -1339,7 +1339,7 @@ token->takeName(CS.getInstruction()); // The GCResult is already inserted, we just need to find it -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Instruction *toReplace = CS.getInstruction(); assert((toReplace->hasNUses(0) || toReplace->hasNUses(1)) && "only valid use before rewrite is gc.result"); @@ -1459,7 +1459,7 @@ StoreInst *Store = new StoreInst(CastedRelocatedValue, Alloca); Store->insertAfter(cast(CastedRelocatedValue)); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG VisitedLiveValues.insert(OriginalValue); #endif } @@ -1484,7 +1484,7 @@ StoreInst *Store = new StoreInst(RematerializedValue, Alloca); Store->insertAfter(RematerializedValue); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG VisitedLiveValues.insert(OriginalValue); #endif } @@ -1494,7 +1494,7 @@ static void relocationViaAlloca( Function &F, DominatorTree &DT, ArrayRef Live, ArrayRef Records) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // record initial number of (static) allocas; we'll check we have the same // number when we get done. int InitialAllocaNum = 0; @@ -1681,7 +1681,7 @@ PromoteMemToReg(PromotableAllocas, DT); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (auto I = F.getEntryBlock().begin(), E = F.getEntryBlock().end(); I != E; I++) if (isa(*I)) @@ -2019,7 +2019,7 @@ if (LastClonedValue) { assert(LastValue); ClonedValue->replaceUsesOfWith(LastValue, LastClonedValue); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Assert that cloned instruction does not use any instructions from // this chain other than LastClonedValue for (auto OpValue : ClonedValue->operand_values()) { @@ -2070,7 +2070,7 @@ static bool insertParsePoints(Function &F, DominatorTree &DT, Pass *P, SmallVectorImpl &toUpdate) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // sanity check the input std::set uniqued; uniqued.insert(toUpdate.begin(), toUpdate.end()); @@ -2242,7 +2242,7 @@ Statepoint statepoint(info.StatepointToken); live.insert(live.end(), statepoint.gc_args_begin(), statepoint.gc_args_end()); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Do some basic sanity checks on our liveness results before performing // relocation. Relocation can and will turn mistakes in liveness results // into non-sensical code which is must harder to debug. @@ -2263,7 +2263,7 @@ } unique_unsorted(live); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // sanity check for (auto ptr : live) { assert(isGCPointerType(ptr->getType()) && "must be a gc pointer type"); @@ -2355,7 +2355,7 @@ } void RewriteStatepointsForGC::stripDereferenceabilityInfo(Module &M) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG assert(std::any_of(M.begin(), M.end(), shouldRewriteStatepointsIn) && "precondition!"); #endif @@ -2489,7 +2489,7 @@ return KillSet; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// Check that the items in 'Live' dominate 'TI'. This is used as a basic /// sanity check for the liveness computation. static void checkBasicSSA(DominatorTree &DT, DenseSet &Live, @@ -2538,7 +2538,7 @@ Data.LiveSet[&BB].clear(); computeLiveInValues(BB.rbegin(), BB.rend(), Data.LiveSet[&BB]); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (Value *Kill : Data.KillSet[&BB]) assert(!Data.LiveSet[&BB].count(Kill) && "live set contains kill"); #endif @@ -2587,7 +2587,7 @@ } } // while( !worklist.empty() ) -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // Sanity check our ouput against SSA properties. This helps catch any // missing kills during the above iteration. for (BasicBlock &BB : F) { @@ -2622,7 +2622,7 @@ StatepointLiveSetTy Updated; findLiveSetAtInst(Inst, RevisedLivenessData, Updated); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DenseSet Bases; for (auto KVPair : Info.PointerToBase) { Bases.insert(KVPair.second); @@ -2637,7 +2637,7 @@ continue; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (auto V : Updated) { assert(Info.PointerToBase.count(V) && "must be able to find base for live value"); @@ -2653,7 +2653,7 @@ for (auto V : ToErase) Info.PointerToBase.erase(V); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (auto KVPair : Info.PointerToBase) assert(Updated.count(KVPair.first) && "record for non-live value"); #endif Index: lib/Transforms/Scalar/SCCP.cpp =================================================================== --- lib/Transforms/Scalar/SCCP.cpp +++ lib/Transforms/Scalar/SCCP.cpp @@ -576,7 +576,7 @@ return; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Unknown terminator instruction: " << TI << '\n'; #endif llvm_unreachable("SCCP: Don't know how to handle this terminator!"); @@ -632,7 +632,7 @@ if (isa(TI)) return true; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG dbgs() << "Unknown terminator instruction: " << *TI << '\n'; #endif llvm_unreachable(nullptr); @@ -1862,7 +1862,7 @@ // The constant folder may not have been able to fold the terminator // if this is a branch or switch on undef. Fold it manually as a // branch to the first successor. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG if (BranchInst *BI = dyn_cast(I)) { assert(BI->isConditional() && isa(BI->getCondition()) && "Branch should be foldable!"); Index: lib/Transforms/Scalar/SROA.cpp =================================================================== --- lib/Transforms/Scalar/SROA.cpp +++ lib/Transforms/Scalar/SROA.cpp @@ -57,7 +57,7 @@ #include "llvm/Transforms/Utils/PromoteMemToReg.h" #include "llvm/Transforms/Utils/SSAUpdater.h" -#if __cplusplus >= 201103L && !defined(NDEBUG) +#if __cplusplus >= 201103L && !defined(LLVM_NDEBUG) // We only use this for a debug check in C++11 #include #endif @@ -120,7 +120,7 @@ }; /// \brief Provide a typedef for IRBuilder that drops names in release builds. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG typedef llvm::IRBuilder> IRBuilderTy; #else @@ -540,7 +540,7 @@ /// need to replace with undef. ArrayRef getDeadOperands() const { return DeadOperands; } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void print(raw_ostream &OS, const_iterator I, StringRef Indent = " ") const; void printSlice(raw_ostream &OS, const_iterator I, StringRef Indent = " ") const; @@ -556,7 +556,7 @@ class SliceBuilder; friend class AllocaSlices::SliceBuilder; -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) /// \brief Handle to alloca instruction to simplify method interfaces. AllocaInst &AI; #endif @@ -998,7 +998,7 @@ AllocaSlices::AllocaSlices(const DataLayout &DL, AllocaInst &AI) : -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) AI(AI), #endif PointerEscapingInstr(nullptr) { @@ -1019,7 +1019,7 @@ }), Slices.end()); -#if __cplusplus >= 201103L && !defined(NDEBUG) +#if __cplusplus >= 201103L && !defined(LLVM_NDEBUG) if (SROARandomShuffleSlices) { std::mt19937 MT(static_cast(sys::TimeValue::now().msec())); std::shuffle(Slices.begin(), Slices.end(), MT); @@ -1031,7 +1031,7 @@ std::sort(Slices.begin(), Slices.end()); } -#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#if !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) void AllocaSlices::print(raw_ostream &OS, const_iterator I, StringRef Indent) const { @@ -1070,7 +1070,7 @@ } LLVM_DUMP_METHOD void AllocaSlices::dump() const { print(dbgs()); } -#endif // !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#endif // !defined(LLVM_NDEBUG) || defined(LLVM_ENABLE_DUMP) namespace { /// \brief Implementation of LoadAndStorePromoter for promoting allocas. @@ -2075,7 +2075,7 @@ } else { // The only way to have the same element type in every vector type is to // have the same vector type. Check that and remove all but one. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (VectorType *VTy : CandidateTys) { assert(VTy->getElementType() == CommonEltTy && "Unaccounted for element type!"); @@ -2507,7 +2507,7 @@ assert(IsSplit || BeginOffset == NewBeginOffset); uint64_t Offset = NewBeginOffset - NewAllocaBeginOffset; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG StringRef OldName = OldPtr->getName(); // Skip through the last '.sroa.' component of the name. size_t LastSROAPrefix = OldName.rfind(".sroa."); @@ -2530,7 +2530,7 @@ return getAdjustedPtr(IRB, DL, &NewAI, APInt(DL.getPointerSizeInBits(), Offset), PointerTy, -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Twine(OldName) + "." #else Twine() @@ -3997,7 +3997,7 @@ AS.insert(NewSlices); DEBUG(dbgs() << " Pre-split slices:\n"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (auto I = AS.begin(), E = AS.end(); I != E; ++I) DEBUG(AS.print(dbgs(), I, " ")); #endif Index: lib/Transforms/Utils/CloneFunction.cpp =================================================================== --- lib/Transforms/Utils/CloneFunction.cpp +++ lib/Transforms/Utils/CloneFunction.cpp @@ -84,7 +84,7 @@ ValueMaterializer *Materializer) { assert(NameSuffix && "NameSuffix cannot be null!"); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (Function::const_arg_iterator I = OldFunc->arg_begin(), E = OldFunc->arg_end(); I != E; ++I) assert(VMap.count(I) && "No mapping from source argument specified!"); @@ -483,7 +483,7 @@ Materializer = Director->getValueMaterializer(); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // If the cloning starts at the begining of the function, verify that // the function arguments are mapped. if (!StartingInst) Index: lib/Transforms/Utils/CodeExtractor.cpp =================================================================== --- lib/Transforms/Utils/CodeExtractor.cpp +++ lib/Transforms/Utils/CodeExtractor.cpp @@ -87,7 +87,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (SetVector::iterator I = std::next(Result.begin()), E = Result.end(); I != E; ++I) Index: lib/Transforms/Utils/Local.cpp =================================================================== --- lib/Transforms/Utils/Local.cpp +++ lib/Transforms/Utils/Local.cpp @@ -423,7 +423,7 @@ const TargetLibraryInfo *TLI) { bool MadeChange = false; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG // In debug builds, ensure that the terminator of the block is never replaced // or deleted by these simplifications. The idea of simplification is that it // cannot introduce new instructions, and there is no way to replace the Index: lib/Transforms/Utils/LowerSwitch.cpp =================================================================== --- lib/Transforms/Utils/LowerSwitch.cpp +++ lib/Transforms/Utils/LowerSwitch.cpp @@ -463,7 +463,7 @@ PopSucc = I.BB; } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /* UnreachableRanges should be sorted and the ranges non-adjacent. */ for (auto I = UnreachableRanges.begin(), E = UnreachableRanges.end(); I != E; ++I) { Index: lib/Transforms/Vectorize/BBVectorize.cpp =================================================================== --- lib/Transforms/Vectorize/BBVectorize.cpp +++ lib/Transforms/Vectorize/BBVectorize.cpp @@ -160,7 +160,7 @@ FastDep("bb-vectorize-fast-dep", cl::init(false), cl::Hidden, cl::desc("Use a fast instruction dependency analysis")); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static cl::opt DebugInstructionExamination("bb-vectorize-debug-instruction-examination", cl::init(false), cl::Hidden, Index: lib/Transforms/Vectorize/LoopVectorize.cpp =================================================================== --- lib/Transforms/Vectorize/LoopVectorize.cpp +++ lib/Transforms/Vectorize/LoopVectorize.cpp @@ -518,7 +518,7 @@ B.SetCurrentDebugLocation(DebugLoc()); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// \return string containing a file name and a line # for the given loop. static std::string getDebugLocString(const Loop *L) { std::string Result; @@ -1532,9 +1532,9 @@ bool processLoop(Loop *L) { assert(L->empty() && "Only process inner loops."); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const std::string DebugLocStr = getDebugLocString(L); -#endif /* NDEBUG */ +#endif /* LLVM_NDEBUG */ DEBUG(dbgs() << "\nLV: Checking a loop in \"" << L->getHeader()->getParent()->getName() << "\" from " @@ -4532,9 +4532,9 @@ } float Cost = expectedCost(1); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG const float ScalarCost = Cost; -#endif /* NDEBUG */ +#endif /* LLVM_NDEBUG */ unsigned Width = 1; DEBUG(dbgs() << "LV: Scalar loop costs: " << (int)ScalarCost << ".\n"); Index: lib/Transforms/Vectorize/SLPVectorizer.cpp =================================================================== --- lib/Transforms/Vectorize/SLPVectorizer.cpp +++ lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -704,7 +704,7 @@ bool IsScheduled; }; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG friend raw_ostream &operator<<(raw_ostream &os, const BoUpSLP::ScheduleData &SD); #endif @@ -891,7 +891,7 @@ IRBuilder<> Builder; }; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG raw_ostream &operator<<(raw_ostream &os, const BoUpSLP::ScheduleData &SD) { SD.dump(os); return os; @@ -2558,7 +2558,7 @@ Type *Ty = Scalar->getType(); if (!Ty->isVoidTy()) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (User *U : Scalar->users()) { DEBUG(dbgs() << "SLP: \tvalidating user:" << *U << ".\n"); Index: tools/verify-uselistorder/verify-uselistorder.cpp =================================================================== --- tools/verify-uselistorder/verify-uselistorder.cpp +++ tools/verify-uselistorder/verify-uselistorder.cpp @@ -242,7 +242,7 @@ IDs[V] = Values.size(); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static void dumpMapping(const ValueMapping &VM) { dbgs() << "value-mapping (size = " << VM.Values.size() << "):\n"; for (unsigned I = 0, E = VM.Values.size(); I != E; ++I) { Index: utils/TableGen/CodeGenDAGPatterns.cpp =================================================================== --- utils/TableGen/CodeGenDAGPatterns.cpp +++ utils/TableGen/CodeGenDAGPatterns.cpp @@ -698,7 +698,7 @@ } } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG /// Dump the dependent variable set: static void DumpDepVars(MultipleUseVarSet &DepVars) { if (DepVars.empty()) { @@ -846,7 +846,7 @@ if (DefInit *Pred = dyn_cast(I)) { Record *Def = Pred->getDef(); if (!Def->isSubClassOf("Predicate")) { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG Def->dump(); #endif llvm_unreachable("Unknown predicate type!"); @@ -3526,7 +3526,7 @@ Idxs.resize(ChildVariants.size()); bool NotDone; do { -#ifndef NDEBUG +#ifndef LLVM_NDEBUG DEBUG(if (!Idxs.empty()) { errs() << Orig->getOperator()->getName() << ": Idxs = [ "; for (unsigned i = 0; i < Idxs.size(); ++i) { Index: utils/TableGen/CodeGenSchedule.h =================================================================== --- utils/TableGen/CodeGenSchedule.h +++ utils/TableGen/CodeGenSchedule.h @@ -88,7 +88,7 @@ return TheDef || !Sequence.empty(); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void dump() const; #endif }; @@ -152,7 +152,7 @@ // are never mapped directly to inferred scheduling classes. bool isInferred() const { return !ItinClassDef; } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void dump(const CodeGenSchedModels *SchedModels) const; #endif }; @@ -210,7 +210,7 @@ unsigned getProcResourceIdx(Record *PRDef) const; -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void dump() const; #endif }; Index: utils/TableGen/CodeGenSchedule.cpp =================================================================== --- utils/TableGen/CodeGenSchedule.cpp +++ utils/TableGen/CodeGenSchedule.cpp @@ -23,7 +23,7 @@ #define DEBUG_TYPE "subtarget-emitter" -#ifndef NDEBUG +#ifndef LLVM_NDEBUG static void dumpIdxVec(const IdxVec &V) { for (unsigned i = 0, e = V.size(); i < e; ++i) { dbgs() << V[i] << ", "; @@ -947,7 +947,7 @@ void substituteVariants(const PredTransition &Trans); -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void dump() const; #endif @@ -1708,7 +1708,7 @@ return 1 + (PRPos - ProcResourceDefs.begin()); } -#ifndef NDEBUG +#ifndef LLVM_NDEBUG void CodeGenProcModel::dump() const { dbgs() << Index << ": " << ModelName << " " << (ModelDef ? ModelDef->getName() : "inferred") << " " @@ -1781,4 +1781,4 @@ dbgs() << "}\n"; } } -#endif // NDEBUG +#endif // LLVM_NDEBUG Index: utils/TableGen/RegisterInfoEmitter.cpp =================================================================== --- utils/TableGen/RegisterInfoEmitter.cpp +++ utils/TableGen/RegisterInfoEmitter.cpp @@ -868,7 +868,7 @@ assert(LaneMaskVec.empty()); LaneMaskVec.insert(LaneMaskVec.begin(), RUMasks.begin(), RUMasks.end()); // Terminator mask should not be used inside of the list. -#ifndef NDEBUG +#ifndef LLVM_NDEBUG for (unsigned M : LaneMaskVec) { assert(M != ~0u && "terminator mask should not be part of the list"); } Index: utils/TableGen/SubtargetEmitter.cpp =================================================================== --- utils/TableGen/SubtargetEmitter.cpp +++ utils/TableGen/SubtargetEmitter.cpp @@ -823,7 +823,7 @@ SCTab.resize(SCTab.size() + 1); MCSchedClassDesc &SCDesc = SCTab.back(); - // SCDesc.Name is guarded by NDEBUG + // SCDesc.Name is guarded by LLVM_NDEBUG SCDesc.NumMicroOps = 0; SCDesc.BeginGroup = false; SCDesc.EndGroup = false; @@ -1251,7 +1251,7 @@ OS << "#ifdef DBGFIELD\n" << "#error \"GenSubtargetInfo.inc requires a DBGFIELD macro\"\n" << "#endif\n" - << "#ifndef NDEBUG\n" + << "#ifndef LLVM_NDEBUG\n" << "#define DBGFIELD(x) x,\n" << "#else\n" << "#define DBGFIELD(x)\n"