diff --git a/llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp b/llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
--- a/llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
@@ -25,11 +25,15 @@
 //===----------------------------------------------------------------------===//
 
 #include "AMDGPU.h"
+#include "GCNRegPressure.h"
 #include "GCNSubtarget.h"
 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
+#include "SIMachineFunctionInfo.h"
 #include "llvm/CodeGen/LiveIntervals.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
 #include "llvm/InitializePasses.h"
+#include <map>
 
 using namespace llvm;
 
@@ -43,6 +47,7 @@
   const SIRegisterInfo *TRI;
   MachineRegisterInfo *MRI;
   LiveIntervals *LIS;
+  MachineLoopInfo *LI;
 
   bool processReg(Register Reg);
 
@@ -61,6 +66,7 @@
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     AU.addRequired<LiveIntervals>();
+    AU.addRequired<MachineLoopInfo>();
     AU.setPreservesAll();
     MachineFunctionPass::getAnalysisUsage(AU);
   }
@@ -71,6 +77,7 @@
 INITIALIZE_PASS_BEGIN(GCNPreRAOptimizations, DEBUG_TYPE,
                       "AMDGPU Pre-RA optimizations", false, false)
 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
 INITIALIZE_PASS_END(GCNPreRAOptimizations, DEBUG_TYPE, "Pre-RA optimizations",
                     false, false)
 
@@ -85,24 +92,48 @@
 bool GCNPreRAOptimizations::processReg(Register Reg) {
   MachineInstr *Def0 = nullptr;
   MachineInstr *Def1 = nullptr;
+  MachineInstr *VGPRImmDef = nullptr;
+  MachineInstr *VGPRImmUse = nullptr;
+  std::map<unsigned, unsigned> SeenSubRegDefs;
+
   uint64_t Init = 0;
   bool Changed = false;
   SmallSet<Register, 32> ModifiedRegs;
-  bool IsAGPRDst = TRI->isAGPRClass(MRI->getRegClass(Reg));
+
+  const TargetRegisterClass *RC = MRI->getRegClass(Reg);
+  bool IsAGPRDst = TRI->isAGPRClass(RC);
+  bool IsVGPRDst = TRI->isVGPRClass(RC);
+  bool IsSGPRDst = TRI->isSGPRClass(RC);
 
   for (MachineInstr &I : MRI->def_instructions(Reg)) {
+    // Keep track of how many times a specific register or subreg is defined.
+    if (IsVGPRDst) {
+      MachineOperand &Op = I.getOperand(0);
+      if (!Op.isReg())
+        break;
+      // Reg will always be the same for this call so keep track of subreg
+      auto FindReg = SeenSubRegDefs.find(Op.getSubReg());
+      if (FindReg != SeenSubRegDefs.end())
+        SeenSubRegDefs[Op.getSubReg()] += 1;
+      else
+        SeenSubRegDefs[Op.getSubReg()] = 1;
+    }
     switch (I.getOpcode()) {
     default:
-      return false;
+      if (IsSGPRDst)
+        return false;
+      break;
     case AMDGPU::V_ACCVGPR_WRITE_B32_e64:
       break;
     case AMDGPU::COPY: {
       // Some subtargets cannot do an AGPR to AGPR copy directly, and need an
       // intermdiate temporary VGPR register. Try to find the defining
       // accvgpr_write to avoid temporary registers.
+      if (IsSGPRDst)
+        return false;
 
       if (!IsAGPRDst)
-        return false;
+        break;
 
       Register SrcReg = I.getOperand(1).getReg();
 
@@ -169,6 +200,33 @@
         break;
       }
       break;
+    case AMDGPU::V_MOV_B32_e32:
+      if (!IsVGPRDst || !I.getOperand(1).isImm() || !MRI->hasOneUse(Reg))
+        break;
+
+      for (MachineInstr &UseI : MRI->use_instructions(Reg)) {
+        // First find if a use is within a loop
+        MachineLoop *CurUseL = LI->getLoopFor(UseI.getParent());
+        if (!CurUseL)
+          break;
+
+        // Check if the def is in the loop preheader
+        MachineBasicBlock *Preheader = LI->findLoopPreheader(CurUseL);
+        if (!Preheader || Preheader != I.getParent())
+          break;
+
+        // Don't sink if there is a use in the same block.
+        if (I.getParent() == UseI.getParent())
+          break;
+
+        if (VGPRImmDef || VGPRImmUse)
+          return false;
+
+        VGPRImmDef = &I;
+        VGPRImmUse = &UseI;
+        break;
+      }
+      break;
     }
   }
 
@@ -185,30 +243,80 @@
   }
 
   // For SGPR reg, check if we can combine instructions.
-  if (!Def0 || !Def1 || Def0->getParent() != Def1->getParent())
+  if (IsSGPRDst && (!Def0 || !Def1 || Def0->getParent() != Def1->getParent()))
+    return Changed;
+  // For VGPR reg, check if we can sink a imm def to a use
+  else if (TRI->isVGPRClass(RC) && (!VGPRImmDef || !VGPRImmUse))
     return Changed;
 
-  LLVM_DEBUG(dbgs() << "Combining:\n  " << *Def0 << "  " << *Def1
-                    << "    =>\n");
-
-  if (SlotIndex::isEarlierInstr(LIS->getInstructionIndex(*Def1),
-                                LIS->getInstructionIndex(*Def0)))
-    std::swap(Def0, Def1);
+  if (IsSGPRDst) {
+    LLVM_DEBUG(dbgs() << "Combining:\n  " << *Def0 << "  " << *Def1
+                      << "    =>\n");
+
+    if (SlotIndex::isEarlierInstr(LIS->getInstructionIndex(*Def1),
+                                  LIS->getInstructionIndex(*Def0)))
+      std::swap(Def0, Def1);
+
+    LIS->RemoveMachineInstrFromMaps(*Def0);
+    LIS->RemoveMachineInstrFromMaps(*Def1);
+    auto NewI = BuildMI(*Def0->getParent(), *Def0, Def0->getDebugLoc(),
+                        TII->get(AMDGPU::S_MOV_B64_IMM_PSEUDO), Reg)
+                    .addImm(Init);
+
+    Def0->eraseFromParent();
+    Def1->eraseFromParent();
+    LIS->InsertMachineInstrInMaps(*NewI);
+    LIS->removeInterval(Reg);
+    LIS->createAndComputeVirtRegInterval(Reg);
+
+    LLVM_DEBUG(dbgs() << "  " << *NewI);
+  } else if (IsVGPRDst) {
+    // If same register is defined more than once then do not sink def to use
+    // incase of clobbering a new def.
+    if (SeenSubRegDefs[VGPRImmDef->getOperand(0).getSubReg()] > 1)
+      return false;
 
-  LIS->RemoveMachineInstrFromMaps(*Def0);
-  LIS->RemoveMachineInstrFromMaps(*Def1);
-  auto NewI = BuildMI(*Def0->getParent(), *Def0, Def0->getDebugLoc(),
-                      TII->get(AMDGPU::S_MOV_B64_IMM_PSEUDO), Reg)
-                  .addImm(Init);
+    bool IsUndef = VGPRImmDef->getOperand(0).isUndef();
+    MachineBasicBlock::iterator Pos = MachineBasicBlock::iterator(*VGPRImmUse);
+    if (IsUndef && VGPRImmDef->getOperand(0).getSubReg() != 0) {
+      MachineInstr *CurrInsertPos = nullptr;
+      for (MachineInstr &I : MRI->def_instructions(Reg)) {
+        if (&I == VGPRImmDef)
+          continue;
 
-  Def0->eraseFromParent();
-  Def1->eraseFromParent();
-  LIS->InsertMachineInstrInMaps(*NewI);
-  LIS->removeInterval(Reg);
-  LIS->createAndComputeVirtRegInterval(Reg);
+        // Require all defs in same block to fix undef flag for subregs
+        if (I.getParent() != VGPRImmUse->getParent())
+          return false;
 
-  LLVM_DEBUG(dbgs() << "  " << *NewI);
+        // Inserting MI before any other subreg def of this reg and set undef
+        // flag.
+        if (!CurrInsertPos)
+          CurrInsertPos = &I;
+        else if (SlotIndex::isEarlierInstr(
+                     LIS->getInstructionIndex(*CurrInsertPos),
+                     LIS->getInstructionIndex(I)))
+          CurrInsertPos = &I;
+      }
+      if (CurrInsertPos)
+        Pos = MachineBasicBlock::iterator(*CurrInsertPos);
+    }
 
+    LLVM_DEBUG(dbgs() << "Immediate def only has one use, sinking: "
+                      << *VGPRImmDef
+                      << "    to its use before: " << *VGPRImmUse);
+    auto NewI = BuildMI(*VGPRImmUse->getParent(), Pos, DebugLoc(),
+                        TII->get(AMDGPU::V_MOV_B32_e32))
+                    .addDef(VGPRImmDef->getOperand(0).getReg(),
+                            IsUndef ? RegState::Undef : 0,
+                            VGPRImmDef->getOperand(0).getSubReg())
+                    .addImm(VGPRImmDef->getOperand(1).getImm());
+
+    LIS->RemoveMachineInstrFromMaps(*VGPRImmDef);
+    VGPRImmDef->eraseFromParent();
+    LIS->InsertMachineInstrInMaps(*NewI);
+    LIS->removeInterval(Reg);
+    LIS->createAndComputeVirtRegInterval(Reg);
+  }
   return true;
 }
 
@@ -221,6 +329,45 @@
   MRI = &MF.getRegInfo();
   LIS = &getAnalysis<LiveIntervals>();
   TRI = ST.getRegisterInfo();
+  LI = &getAnalysis<MachineLoopInfo>();
+  const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
+
+  // If occupancy is at 1 then attempt to sink immediate vgpr defs that may
+  // have been hoisted by MachineLICM to loop preheader back into loop in an
+  // attempt to lower RP unless we are being limited by an attribute. We do
+  // this here because current RP checking in MachineLICM is useless for AMDGPU
+  // and MachineSink does not sink into loops.
+  bool SinkImmediateDefs = false;
+  unsigned MinOccupancy = ~0u;
+  if (MFI->getMinAllowedOccupancy() != 1) {
+    for (MachineBasicBlock &MBB : MF) {
+      GCNDownwardRPTracker RPT(*LIS);
+
+      for (auto I = MBB.begin(), E = MBB.end(); I != E; ++I) {
+        MachineInstr &MI = *I;
+
+        if (MI.isMetaInstruction() || MI.isDebugOrPseudoInstr())
+          continue;
+
+        if (!RPT.getNext().isValid())
+          RPT.reset(MI);
+        else { // Advance the state to the current MI.
+          RPT.advance(MI);
+          RPT.advanceBeforeNext();
+        }
+      }
+
+      GCNRegPressure MaxPressure = RPT.moveMaxPressure();
+      unsigned Occupancy = MaxPressure.getOccupancy(ST);
+      if (Occupancy < MinOccupancy) {
+        MinOccupancy = Occupancy;
+        if (MinOccupancy == 1) {
+          SinkImmediateDefs = true;
+          break;
+        }
+      }
+    }
+  }
 
   bool Changed = false;
 
@@ -230,7 +377,8 @@
       continue;
     const TargetRegisterClass *RC = MRI->getRegClass(Reg);
     if ((RC->MC->getSizeInBits() != 64 || !TRI->isSGPRClass(RC)) &&
-        (ST.hasGFX90AInsts() || !TRI->isAGPRClass(RC)))
+        (ST.hasGFX90AInsts() || !TRI->isAGPRClass(RC)) &&
+        (!SinkImmediateDefs || !TRI->isVGPRClass(RC)))
       continue;
 
     Changed |= processReg(Reg);
diff --git a/llvm/test/CodeGen/AMDGPU/pre-ra-opt-sink-imm.mir b/llvm/test/CodeGen/AMDGPU/pre-ra-opt-sink-imm.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/pre-ra-opt-sink-imm.mir
@@ -0,0 +1,2719 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass=liveintervals,amdgpu-pre-ra-optimizations -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX908 %s
+
+---
+name:            test_occ_1_sink_imms_in_preheader
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_1_sink_imms_in_preheader
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM2:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM2]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %7.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM2]].sub1
+  ; GFX908-NEXT:   undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %11.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 %7, 2, implicit-def dead $scc
+  ; GFX908-NEXT:   undef %23.sub0:sreg_64 = S_ADD_U32 [[S_LOAD_DWORDX2_IMM1]].sub0, [[S_LSHL_B64_]].sub0, implicit-def $scc
+  ; GFX908-NEXT:   %23.sub1:sreg_64 = S_ADDC_U32 [[S_LOAD_DWORDX2_IMM1]].sub1, [[S_LSHL_B64_]].sub1, implicit-def dead $scc, implicit killed $scc
+  ; GFX908-NEXT:   [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %23, 0, 0 :: (load (s32), addrspace 1)
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORD_IMM]], implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[COPY3]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %25:vgpr_32 = nofpexcept V_ADD_F32_e32 %11.sub0, %11.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %26:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub1, %10.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %27:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1, %9.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %28:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1, %8.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %29:vgpr_32 = nofpexcept V_ADD_F32_e32 %25, %26, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %30:vgpr_32 = nofpexcept V_ADD_F32_e32 %27, %28, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %31:vgpr_32 = nofpexcept V_ADD_F32_e32 %30, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   dead %32:vgpr_32 = nofpexcept V_ADD_F32_e32 %27, %28, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+  ; GFX908-NEXT:   %33:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_2]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+  ; GFX908-NEXT:   %34:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_3]], [[V_MOV_B32_e32_4]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+  ; GFX908-NEXT:   %35:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_5]], [[V_MOV_B32_e32_6]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   %36:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_7]], %35, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %37:vgpr_32 = nofpexcept V_ADD_F32_e32 %33, %34, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %38:vgpr_32 = nofpexcept V_ADD_F32_e32 %37, %36, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %39:vgpr_32 = nofpexcept V_ADD_F32_e32 %31, %38, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = S_ADD_I32 %7.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %7.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   GLOBAL_STORE_DWORD_SADDR [[V_MOV_B32_e32_8]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
+  ; GFX908-NEXT:   S_ENDPGM 0, implicit %8, implicit %9, implicit %10, implicit %11, implicit %39
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %12:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %11:vgpr_32(s32) = COPY $vgpr0
+    %17:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %18:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %19:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %21:sreg_64 = V_CMP_GT_U32_e64 %19.sub0, %11(s32), implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    undef %25.sub1:sreg_64 = S_MOV_B32 0
+    %25.sub0:sreg_64 = COPY %19.sub1
+    undef %7.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+    %62:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+    %63:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+    %65:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %44:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %5:sreg_64 = COPY $exec, implicit-def $exec
+    %45:sreg_64 = S_AND_B64 %5, %21, implicit-def dead $scc
+    $exec = S_MOV_B64_term %45
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %27:sreg_64 = S_LSHL_B64 %25, 2, implicit-def dead $scc
+    undef %28.sub0:sreg_64 = S_ADD_U32 %18.sub0, %27.sub0, implicit-def $scc
+    %28.sub1:sreg_64 = S_ADDC_U32 %18.sub1, %27.sub1, implicit-def dead $scc, implicit killed $scc
+    %29:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %28, 0, 0 :: (load (s32), addrspace 1)
+    %44:vgpr_32 = COPY %29, implicit $exec
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %5, implicit-def $scc
+    %43:vgpr_32 = nofpexcept V_ADD_F32_e32 %43, %44, implicit $mode, implicit $exec
+    %51:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub0:vreg_1024, %10.sub1:vreg_1024, implicit $mode, implicit $exec
+    %52:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1:vreg_1024, %9.sub1:vreg_1024, implicit $mode, implicit $exec
+    %53:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1:vreg_1024, %8.sub1:vreg_1024, implicit $mode, implicit $exec
+    %54:vgpr_32 = nofpexcept V_ADD_F32_e32 %7.sub1:vreg_1024, %7.sub1:vreg_1024, implicit $mode, implicit $exec
+    %55:vgpr_32 = nofpexcept V_ADD_F32_e32 %51, %52, implicit $mode, implicit $exec
+    %60:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %68:vgpr_32 = nofpexcept V_ADD_F32_e32 %60, %55, implicit $mode, implicit $exec
+    %56:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %57:vgpr_32 = nofpexcept V_ADD_F32_e32 %13, %14, implicit $mode, implicit $exec
+    %58:vgpr_32 = nofpexcept V_ADD_F32_e32 %16, %20, implicit $mode, implicit $exec
+    %64:vgpr_32 = nofpexcept V_ADD_F32_e32 %62, %63, implicit $mode, implicit $exec
+    %66:vgpr_32 = nofpexcept V_ADD_F32_e32 %65, %64, implicit $mode, implicit $exec
+    %59:vgpr_32 = nofpexcept V_ADD_F32_e32 %57, %58, implicit $mode, implicit $exec
+    %67:vgpr_32 = nofpexcept V_ADD_F32_e32 %59, %66, implicit $mode, implicit $exec
+    %61:vgpr_32 = nofpexcept V_ADD_F32_e32 %68, %67, implicit $mode, implicit $exec
+    %25.sub0:sreg_64 = S_ADD_I32 %25.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %25.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    %32:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    GLOBAL_STORE_DWORD_SADDR %32, %43, %17, 0, 0, implicit $exec :: (store (s32), addrspace 1)
+    S_ENDPGM 0, implicit %7, implicit %8, implicit %9, implicit %10, implicit %61
+
+...
+---
+name:            test_occ_1_sink_undef_imm_in_preheader
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_1_sink_undef_imm_in_preheader
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM2:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM2]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %7.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM2]].sub1
+  ; GFX908-NEXT:   undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %11.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 %7, 2, implicit-def dead $scc
+  ; GFX908-NEXT:   undef %24.sub0:sreg_64 = S_ADD_U32 [[S_LOAD_DWORDX2_IMM1]].sub0, [[S_LSHL_B64_]].sub0, implicit-def $scc
+  ; GFX908-NEXT:   %24.sub1:sreg_64 = S_ADDC_U32 [[S_LOAD_DWORDX2_IMM1]].sub1, [[S_LSHL_B64_]].sub1, implicit-def dead $scc, implicit killed $scc
+  ; GFX908-NEXT:   [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %24, 0, 0 :: (load (s32), addrspace 1)
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORD_IMM]], implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[COPY3]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %26:vgpr_32 = nofpexcept V_ADD_F32_e32 %11.sub0, %11.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %27:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub1, %10.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %28:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1, %9.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %29:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1, %8.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %30:vgpr_32 = nofpexcept V_ADD_F32_e32 %26, %27, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %31:vgpr_32 = nofpexcept V_ADD_F32_e32 %28, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %32:vgpr_32 = nofpexcept V_ADD_F32_e32 %31, %30, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   dead %33:vgpr_32 = nofpexcept V_ADD_F32_e32 %28, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+  ; GFX908-NEXT:   %34:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_2]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+  ; GFX908-NEXT:   %35:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_3]], [[V_MOV_B32_e32_4]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+  ; GFX908-NEXT:   %36:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_5]], [[V_MOV_B32_e32_6]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   %37:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_7]], %36, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %38:vgpr_32 = nofpexcept V_ADD_F32_e32 %34, %35, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %39:vgpr_32 = nofpexcept V_ADD_F32_e32 %38, %37, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %40:vgpr_32 = nofpexcept V_ADD_F32_e32 %32, %39, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   undef %19.sub0:vreg_64 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   %19.sub1:vreg_64 = V_MOV_B32_e32 30, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit %19
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = S_ADD_I32 %7.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %7.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   GLOBAL_STORE_DWORD_SADDR [[V_MOV_B32_e32_8]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
+  ; GFX908-NEXT:   S_ENDPGM 0, implicit %8, implicit %9, implicit %10, implicit %11, implicit %40
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %12:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %11:vgpr_32(s32) = COPY $vgpr0
+    %17:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %18:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %19:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %21:sreg_64 = V_CMP_GT_U32_e64 %19.sub0, %11(s32), implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    undef %25.sub1:sreg_64 = S_MOV_B32 0
+    %25.sub0:sreg_64 = COPY %19.sub1
+    undef %7.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+    %62:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+    %63:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+    %65:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    undef %71.sub0:vreg_64 = V_MOV_B32_e32 20, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %44:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %5:sreg_64 = COPY $exec, implicit-def $exec
+    %45:sreg_64 = S_AND_B64 %5, %21, implicit-def dead $scc
+    $exec = S_MOV_B64_term %45
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %27:sreg_64 = S_LSHL_B64 %25, 2, implicit-def dead $scc
+    undef %28.sub0:sreg_64 = S_ADD_U32 %18.sub0, %27.sub0, implicit-def $scc
+    %28.sub1:sreg_64 = S_ADDC_U32 %18.sub1, %27.sub1, implicit-def dead $scc, implicit killed $scc
+    %29:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %28, 0, 0 :: (load (s32), addrspace 1)
+    %44:vgpr_32 = COPY %29, implicit $exec
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %5, implicit-def $scc
+    %43:vgpr_32 = nofpexcept V_ADD_F32_e32 %43, %44, implicit $mode, implicit $exec
+    %51:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub0:vreg_1024, %10.sub1:vreg_1024, implicit $mode, implicit $exec
+    %52:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1:vreg_1024, %9.sub1:vreg_1024, implicit $mode, implicit $exec
+    %53:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1:vreg_1024, %8.sub1:vreg_1024, implicit $mode, implicit $exec
+    %54:vgpr_32 = nofpexcept V_ADD_F32_e32 %7.sub1:vreg_1024, %7.sub1:vreg_1024, implicit $mode, implicit $exec
+    %55:vgpr_32 = nofpexcept V_ADD_F32_e32 %51, %52, implicit $mode, implicit $exec
+    %60:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %68:vgpr_32 = nofpexcept V_ADD_F32_e32 %60, %55, implicit $mode, implicit $exec
+    %56:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %57:vgpr_32 = nofpexcept V_ADD_F32_e32 %13, %14, implicit $mode, implicit $exec
+    %58:vgpr_32 = nofpexcept V_ADD_F32_e32 %16, %20, implicit $mode, implicit $exec
+    %64:vgpr_32 = nofpexcept V_ADD_F32_e32 %62, %63, implicit $mode, implicit $exec
+    %66:vgpr_32 = nofpexcept V_ADD_F32_e32 %65, %64, implicit $mode, implicit $exec
+    %59:vgpr_32 = nofpexcept V_ADD_F32_e32 %57, %58, implicit $mode, implicit $exec
+    %67:vgpr_32 = nofpexcept V_ADD_F32_e32 %59, %66, implicit $mode, implicit $exec
+    %61:vgpr_32 = nofpexcept V_ADD_F32_e32 %68, %67, implicit $mode, implicit $exec
+    %71.sub1:vreg_64 = V_MOV_B32_e32 30, implicit $exec
+    S_NOP 0, implicit %71
+    %25.sub0:sreg_64 = S_ADD_I32 %25.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %25.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    %32:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    GLOBAL_STORE_DWORD_SADDR %32, %43, %17, 0, 0, implicit $exec :: (store (s32), addrspace 1)
+    S_ENDPGM 0, implicit %7, implicit %8, implicit %9, implicit %10, implicit %61
+
+...
+---
+name:            test_occ_1_no_sink_undef_not_in_use_block
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_1_no_sink_undef_not_in_use_block
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM2:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM2]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %7.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM2]].sub1
+  ; GFX908-NEXT:   undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %11.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %19.sub0:vreg_64 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 %7, 2, implicit-def dead $scc
+  ; GFX908-NEXT:   undef %24.sub0:sreg_64 = S_ADD_U32 [[S_LOAD_DWORDX2_IMM1]].sub0, [[S_LSHL_B64_]].sub0, implicit-def $scc
+  ; GFX908-NEXT:   %24.sub1:sreg_64 = S_ADDC_U32 [[S_LOAD_DWORDX2_IMM1]].sub1, [[S_LSHL_B64_]].sub1, implicit-def dead $scc, implicit killed $scc
+  ; GFX908-NEXT:   [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %24, 0, 0 :: (load (s32), addrspace 1)
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORD_IMM]], implicit $exec
+  ; GFX908-NEXT:   %19.sub1:vreg_64 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[COPY3]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %26:vgpr_32 = nofpexcept V_ADD_F32_e32 %11.sub0, %11.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %27:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub1, %10.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %28:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1, %9.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %29:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1, %8.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %30:vgpr_32 = nofpexcept V_ADD_F32_e32 %26, %27, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %31:vgpr_32 = nofpexcept V_ADD_F32_e32 %28, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %32:vgpr_32 = nofpexcept V_ADD_F32_e32 %31, %30, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   dead %33:vgpr_32 = nofpexcept V_ADD_F32_e32 %28, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+  ; GFX908-NEXT:   %34:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_2]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+  ; GFX908-NEXT:   %35:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_3]], [[V_MOV_B32_e32_4]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+  ; GFX908-NEXT:   %36:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_5]], [[V_MOV_B32_e32_6]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   %37:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_7]], %36, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %38:vgpr_32 = nofpexcept V_ADD_F32_e32 %34, %35, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %39:vgpr_32 = nofpexcept V_ADD_F32_e32 %38, %37, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %40:vgpr_32 = nofpexcept V_ADD_F32_e32 %32, %39, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit %19
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = S_ADD_I32 %7.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %7.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   GLOBAL_STORE_DWORD_SADDR [[V_MOV_B32_e32_8]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
+  ; GFX908-NEXT:   S_ENDPGM 0, implicit %8, implicit %9, implicit %10, implicit %11, implicit %40
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %12:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %11:vgpr_32(s32) = COPY $vgpr0
+    %17:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %18:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %19:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %21:sreg_64 = V_CMP_GT_U32_e64 %19.sub0, %11(s32), implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    undef %25.sub1:sreg_64 = S_MOV_B32 0
+    %25.sub0:sreg_64 = COPY %19.sub1
+    undef %7.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+    %62:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+    %63:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+    %65:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    undef %71.sub0:vreg_64 = V_MOV_B32_e32 20, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %44:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %5:sreg_64 = COPY $exec, implicit-def $exec
+    %45:sreg_64 = S_AND_B64 %5, %21, implicit-def dead $scc
+    $exec = S_MOV_B64_term %45
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %27:sreg_64 = S_LSHL_B64 %25, 2, implicit-def dead $scc
+    undef %28.sub0:sreg_64 = S_ADD_U32 %18.sub0, %27.sub0, implicit-def $scc
+    %28.sub1:sreg_64 = S_ADDC_U32 %18.sub1, %27.sub1, implicit-def dead $scc, implicit killed $scc
+    %29:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %28, 0, 0 :: (load (s32), addrspace 1)
+    %44:vgpr_32 = COPY %29, implicit $exec
+    %71.sub1:vreg_64 = V_MOV_B32_e32 20, implicit $exec
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %5, implicit-def $scc
+    %43:vgpr_32 = nofpexcept V_ADD_F32_e32 %43, %44, implicit $mode, implicit $exec
+    %51:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub0:vreg_1024, %10.sub1:vreg_1024, implicit $mode, implicit $exec
+    %52:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1:vreg_1024, %9.sub1:vreg_1024, implicit $mode, implicit $exec
+    %53:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1:vreg_1024, %8.sub1:vreg_1024, implicit $mode, implicit $exec
+    %54:vgpr_32 = nofpexcept V_ADD_F32_e32 %7.sub1:vreg_1024, %7.sub1:vreg_1024, implicit $mode, implicit $exec
+    %55:vgpr_32 = nofpexcept V_ADD_F32_e32 %51, %52, implicit $mode, implicit $exec
+    %60:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %68:vgpr_32 = nofpexcept V_ADD_F32_e32 %60, %55, implicit $mode, implicit $exec
+    %56:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %57:vgpr_32 = nofpexcept V_ADD_F32_e32 %13, %14, implicit $mode, implicit $exec
+    %58:vgpr_32 = nofpexcept V_ADD_F32_e32 %16, %20, implicit $mode, implicit $exec
+    %64:vgpr_32 = nofpexcept V_ADD_F32_e32 %62, %63, implicit $mode, implicit $exec
+    %66:vgpr_32 = nofpexcept V_ADD_F32_e32 %65, %64, implicit $mode, implicit $exec
+    %59:vgpr_32 = nofpexcept V_ADD_F32_e32 %57, %58, implicit $mode, implicit $exec
+    %67:vgpr_32 = nofpexcept V_ADD_F32_e32 %59, %66, implicit $mode, implicit $exec
+    %61:vgpr_32 = nofpexcept V_ADD_F32_e32 %68, %67, implicit $mode, implicit $exec
+    S_NOP 0, implicit %71
+    %25.sub0:sreg_64 = S_ADD_I32 %25.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %25.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    %32:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    GLOBAL_STORE_DWORD_SADDR %32, %43, %17, 0, 0, implicit $exec :: (store (s32), addrspace 1)
+    S_ENDPGM 0, implicit %7, implicit %8, implicit %9, implicit %10, implicit %61
+
+...
+
+---
+name:            test_occ_1_no_sink_undef_multiple_subreg_def_imm_in_preheader
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_1_no_sink_undef_multiple_subreg_def_imm_in_preheader
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM2:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM2]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %7.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM2]].sub1
+  ; GFX908-NEXT:   undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %11.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %19.sub0:vreg_128 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   %19.sub1:vreg_128 = V_MOV_B32_e32 30, implicit $exec
+  ; GFX908-NEXT:   %19.sub2:vreg_128 = V_MOV_B32_e32 40, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 %7, 2, implicit-def dead $scc
+  ; GFX908-NEXT:   undef %24.sub0:sreg_64 = S_ADD_U32 [[S_LOAD_DWORDX2_IMM1]].sub0, [[S_LSHL_B64_]].sub0, implicit-def $scc
+  ; GFX908-NEXT:   %24.sub1:sreg_64 = S_ADDC_U32 [[S_LOAD_DWORDX2_IMM1]].sub1, [[S_LSHL_B64_]].sub1, implicit-def dead $scc, implicit killed $scc
+  ; GFX908-NEXT:   [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %24, 0, 0 :: (load (s32), addrspace 1)
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORD_IMM]], implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[COPY3]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %26:vgpr_32 = nofpexcept V_ADD_F32_e32 %11.sub0, %11.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %27:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub1, %10.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %28:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1, %9.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %29:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1, %8.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %30:vgpr_32 = nofpexcept V_ADD_F32_e32 %26, %27, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %31:vgpr_32 = nofpexcept V_ADD_F32_e32 %28, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %32:vgpr_32 = nofpexcept V_ADD_F32_e32 %31, %30, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   dead %33:vgpr_32 = nofpexcept V_ADD_F32_e32 %28, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+  ; GFX908-NEXT:   %34:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_2]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+  ; GFX908-NEXT:   %35:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_3]], [[V_MOV_B32_e32_4]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+  ; GFX908-NEXT:   %36:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_5]], [[V_MOV_B32_e32_6]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   %37:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_7]], %36, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %38:vgpr_32 = nofpexcept V_ADD_F32_e32 %34, %35, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %39:vgpr_32 = nofpexcept V_ADD_F32_e32 %38, %37, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %40:vgpr_32 = nofpexcept V_ADD_F32_e32 %32, %39, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %19.sub3:vreg_128 = V_MOV_B32_e32 50, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit %19
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = S_ADD_I32 %7.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %7.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   GLOBAL_STORE_DWORD_SADDR [[V_MOV_B32_e32_8]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
+  ; GFX908-NEXT:   S_ENDPGM 0, implicit %8, implicit %9, implicit %10, implicit %11, implicit %40
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %12:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %11:vgpr_32(s32) = COPY $vgpr0
+    %17:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %18:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %19:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %21:sreg_64 = V_CMP_GT_U32_e64 %19.sub0, %11(s32), implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    undef %25.sub1:sreg_64 = S_MOV_B32 0
+    %25.sub0:sreg_64 = COPY %19.sub1
+    undef %7.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+    %62:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+    %63:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+    %65:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    undef %71.sub0:vreg_128 = V_MOV_B32_e32 20, implicit $exec
+    %71.sub1:vreg_128 = V_MOV_B32_e32 30, implicit $exec
+    %71.sub2:vreg_128 = V_MOV_B32_e32 40, implicit $exec
+
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %44:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %5:sreg_64 = COPY $exec, implicit-def $exec
+    %45:sreg_64 = S_AND_B64 %5, %21, implicit-def dead $scc
+    $exec = S_MOV_B64_term %45
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %27:sreg_64 = S_LSHL_B64 %25, 2, implicit-def dead $scc
+    undef %28.sub0:sreg_64 = S_ADD_U32 %18.sub0, %27.sub0, implicit-def $scc
+    %28.sub1:sreg_64 = S_ADDC_U32 %18.sub1, %27.sub1, implicit-def dead $scc, implicit killed $scc
+    %29:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %28, 0, 0 :: (load (s32), addrspace 1)
+    %44:vgpr_32 = COPY %29, implicit $exec
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %5, implicit-def $scc
+    %43:vgpr_32 = nofpexcept V_ADD_F32_e32 %43, %44, implicit $mode, implicit $exec
+    %51:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub0:vreg_1024, %10.sub1:vreg_1024, implicit $mode, implicit $exec
+    %52:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1:vreg_1024, %9.sub1:vreg_1024, implicit $mode, implicit $exec
+    %53:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1:vreg_1024, %8.sub1:vreg_1024, implicit $mode, implicit $exec
+    %54:vgpr_32 = nofpexcept V_ADD_F32_e32 %7.sub1:vreg_1024, %7.sub1:vreg_1024, implicit $mode, implicit $exec
+    %55:vgpr_32 = nofpexcept V_ADD_F32_e32 %51, %52, implicit $mode, implicit $exec
+    %60:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %68:vgpr_32 = nofpexcept V_ADD_F32_e32 %60, %55, implicit $mode, implicit $exec
+    %56:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %57:vgpr_32 = nofpexcept V_ADD_F32_e32 %13, %14, implicit $mode, implicit $exec
+    %58:vgpr_32 = nofpexcept V_ADD_F32_e32 %16, %20, implicit $mode, implicit $exec
+    %64:vgpr_32 = nofpexcept V_ADD_F32_e32 %62, %63, implicit $mode, implicit $exec
+    %66:vgpr_32 = nofpexcept V_ADD_F32_e32 %65, %64, implicit $mode, implicit $exec
+    %59:vgpr_32 = nofpexcept V_ADD_F32_e32 %57, %58, implicit $mode, implicit $exec
+    %67:vgpr_32 = nofpexcept V_ADD_F32_e32 %59, %66, implicit $mode, implicit $exec
+    %61:vgpr_32 = nofpexcept V_ADD_F32_e32 %68, %67, implicit $mode, implicit $exec
+    %71.sub3:vreg_128 = V_MOV_B32_e32 50, implicit $exec
+    S_NOP 0, implicit %71
+    %25.sub0:sreg_64 = S_ADD_I32 %25.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %25.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    %32:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    GLOBAL_STORE_DWORD_SADDR %32, %43, %17, 0, 0, implicit $exec :: (store (s32), addrspace 1)
+    S_ENDPGM 0, implicit %7, implicit %8, implicit %9, implicit %10, implicit %61
+
+...
+---
+name:            test_occ_1_no_sink_multiple_uses
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_1_no_sink_multiple_uses
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM2:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM2]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %7.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM2]].sub1
+  ; GFX908-NEXT:   undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %11.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 %7, 2, implicit-def dead $scc
+  ; GFX908-NEXT:   undef %24.sub0:sreg_64 = S_ADD_U32 [[S_LOAD_DWORDX2_IMM1]].sub0, [[S_LSHL_B64_]].sub0, implicit-def $scc
+  ; GFX908-NEXT:   %24.sub1:sreg_64 = S_ADDC_U32 [[S_LOAD_DWORDX2_IMM1]].sub1, [[S_LSHL_B64_]].sub1, implicit-def dead $scc, implicit killed $scc
+  ; GFX908-NEXT:   [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %24, 0, 0 :: (load (s32), addrspace 1)
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORD_IMM]], implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[COPY3]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %26:vgpr_32 = nofpexcept V_ADD_F32_e32 %11.sub0, %11.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %27:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub1, %10.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %28:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1, %9.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %29:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1, %8.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %30:vgpr_32 = nofpexcept V_ADD_F32_e32 %26, %27, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %31:vgpr_32 = nofpexcept V_ADD_F32_e32 %28, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %32:vgpr_32 = nofpexcept V_ADD_F32_e32 %31, %30, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   dead %33:vgpr_32 = nofpexcept V_ADD_F32_e32 %28, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+  ; GFX908-NEXT:   %34:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_2]], [[V_MOV_B32_e32_3]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+  ; GFX908-NEXT:   %35:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_4]], [[V_MOV_B32_e32_5]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+  ; GFX908-NEXT:   %36:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_6]], [[V_MOV_B32_e32_7]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   %37:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_8]], %36, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %38:vgpr_32 = nofpexcept V_ADD_F32_e32 %34, %35, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %39:vgpr_32 = nofpexcept V_ADD_F32_e32 %38, %37, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %40:vgpr_32 = nofpexcept V_ADD_F32_e32 %32, %39, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]]
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = S_ADD_I32 %7.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %7.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]]
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   GLOBAL_STORE_DWORD_SADDR [[V_MOV_B32_e32_9]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
+  ; GFX908-NEXT:   S_ENDPGM 0, implicit %8, implicit %9, implicit %10, implicit %11, implicit %40
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %12:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %11:vgpr_32(s32) = COPY $vgpr0
+    %17:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %18:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %19:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %21:sreg_64 = V_CMP_GT_U32_e64 %19.sub0, %11(s32), implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    undef %25.sub1:sreg_64 = S_MOV_B32 0
+    %25.sub0:sreg_64 = COPY %19.sub1
+    undef %7.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+    %62:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+    %63:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+    %65:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %71:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %44:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %5:sreg_64 = COPY $exec, implicit-def $exec
+    %45:sreg_64 = S_AND_B64 %5, %21, implicit-def dead $scc
+    $exec = S_MOV_B64_term %45
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %27:sreg_64 = S_LSHL_B64 %25, 2, implicit-def dead $scc
+    undef %28.sub0:sreg_64 = S_ADD_U32 %18.sub0, %27.sub0, implicit-def $scc
+    %28.sub1:sreg_64 = S_ADDC_U32 %18.sub1, %27.sub1, implicit-def dead $scc, implicit killed $scc
+    %29:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %28, 0, 0 :: (load (s32), addrspace 1)
+    %44:vgpr_32 = COPY %29, implicit $exec
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %5, implicit-def $scc
+    %43:vgpr_32 = nofpexcept V_ADD_F32_e32 %43, %44, implicit $mode, implicit $exec
+    %51:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub0:vreg_1024, %10.sub1:vreg_1024, implicit $mode, implicit $exec
+    %52:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1:vreg_1024, %9.sub1:vreg_1024, implicit $mode, implicit $exec
+    %53:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1:vreg_1024, %8.sub1:vreg_1024, implicit $mode, implicit $exec
+    %54:vgpr_32 = nofpexcept V_ADD_F32_e32 %7.sub1:vreg_1024, %7.sub1:vreg_1024, implicit $mode, implicit $exec
+    %55:vgpr_32 = nofpexcept V_ADD_F32_e32 %51, %52, implicit $mode, implicit $exec
+    %60:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %68:vgpr_32 = nofpexcept V_ADD_F32_e32 %60, %55, implicit $mode, implicit $exec
+    %56:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %57:vgpr_32 = nofpexcept V_ADD_F32_e32 %13, %14, implicit $mode, implicit $exec
+    %58:vgpr_32 = nofpexcept V_ADD_F32_e32 %16, %20, implicit $mode, implicit $exec
+    %64:vgpr_32 = nofpexcept V_ADD_F32_e32 %62, %63, implicit $mode, implicit $exec
+    %66:vgpr_32 = nofpexcept V_ADD_F32_e32 %65, %64, implicit $mode, implicit $exec
+    %59:vgpr_32 = nofpexcept V_ADD_F32_e32 %57, %58, implicit $mode, implicit $exec
+    %67:vgpr_32 = nofpexcept V_ADD_F32_e32 %59, %66, implicit $mode, implicit $exec
+    %61:vgpr_32 = nofpexcept V_ADD_F32_e32 %68, %67, implicit $mode, implicit $exec
+    S_NOP 0, implicit %71
+    %25.sub0:sreg_64 = S_ADD_I32 %25.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %25.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_NOP 0, implicit %71
+    S_BRANCH %bb.1
+
+  bb.4:
+    %32:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    GLOBAL_STORE_DWORD_SADDR %32, %43, %17, 0, 0, implicit $exec :: (store (s32), addrspace 1)
+    S_ENDPGM 0, implicit %7, implicit %8, implicit %9, implicit %10, implicit %61
+
+...
+---
+name:            test_occ_1_no_sink_multiple_def_clobber
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_1_no_sink_multiple_def_clobber
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM2:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM2]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %7.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM2]].sub1
+  ; GFX908-NEXT:   undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %11.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %11.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 %7, 2, implicit-def dead $scc
+  ; GFX908-NEXT:   undef %24.sub0:sreg_64 = S_ADD_U32 [[S_LOAD_DWORDX2_IMM1]].sub0, [[S_LSHL_B64_]].sub0, implicit-def $scc
+  ; GFX908-NEXT:   %24.sub1:sreg_64 = S_ADDC_U32 [[S_LOAD_DWORDX2_IMM1]].sub1, [[S_LSHL_B64_]].sub1, implicit-def dead $scc, implicit killed $scc
+  ; GFX908-NEXT:   [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %24, 0, 0 :: (load (s32), addrspace 1)
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORD_IMM]], implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[COPY3]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %26:vgpr_32 = nofpexcept V_ADD_F32_e32 %11.sub0, %11.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %27:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub1, %10.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %28:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1, %9.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %29:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1, %8.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %30:vgpr_32 = nofpexcept V_ADD_F32_e32 %26, %27, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %31:vgpr_32 = nofpexcept V_ADD_F32_e32 %28, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %32:vgpr_32 = nofpexcept V_ADD_F32_e32 %31, %30, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   dead %33:vgpr_32 = nofpexcept V_ADD_F32_e32 %28, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+  ; GFX908-NEXT:   %34:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_2]], [[V_MOV_B32_e32_3]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+  ; GFX908-NEXT:   %35:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_4]], [[V_MOV_B32_e32_5]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+  ; GFX908-NEXT:   %36:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_6]], [[V_MOV_B32_e32_7]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   %37:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_8]], %36, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %38:vgpr_32 = nofpexcept V_ADD_F32_e32 %34, %35, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %39:vgpr_32 = nofpexcept V_ADD_F32_e32 %38, %37, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %40:vgpr_32 = nofpexcept V_ADD_F32_e32 %32, %39, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]]
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = S_ADD_I32 %7.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %7.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   GLOBAL_STORE_DWORD_SADDR [[V_MOV_B32_e32_9]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
+  ; GFX908-NEXT:   S_ENDPGM 0, implicit %8, implicit %9, implicit %10, implicit %11, implicit %40
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %12:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %11:vgpr_32(s32) = COPY $vgpr0
+    %17:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %18:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %19:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %21:sreg_64 = V_CMP_GT_U32_e64 %19.sub0, %11(s32), implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    undef %25.sub1:sreg_64 = S_MOV_B32 0
+    %25.sub0:sreg_64 = COPY %19.sub1
+    undef %7.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+    %62:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+    %63:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+    %65:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %71:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %44:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %5:sreg_64 = COPY $exec, implicit-def $exec
+    %45:sreg_64 = S_AND_B64 %5, %21, implicit-def dead $scc
+    $exec = S_MOV_B64_term %45
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %27:sreg_64 = S_LSHL_B64 %25, 2, implicit-def dead $scc
+    undef %28.sub0:sreg_64 = S_ADD_U32 %18.sub0, %27.sub0, implicit-def $scc
+    %28.sub1:sreg_64 = S_ADDC_U32 %18.sub1, %27.sub1, implicit-def dead $scc, implicit killed $scc
+    %29:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %28, 0, 0 :: (load (s32), addrspace 1)
+    %44:vgpr_32 = COPY %29, implicit $exec
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %5, implicit-def $scc
+    %43:vgpr_32 = nofpexcept V_ADD_F32_e32 %43, %44, implicit $mode, implicit $exec
+    %51:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub0:vreg_1024, %10.sub1:vreg_1024, implicit $mode, implicit $exec
+    %52:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1:vreg_1024, %9.sub1:vreg_1024, implicit $mode, implicit $exec
+    %53:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1:vreg_1024, %8.sub1:vreg_1024, implicit $mode, implicit $exec
+    %54:vgpr_32 = nofpexcept V_ADD_F32_e32 %7.sub1:vreg_1024, %7.sub1:vreg_1024, implicit $mode, implicit $exec
+    %55:vgpr_32 = nofpexcept V_ADD_F32_e32 %51, %52, implicit $mode, implicit $exec
+    %60:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %68:vgpr_32 = nofpexcept V_ADD_F32_e32 %60, %55, implicit $mode, implicit $exec
+    %56:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %57:vgpr_32 = nofpexcept V_ADD_F32_e32 %13, %14, implicit $mode, implicit $exec
+    %58:vgpr_32 = nofpexcept V_ADD_F32_e32 %16, %20, implicit $mode, implicit $exec
+    %64:vgpr_32 = nofpexcept V_ADD_F32_e32 %62, %63, implicit $mode, implicit $exec
+    %66:vgpr_32 = nofpexcept V_ADD_F32_e32 %65, %64, implicit $mode, implicit $exec
+    %59:vgpr_32 = nofpexcept V_ADD_F32_e32 %57, %58, implicit $mode, implicit $exec
+    %67:vgpr_32 = nofpexcept V_ADD_F32_e32 %59, %66, implicit $mode, implicit $exec
+    %61:vgpr_32 = nofpexcept V_ADD_F32_e32 %68, %67, implicit $mode, implicit $exec
+    S_NOP 0, implicit %71
+    %25.sub0:sreg_64 = S_ADD_I32 %25.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %25.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    %71:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+    S_BRANCH %bb.1
+
+  bb.4:
+    %32:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    GLOBAL_STORE_DWORD_SADDR %32, %43, %17, 0, 0, implicit $exec :: (store (s32), addrspace 1)
+    S_ENDPGM 0, implicit %7, implicit %8, implicit %9, implicit %10, implicit %61
+
+...
+
+---
+name:            test_occ_2_no_sink
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_2_no_sink
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM2:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM2]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %7.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM2]].sub1
+  ; GFX908-NEXT:   undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   undef %10.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   %10.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 %7, 2, implicit-def dead $scc
+  ; GFX908-NEXT:   undef %23.sub0:sreg_64 = S_ADD_U32 [[S_LOAD_DWORDX2_IMM1]].sub0, [[S_LSHL_B64_]].sub0, implicit-def $scc
+  ; GFX908-NEXT:   %23.sub1:sreg_64 = S_ADDC_U32 [[S_LOAD_DWORDX2_IMM1]].sub1, [[S_LSHL_B64_]].sub1, implicit-def dead $scc, implicit killed $scc
+  ; GFX908-NEXT:   [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %23, 0, 0 :: (load (s32), addrspace 1)
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORD_IMM]], implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[COPY3]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %25:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub2, %10.sub3, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %26:vgpr_32 = nofpexcept V_ADD_F32_e32 %10.sub1, %10.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %27:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1, %9.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %28:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1, %8.sub1, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %29:vgpr_32 = nofpexcept V_ADD_F32_e32 %25, %26, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %30:vgpr_32 = nofpexcept V_ADD_F32_e32 %27, %28, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %31:vgpr_32 = nofpexcept V_ADD_F32_e32 %30, %29, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   dead %32:vgpr_32 = nofpexcept V_ADD_F32_e32 %27, %28, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %33:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_2]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %34:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_3]], [[V_MOV_B32_e32_4]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %35:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_5]], [[V_MOV_B32_e32_6]], implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %36:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_7]], %35, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %37:vgpr_32 = nofpexcept V_ADD_F32_e32 %33, %34, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %38:vgpr_32 = nofpexcept V_ADD_F32_e32 %37, %36, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   %39:vgpr_32 = nofpexcept V_ADD_F32_e32 %31, %38, implicit $mode, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]]
+  ; GFX908-NEXT:   %7.sub0:sreg_64 = S_ADD_I32 %7.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %7.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]]
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   GLOBAL_STORE_DWORD_SADDR [[V_MOV_B32_e32_9]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX2_IMM]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
+  ; GFX908-NEXT:   S_ENDPGM 0, implicit %8, implicit %9, implicit %10, implicit %39
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %12:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %11:vgpr_32(s32) = COPY $vgpr0
+    %17:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 36, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %18:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 44, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %19:sreg_64_xexec = S_LOAD_DWORDX2_IMM %12(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %21:sreg_64 = V_CMP_GT_U32_e64 %19.sub0, %11(s32), implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    undef %25.sub1:sreg_64 = S_MOV_B32 0
+    %25.sub0:sreg_64 = COPY %19.sub1
+    undef %7.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %7.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %8.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %8.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    undef %9.sub0:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub1:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub2:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub3:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub4:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub5:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub6:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub7:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub8:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub9:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub10:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub11:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub12:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub13:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub14:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub15:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub16:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub17:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub18:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub19:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub20:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub21:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub22:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub23:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub24:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub25:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub26:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub27:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub28:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub29:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub30:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %9.sub31:vreg_1024 = V_MOV_B32_e32 0, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 1545371, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 1375812, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 1169812, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 1611812, implicit $exec
+    %62:vgpr_32 = V_MOV_B32_e32 1921812, implicit $exec
+    %63:vgpr_32 = V_MOV_B32_e32 1422412, implicit $exec
+    %65:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %71:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %44:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %5:sreg_64 = COPY $exec, implicit-def $exec
+    %45:sreg_64 = S_AND_B64 %5, %21, implicit-def dead $scc
+    $exec = S_MOV_B64_term %45
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %27:sreg_64 = S_LSHL_B64 %25, 2, implicit-def dead $scc
+    undef %28.sub0:sreg_64 = S_ADD_U32 %18.sub0, %27.sub0, implicit-def $scc
+    %28.sub1:sreg_64 = S_ADDC_U32 %18.sub1, %27.sub1, implicit-def dead $scc, implicit killed $scc
+    %29:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %28, 0, 0 :: (load (s32), addrspace 1)
+    %44:vgpr_32 = COPY %29, implicit $exec
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %5, implicit-def $scc
+    %43:vgpr_32 = nofpexcept V_ADD_F32_e32 %43, %44, implicit $mode, implicit $exec
+    %51:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub2:vreg_1024, %9.sub3:vreg_1024, implicit $mode, implicit $exec
+    %52:vgpr_32 = nofpexcept V_ADD_F32_e32 %9.sub1:vreg_1024, %9.sub1:vreg_1024, implicit $mode, implicit $exec
+    %53:vgpr_32 = nofpexcept V_ADD_F32_e32 %8.sub1:vreg_1024, %8.sub1:vreg_1024, implicit $mode, implicit $exec
+    %54:vgpr_32 = nofpexcept V_ADD_F32_e32 %7.sub1:vreg_1024, %7.sub1:vreg_1024, implicit $mode, implicit $exec
+    %55:vgpr_32 = nofpexcept V_ADD_F32_e32 %51, %52, implicit $mode, implicit $exec
+    %60:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %68:vgpr_32 = nofpexcept V_ADD_F32_e32 %60, %55, implicit $mode, implicit $exec
+    %56:vgpr_32 = nofpexcept V_ADD_F32_e32 %53, %54, implicit $mode, implicit $exec
+    %57:vgpr_32 = nofpexcept V_ADD_F32_e32 %13, %14, implicit $mode, implicit $exec
+    %58:vgpr_32 = nofpexcept V_ADD_F32_e32 %16, %20, implicit $mode, implicit $exec
+    %64:vgpr_32 = nofpexcept V_ADD_F32_e32 %62, %63, implicit $mode, implicit $exec
+    %66:vgpr_32 = nofpexcept V_ADD_F32_e32 %65, %64, implicit $mode, implicit $exec
+    %59:vgpr_32 = nofpexcept V_ADD_F32_e32 %57, %58, implicit $mode, implicit $exec
+    %67:vgpr_32 = nofpexcept V_ADD_F32_e32 %59, %66, implicit $mode, implicit $exec
+    %61:vgpr_32 = nofpexcept V_ADD_F32_e32 %68, %67, implicit $mode, implicit $exec
+    S_NOP 0, implicit %71
+    %25.sub0:sreg_64 = S_ADD_I32 %25.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %25.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_NOP 0, implicit %71
+    S_BRANCH %bb.1
+
+  bb.4:
+    %32:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    GLOBAL_STORE_DWORD_SADDR %32, %43, %17, 0, 0, implicit $exec :: (store (s32), addrspace 1)
+    S_ENDPGM 0, implicit %7, implicit %8, implicit %9, implicit %61
+
+...
+