diff --git a/llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp b/llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
--- a/llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
@@ -25,11 +25,16 @@
 //===----------------------------------------------------------------------===//
 
 #include "AMDGPU.h"
+#include "GCNRegPressure.h"
 #include "GCNSubtarget.h"
 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
+#include "SIMachineFunctionInfo.h"
+#include "llvm/ADT/DenseMap.h"
 #include "llvm/CodeGen/LiveIntervals.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
 #include "llvm/InitializePasses.h"
+#include <utility>
 
 using namespace llvm;
 
@@ -43,9 +48,28 @@
   const SIRegisterInfo *TRI;
   MachineRegisterInfo *MRI;
   LiveIntervals *LIS;
+  MachineLoopInfo *LI;
+
+  // Minimal real occupancy recorder for the function
+  unsigned MinOccupancy;
+
+  // Store all MBBs that are at the MinOccupancy found in attemps to improve
+  // them
+  SmallVector<MachineBasicBlock *, 16> HighPressureBlocks;
+
+  // Preheaders cache
+  std::set<MachineBasicBlock *> Preheaders;
+
+  // Block pressure cache
+  DenseMap<MachineBasicBlock *, GCNRegPressure> BlockPressures;
+
+  // Cache live-ins
+  DenseMap<MachineBasicBlock *, llvm::GCNRPTracker::LiveRegSet> BBLiveIns;
 
   bool processReg(Register Reg);
 
+  bool sinkVGPRImmDefs(MachineFunction &MF, const GCNSubtarget &ST);
+
 public:
   static char ID;
 
@@ -61,6 +85,7 @@
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     AU.addRequired<LiveIntervals>();
+    AU.addRequired<MachineLoopInfo>();
     AU.setPreservesAll();
     MachineFunctionPass::getAnalysisUsage(AU);
   }
@@ -71,6 +96,7 @@
 INITIALIZE_PASS_BEGIN(GCNPreRAOptimizations, DEBUG_TYPE,
                       "AMDGPU Pre-RA optimizations", false, false)
 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
 INITIALIZE_PASS_END(GCNPreRAOptimizations, DEBUG_TYPE, "Pre-RA optimizations",
                     false, false)
 
@@ -85,24 +111,48 @@
 bool GCNPreRAOptimizations::processReg(Register Reg) {
   MachineInstr *Def0 = nullptr;
   MachineInstr *Def1 = nullptr;
+  MachineInstr *VGPRImmDef = nullptr;
+  MachineInstr *VGPRImmUse = nullptr;
+  DenseMap<unsigned, unsigned> SeenSubRegDefs;
+
   uint64_t Init = 0;
   bool Changed = false;
   SmallSet<Register, 32> ModifiedRegs;
-  bool IsAGPRDst = TRI->isAGPRClass(MRI->getRegClass(Reg));
+
+  const TargetRegisterClass *RC = MRI->getRegClass(Reg);
+  bool IsAGPRDst = TRI->isAGPRClass(RC);
+  bool IsVGPRDst = TRI->isVGPRClass(RC);
+  bool IsSGPRDst = TRI->isSGPRClass(RC);
 
   for (MachineInstr &I : MRI->def_instructions(Reg)) {
+    // Keep track of how many times a specific register or subreg is defined.
+    if (IsVGPRDst) {
+      MachineOperand &Op = I.getOperand(0);
+      if (!Op.isReg())
+        break;
+      // Reg will always be the same for this call so keep track of subreg
+      auto FindReg = SeenSubRegDefs.find(Op.getSubReg());
+      if (FindReg != SeenSubRegDefs.end())
+        SeenSubRegDefs[Op.getSubReg()] += 1;
+      else
+        SeenSubRegDefs[Op.getSubReg()] = 1;
+    }
     switch (I.getOpcode()) {
     default:
-      return false;
+      if (IsSGPRDst)
+        return false;
+      break;
     case AMDGPU::V_ACCVGPR_WRITE_B32_e64:
       break;
     case AMDGPU::COPY: {
       // Some subtargets cannot do an AGPR to AGPR copy directly, and need an
       // intermdiate temporary VGPR register. Try to find the defining
       // accvgpr_write to avoid temporary registers.
+      if (IsSGPRDst)
+        return false;
 
       if (!IsAGPRDst)
-        return false;
+        break;
 
       Register SrcReg = I.getOperand(1).getReg();
 
@@ -169,6 +219,33 @@
         break;
       }
       break;
+    case AMDGPU::V_MOV_B32_e32:
+      if (!IsVGPRDst || !I.getOperand(1).isImm() || !MRI->hasOneUse(Reg))
+        break;
+
+      for (MachineInstr &UseI : MRI->use_instructions(Reg)) {
+        // First find if a use is within a loop
+        MachineLoop *CurUseL = LI->getLoopFor(UseI.getParent());
+        if (!CurUseL)
+          break;
+
+        // Check if the def is in the loop preheader
+        MachineBasicBlock *Preheader = LI->findLoopPreheader(CurUseL);
+        if (!Preheader || Preheader != I.getParent())
+          break;
+
+        // Don't sink if there is a use in the same block.
+        if (I.getParent() == UseI.getParent())
+          break;
+
+        if (VGPRImmDef || VGPRImmUse)
+          return false;
+
+        VGPRImmDef = &I;
+        VGPRImmUse = &UseI;
+        break;
+      }
+      break;
     }
   }
 
@@ -185,33 +262,501 @@
   }
 
   // For SGPR reg, check if we can combine instructions.
-  if (!Def0 || !Def1 || Def0->getParent() != Def1->getParent())
+  if (IsSGPRDst && (!Def0 || !Def1 || Def0->getParent() != Def1->getParent()))
+    return Changed;
+  // For VGPR reg, check if we can sink a imm def to a use
+  else if (TRI->isVGPRClass(RC) && (!VGPRImmDef || !VGPRImmUse))
     return Changed;
 
-  LLVM_DEBUG(dbgs() << "Combining:\n  " << *Def0 << "  " << *Def1
-                    << "    =>\n");
-
-  if (SlotIndex::isEarlierInstr(LIS->getInstructionIndex(*Def1),
-                                LIS->getInstructionIndex(*Def0)))
-    std::swap(Def0, Def1);
+  if (IsSGPRDst) {
+    LLVM_DEBUG(dbgs() << "Combining:\n  " << *Def0 << "  " << *Def1
+                      << "    =>\n");
+
+    if (SlotIndex::isEarlierInstr(LIS->getInstructionIndex(*Def1),
+                                  LIS->getInstructionIndex(*Def0)))
+      std::swap(Def0, Def1);
+
+    LIS->RemoveMachineInstrFromMaps(*Def0);
+    LIS->RemoveMachineInstrFromMaps(*Def1);
+    auto NewI = BuildMI(*Def0->getParent(), *Def0, Def0->getDebugLoc(),
+                        TII->get(AMDGPU::S_MOV_B64_IMM_PSEUDO), Reg)
+                    .addImm(Init);
+
+    Def0->eraseFromParent();
+    Def1->eraseFromParent();
+    LIS->InsertMachineInstrInMaps(*NewI);
+    LIS->removeInterval(Reg);
+    LIS->createAndComputeVirtRegInterval(Reg);
+
+    LLVM_DEBUG(dbgs() << "  " << *NewI);
+  } else if (IsVGPRDst) {
+    // If same register is defined more than once then do not sink def to use
+    // incase of clobbering a new def.
+    if (SeenSubRegDefs[VGPRImmDef->getOperand(0).getSubReg()] > 1)
+      return false;
 
-  LIS->RemoveMachineInstrFromMaps(*Def0);
-  LIS->RemoveMachineInstrFromMaps(*Def1);
-  auto NewI = BuildMI(*Def0->getParent(), *Def0, Def0->getDebugLoc(),
-                      TII->get(AMDGPU::S_MOV_B64_IMM_PSEUDO), Reg)
-                  .addImm(Init);
+    bool IsUndef = VGPRImmDef->getOperand(0).isUndef();
+    MachineBasicBlock::iterator Pos = MachineBasicBlock::iterator(*VGPRImmUse);
+    // FIXME: Is there an easier way to fix undef flags?
+    if (IsUndef && VGPRImmDef->getOperand(0).getSubReg() != 0) {
+      MachineInstr *CurrInsertPos = nullptr;
+      for (MachineInstr &I : MRI->def_instructions(Reg)) {
+        if (&I == VGPRImmDef)
+          continue;
 
-  Def0->eraseFromParent();
-  Def1->eraseFromParent();
-  LIS->InsertMachineInstrInMaps(*NewI);
-  LIS->removeInterval(Reg);
-  LIS->createAndComputeVirtRegInterval(Reg);
+        // Require all defs in same block to fix undef flag for subregs
+        if (I.getParent() != VGPRImmUse->getParent())
+          return false;
 
-  LLVM_DEBUG(dbgs() << "  " << *NewI);
+        // Inserting MI before any other subreg def of this reg and set undef
+        // flag.
+        if (!CurrInsertPos)
+          CurrInsertPos = &I;
+        else if (SlotIndex::isEarlierInstr(
+                     LIS->getInstructionIndex(I),
+                     LIS->getInstructionIndex(*CurrInsertPos)))
+          CurrInsertPos = &I;
+      }
+      if (CurrInsertPos)
+        Pos = MachineBasicBlock::iterator(*CurrInsertPos);
+    }
 
+    LLVM_DEBUG(dbgs() << "Immediate def only has one use, sinking: "
+                      << *VGPRImmDef
+                      << "    to its use before: " << *VGPRImmUse);
+    auto NewI = BuildMI(*VGPRImmUse->getParent(), Pos, DebugLoc(),
+                        TII->get(AMDGPU::V_MOV_B32_e32))
+                    .addDef(VGPRImmDef->getOperand(0).getReg(),
+                            IsUndef ? RegState::Undef : 0,
+                            VGPRImmDef->getOperand(0).getSubReg())
+                    .addImm(VGPRImmDef->getOperand(1).getImm());
+
+    LIS->RemoveMachineInstrFromMaps(*VGPRImmDef);
+    VGPRImmDef->eraseFromParent();
+    LIS->InsertMachineInstrInMaps(*NewI);
+    LIS->removeInterval(Reg);
+    LIS->createAndComputeVirtRegInterval(Reg);
+  }
   return true;
 }
 
+bool GCNPreRAOptimizations::sinkVGPRImmDefs(MachineFunction &MF,
+                                            const GCNSubtarget &ST) {
+  HighPressureBlocks.clear();
+  Preheaders.clear();
+  BlockPressures.clear();
+  BBLiveIns.clear();
+
+  // Record the minimum occupancy in this function and all of the blocks with
+  // the same minimun occupancy in hopes of sinking imm defs from preheaders
+  // into loop and improving occupancy.
+  const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
+  unsigned MaxOccupancy =
+      ST.computeOccupancy(MF.getFunction(), MFI->getLDSSize());
+  MinOccupancy = MFI->getOccupancy();
+  bool NotVGPRLimited = false;
+  for (MachineBasicBlock &MBB : MF) {
+    // Ignore empty blocks
+    if (MBB.begin() == MBB.end())
+      continue;
+
+    // Find and cache all preheaders
+    MachineLoop *L = LI->getLoopFor(&MBB);
+    if (L) {
+      MachineBasicBlock *P = LI->findLoopPreheader(L);
+      if (P)
+        Preheaders.insert(P);
+    }
+
+    // Move RP Tracker from beginning to end to get RP informtion
+    GCNDownwardRPTracker RPT(*LIS);
+    auto *MIAfterDebug = &*skipDebugInstructionsForward(MBB.begin(), MBB.end());
+    RPT.reset(*MIAfterDebug);
+    BBLiveIns[&MBB] = RPT.getLiveRegs();
+    RPT.advance(MIAfterDebug, MBB.end());
+
+    // Record RP
+    DenseMap<MachineBasicBlock *, GCNRegPressure>::iterator It;
+    bool Inserted;
+    std::tie(It, Inserted) =
+        BlockPressures.insert(std::make_pair(&MBB, RPT.moveMaxPressure()));
+    assert(Inserted);
+    unsigned Occupancy = It->second.getOccupancy(ST);
+    int VGPRUsage = It->second.getVGPRNum(ST.hasGFX90AInsts());
+    int SGPRUsage = It->second.getSGPRNum();
+
+    // Check if current occupancy is a new minimum
+    if (Occupancy < MinOccupancy) {
+      // New minimum found, clear previously saved blocks with old minimun
+      MinOccupancy = Occupancy;
+      HighPressureBlocks.clear();
+      NotVGPRLimited = false;
+    }
+    // Save blocks with the same occupancy as the current minimum
+    if (Occupancy == MinOccupancy) {
+      HighPressureBlocks.push_back(&MBB);
+
+      // The occupancy of this block is not limited by VGPR usage. If we
+      // include it in the final list then we cannot increase occupancy even if
+      // we reduce RP for VGPRs
+      if (ST.getOccupancyWithNumVGPRs(VGPRUsage) > Occupancy ||
+          ST.getOccupancyWithNumSGPRs(SGPRUsage) == Occupancy) {
+        NotVGPRLimited = true;
+      }
+    }
+  }
+
+  // Occupancy at max or we cannot find any loop preheaders making it
+  // impossible to detect any sinkable VGPR imm defs
+  if (MinOccupancy == MaxOccupancy || Preheaders.empty() || NotVGPRLimited)
+    return false;
+
+  LLVM_DEBUG(dbgs() << "PreRaOpt: Found minimum occupancy of " << MinOccupancy
+                    << " in " << HighPressureBlocks.size() << " blocks\n");
+
+  // Find a list of sinkable imm defs without actually sinking them yet.
+  SmallVector<std::pair<MachineInstr *, MachineInstr *>> SinkableImmDefs;
+  DenseMap<MachineInstr *, MachineInstr *> InsertPos;
+  for (unsigned I = 0, E = MRI->getNumVirtRegs(); I != E; ++I) {
+    Register Reg = Register::index2VirtReg(I);
+    if (!LIS->hasInterval(Reg))
+      continue;
+
+    const TargetRegisterClass *RC = MRI->getRegClass(Reg);
+    if (!TRI->isVGPRClass(RC))
+      continue;
+
+    if (!MRI->hasOneUse(Reg))
+      continue;
+
+    DenseMap<unsigned, unsigned> SeenSubRegDefs;
+    MachineInstr *VGPRImmDef = nullptr;
+    MachineInstr *VGPRImmUse = nullptr;
+    for (MachineInstr &Def : MRI->def_instructions(Reg)) {
+      if (!Def.getOperand(0).isReg())
+        continue;
+      // If there are multiple defs then avoid sinking this register/subreg to
+      // avoid clobbering
+      auto FindReg = SeenSubRegDefs.find(Def.getOperand(0).getSubReg());
+      if (FindReg != SeenSubRegDefs.end())
+        SeenSubRegDefs[Def.getOperand(0).getSubReg()] += 1;
+      else
+        SeenSubRegDefs[Def.getOperand(0).getSubReg()] = 1;
+
+      if (Def.getOpcode() != AMDGPU::V_MOV_B32_e32)
+        continue;
+
+      if (!Def.getOperand(1).isImm())
+        continue;
+
+      auto PreheaderIt = Preheaders.find(Def.getParent());
+      if (PreheaderIt == Preheaders.end())
+        continue;
+
+      for (MachineInstr &UseI : MRI->use_instructions(Reg)) {
+        // First find if a use is within a loop
+        MachineLoop *CurUseL = LI->getLoopFor(UseI.getParent());
+        if (!CurUseL)
+          break;
+
+        // Don't sink if there is a use in the same block.
+        if (Def.getParent() == UseI.getParent())
+          break;
+
+        VGPRImmDef = &Def;
+        VGPRImmUse = &UseI;
+        break;
+      }
+    }
+
+    if (!VGPRImmDef || !VGPRImmUse)
+      continue;
+
+    // If register defs is seen more than once then do not try sinking to avoid
+    // clobbering
+    if (SeenSubRegDefs[VGPRImmDef->getOperand(0).getSubReg()] > 1)
+      continue;
+
+    bool IsUndef = VGPRImmDef->getOperand(0).isUndef();
+    bool UndefInSameBlock = true;
+    MachineInstr *Pos = VGPRImmUse;
+    // FIXME: Is there an easier way to fix undef flags?
+    if (IsUndef && VGPRImmDef->getOperand(0).getSubReg() != 0) {
+      for (MachineInstr &SubRegDef : MRI->def_instructions(Reg)) {
+        if (&SubRegDef == VGPRImmDef)
+          continue;
+
+        // Require all defs in same block to fix undef flag for subregs
+        if (SubRegDef.getParent() != VGPRImmUse->getParent()) {
+          UndefInSameBlock = false;
+          break;
+        }
+
+        if (SlotIndex::isEarlierInstr(LIS->getInstructionIndex(SubRegDef),
+                                      LIS->getInstructionIndex(*Pos)))
+          Pos = &SubRegDef;
+      }
+    }
+
+    if (!UndefInSameBlock)
+      continue;
+
+    LLVM_DEBUG(dbgs() << "PreRaOpt: Found sinkable MI: " << *VGPRImmDef);
+    SinkableImmDefs.push_back(std::make_pair(VGPRImmDef, VGPRImmUse));
+    InsertPos[VGPRImmDef] = Pos;
+  }
+
+  // Store the actual instructions that we will be sinking.
+  SmallVector<std::pair<MachineInstr *, MachineInstr *>> ToSinkImmDefs;
+
+  // Nothing to sink, cannot improve occupancy
+  if (SinkableImmDefs.empty())
+    return false;
+  else {
+    // Perform analysis on high pressure blocks to see if sinking will give an
+    // improvement in occupancy in high pressure blocks. If no improvement can
+    // be made given the analysis then do not perform any sinking. An
+    // improvement can be made if all blocks improved above the recorded
+    // MinOccupancy. Assuming imm defs have a VGPR weight of 1.
+    for (auto &MBB : HighPressureBlocks) {
+      // If a high pressure block is not within a loop or loop preheader then we
+      // cannot reduce the RP for that block so bail
+      LLVM_DEBUG(dbgs() << "PreRAOpt: Looking at high pressure MBB: %"
+                        << MBB->getName() << "." << MBB->getNumber() << "\n");
+      MachineLoop *L = LI->getLoopFor(MBB);
+      auto PreheaderIt = Preheaders.find(MBB);
+      if (!L && PreheaderIt == Preheaders.end())
+        return false;
+
+      auto BlockPessureIt = BlockPressures.find(MBB);
+      assert(BlockPessureIt != BlockPressures.end());
+      GCNRegPressure CurRegPressure = BlockPessureIt->second;
+      unsigned VGPRUsage = CurRegPressure.getVGPRNum(ST.hasGFX90AInsts());
+
+      // Best case scenario is if all imm defs in the list are live-throughs
+      // and we are able to sink them thus removing them from being live-ins to
+      // this MBB. This does not guarantee that we should sink but it will save
+      // us from expensive checks if increasing occupancy is not possible even
+      // with the best outcome.
+      int BestRegDiff =
+          VGPRUsage - (ToSinkImmDefs.size() + SinkableImmDefs.size());
+      unsigned BestScenarioOccupancy = ST.getOccupancyWithNumVGPRs(BestRegDiff);
+      if (BestScenarioOccupancy <= MinOccupancy) {
+        LLVM_DEBUG(
+            dbgs()
+            << "PreRAOpt: Not sinking => MBB failed best case scenario\n");
+        LLVM_DEBUG(dbgs() << "    VGPR Usage: " << VGPRUsage << "\n"
+                          << "    Total able to sink: "
+                          << ToSinkImmDefs.size() + SinkableImmDefs.size()
+                          << "\n");
+        return false;
+      }
+
+      SmallVector<std::pair<MachineInstr *, MachineInstr *>>::iterator It;
+
+      // Iterate first through the list of instructions that we will be sinking
+      // then the instructions that are sinkable.
+      bool AddToSink = false;
+      if (!ToSinkImmDefs.empty())
+        It = ToSinkImmDefs.begin();
+      else {
+        It = SinkableImmDefs.begin();
+        AddToSink = true;
+      }
+      bool PreheaderImproved = false;
+      // If preheader has an issue with RP then check if register pressure in
+      // preheader will decrease if we sink the list of imm defs.
+      if (PreheaderIt != Preheaders.end()) {
+        int SinkableVGPRs = 0;
+        It = SinkableImmDefs.begin();
+        while (It != SinkableImmDefs.end()) {
+          MachineInstr *Def = It->first;
+          if (Def->getParent() == MBB) {
+            SinkableVGPRs += 1;
+            int PreheaderRegDiff = VGPRUsage - SinkableVGPRs;
+            if (AddToSink) {
+              ToSinkImmDefs.push_back(std::make_pair(Def, It->second));
+              It = SinkableImmDefs.erase(It);
+            } else
+              It++;
+            // Preheader will improve if we sink
+            if (ST.getOccupancyWithNumVGPRs(PreheaderRegDiff) > MinOccupancy) {
+              PreheaderImproved = true;
+              break;
+            }
+          } else
+            It++;
+          if (It == ToSinkImmDefs.end()) {
+            It = SinkableImmDefs.begin();
+            AddToSink = true;
+          }
+        }
+        if (PreheaderImproved)
+          continue;
+        // Preheader is an issue and we will not be able to increase
+        // occupancy even if we sink
+        LLVM_DEBUG(
+            dbgs()
+            << "PreRAOpt: Not sinking => Preheader will not be improved\n"
+            << "    VGPRUsage: " << VGPRUsage << "\n"
+            << "    Able to sink: " << SinkableVGPRs << "\n"
+            << "    Occupancy with diff: "
+            << ST.getOccupancyWithNumVGPRs(VGPRUsage - SinkableVGPRs) << "\n");
+        return false;
+      }
+
+      // If we cannot find live-ins for this MBB then something has gone wrong,
+      // bail
+      auto ItLiveIns = BBLiveIns.find(MBB);
+      if (ItLiveIns == BBLiveIns.end())
+        return false;
+
+      // Get live-ins and live-outs for current MBB
+      GCNRPTracker::LiveRegSet LiveIns = ItLiveIns->second;
+
+      // This live-in set will be modified to simulate sinking
+      GCNRPTracker::LiveRegSet LiveInsWithSinking;
+      LiveInsWithSinking.copyFrom(LiveIns);
+
+      if (!ToSinkImmDefs.empty()) {
+        It = ToSinkImmDefs.begin();
+        AddToSink = false;
+      } else {
+        It = SinkableImmDefs.begin();
+        AddToSink = true;
+      }
+      bool ImprovedAfterSinkingLiveThrus = false;
+      int LiveThroughs = 0;
+      while (It != SinkableImmDefs.end()) {
+        MachineInstr *Def = It->first;
+        MachineInstr *Use = It->second;
+        Register DefReg = Def->getOperand(0).getReg();
+        // Find imm defs that are live-through in this block. We can deduct
+        // this from VGPR usage to simulate sinking them to see if occupancy
+        // will improve.
+        if (MBB != Use->getParent() && LiveIns.find(DefReg) != LiveIns.end()) {
+          LiveThroughs += 1;
+          if (AddToSink) {
+            ToSinkImmDefs.push_back(std::make_pair(Def, Use));
+            It = SinkableImmDefs.erase(It);
+          } else
+            It++;
+          int LiveThroughDiff = VGPRUsage - LiveThroughs;
+          // Remove register from the live-in set
+          LiveInsWithSinking[DefReg] = LaneBitmask::getNone();
+          unsigned OccAfterSinkingLiveThru =
+              ST.getOccupancyWithNumVGPRs(LiveThroughDiff);
+          // Occupancy for this MBB can be improved just by sinking the
+          // live-through imm defs so we do not need to check further.
+          if (OccAfterSinkingLiveThru > MinOccupancy) {
+            ImprovedAfterSinkingLiveThrus = true;
+            break;
+          }
+        } else
+          It++;
+        if (It == ToSinkImmDefs.end()) {
+          It = SinkableImmDefs.begin();
+          AddToSink = true;
+        }
+      }
+
+      // This block can be improved by sinking live-throughs, check next MBB
+      if (ImprovedAfterSinkingLiveThrus)
+        continue;
+
+      // If sinkin live-throughs was not enough to increase occupancy then
+      // temporarily sink all imm defs that are used in this block to calculate
+      // the new RP after sinking.
+      if (!ToSinkImmDefs.empty()) {
+        It = ToSinkImmDefs.begin();
+        AddToSink = false;
+      } else {
+        It = SinkableImmDefs.begin();
+        AddToSink = true;
+      }
+
+      SmallVector<MachineInstr *, 4> InsertedMI;
+      DenseMap<MachineInstr *, MachineInstr *> InsertedMIToOldDef;
+      GCNDownwardRPTracker RPT(*LIS);
+      auto *MI = &*skipDebugInstructionsForward(MBB->begin(), MBB->end());
+      unsigned ImproveOccupancy = 0;
+      while (It != SinkableImmDefs.end()) {
+        MachineInstr *Def = It->first;
+        MachineInstr *Use = It->second;
+        Register DefReg = Def->getOperand(0).getReg();
+        // Find imm defs that are used in this block and sink them temporarily
+        if (MBB == Use->getParent() && LiveIns.find(DefReg) != LiveIns.end()) {
+          if (AddToSink) {
+            ToSinkImmDefs.push_back(std::make_pair(Def, Use));
+            It = SinkableImmDefs.erase(It);
+          } else
+            It++;
+          MachineInstr *Pos = InsertPos[Def];
+          // Remove register from the live-in set
+          LiveInsWithSinking[DefReg] = LaneBitmask::getNone();
+          bool IsUndef = Def->getOperand(0).isUndef();
+          MachineInstr *NewI = BuildMI(*Use->getParent(), Pos, DebugLoc(),
+                                       TII->get(AMDGPU::V_MOV_B32_e32))
+                                   .addDef(Def->getOperand(0).getReg(),
+                                           IsUndef ? RegState::Undef : 0,
+                                           Def->getOperand(0).getSubReg())
+                                   .addImm(Def->getOperand(1).getImm());
+          InsertedMI.push_back(NewI);
+          InsertedMIToOldDef[NewI] = Def;
+          LIS->InsertMachineInstrInMaps(*NewI);
+          LIS->removeInterval(Def->getOperand(0).getReg());
+          LIS->createAndComputeVirtRegInterval(Def->getOperand(0).getReg());
+
+          // Record RP with live-through registers and registers that are sunk
+          // into this block removed from the live-in set.
+          // FIXME: Is there a better way to re-calculate RP without iterating
+          // over the whole region again?
+          RPT.reset(*MI, &LiveInsWithSinking);
+          RPT.advance(MBB->end());
+          GCNRegPressure RPAfterSinkingUses = RPT.moveMaxPressure();
+          if (RPAfterSinkingUses.getOccupancy(ST) > MinOccupancy) {
+            ImproveOccupancy = RPAfterSinkingUses.getOccupancy(ST);
+            break;
+          }
+        } else
+          It++;
+        if (It == ToSinkImmDefs.end()) {
+          It = SinkableImmDefs.begin();
+          AddToSink = true;
+        }
+      }
+
+      // Undo sinking
+      for (MachineInstr *MI : InsertedMI) {
+        Register Reg = MI->getOperand(0).getReg();
+        LIS->RemoveMachineInstrFromMaps(*MI);
+        MI->eraseFromParent();
+        InsertedMIToOldDef[MI]->clearRegisterDeads(Reg);
+        LIS->removeInterval(Reg);
+        LIS->createAndComputeVirtRegInterval(Reg);
+      }
+
+      // If simulating sinking live-throughs and imm defs that are used in this
+      // block did not improve occupancy for this MBB then bail.
+      if (ImproveOccupancy <= MinOccupancy) {
+        LLVM_DEBUG(
+            dbgs()
+            << "PreRAOpt: Not sinking => Occupancy will not be improved\n");
+        return false;
+      }
+    }
+  }
+
+  // Perform the actual sinking
+  bool Changed = false;
+  for (auto &DefUseSinkPair : ToSinkImmDefs) {
+    MachineInstr *Def = DefUseSinkPair.first;
+    Changed |= processReg(Def->getOperand(0).getReg());
+  }
+
+  return Changed;
+}
+
 bool GCNPreRAOptimizations::runOnMachineFunction(MachineFunction &MF) {
   if (skipFunction(MF.getFunction()))
     return false;
@@ -221,8 +766,9 @@
   MRI = &MF.getRegInfo();
   LIS = &getAnalysis<LiveIntervals>();
   TRI = ST.getRegisterInfo();
+  LI = &getAnalysis<MachineLoopInfo>();
 
-  bool Changed = false;
+  bool Changed = sinkVGPRImmDefs(MF, ST);
 
   for (unsigned I = 0, E = MRI->getNumVirtRegs(); I != E; ++I) {
     Register Reg = Register::index2VirtReg(I);
diff --git a/llvm/test/CodeGen/AMDGPU/pre-ra-opt-sink-imm.mir b/llvm/test/CodeGen/AMDGPU/pre-ra-opt-sink-imm.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/pre-ra-opt-sink-imm.mir
@@ -0,0 +1,7770 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass=liveintervals,amdgpu-pre-ra-optimizations -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX908 %s
+
+---
+name:            test_occ_10_no_sink
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_10_no_sink
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    S_NOP 0
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_NOP 0, implicit %33
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_in_preheader_sink_to_get_occ_10
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_in_preheader_sink_to_get_occ_10
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    S_NOP 0, implicit %34
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    S_NOP 0
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_NOP 0, implicit %33
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_in_loop_sink_livethru_to_get_occ_10
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_in_loop_sink_livethru_to_get_occ_10
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_NOP 0, implicit %33
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_sink_minimum_preheader_to_get_occ_10
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_sink_minimum_preheader_to_get_occ_10
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    S_NOP 0, implicit %34
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    S_NOP 0, implicit %32, implicit %33
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_sink_minimum_livethru_to_get_occ_10
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_sink_minimum_livethru_to_get_occ_10
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_NOP 0, implicit %32, implicit %33
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_sink_minimum_loop_to_get_occ_10
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_sink_minimum_loop_to_get_occ_10
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %32, implicit %33
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_ENDPGM 0
+...
+
+---
+name:            test_occ_9_no_sink_26vgprs_but_only_one_sinkable
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_no_sink_26vgprs_but_only_one_sinkable
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    S_NOP 0, implicit %34, implicit %35
+    S_NOP 0, implicit %33
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_in_loop_sink_to_get_occ_10
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_in_loop_sink_to_get_occ_10
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %33
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_in_loop_sink_undef_to_get_occ_10
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_in_loop_sink_undef_to_get_occ_10
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   undef %27.sub0:vreg_64 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   %27.sub1:vreg_64 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit %27
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    undef %32.sub0:vreg_64 = V_MOV_B32_e32 22, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %33:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    S_NOP 0, implicit %33, implicit %34
+    %32.sub1:vreg_64 = V_MOV_B32_e32 23, implicit $exec
+    S_NOP 0, implicit %32
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_in_loop_no_sink_undef_multiple_subreg_def_in_preheader
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_in_loop_no_sink_undef_multiple_subreg_def_in_preheader
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   undef %27.sub0:vreg_64 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   %27.sub1:vreg_64 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_NOP 0, implicit %27
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    undef %32.sub0:vreg_64 = V_MOV_B32_e32 22, implicit $exec
+    %32.sub1:vreg_64 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %32
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_in_loop_no_sink_undef_subreg_def_in_another_block
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_in_loop_no_sink_undef_subreg_def_in_another_block
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   undef %27.sub0:vreg_64 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   %27.sub1:vreg_64 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_NOP 0, implicit %27
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    undef %32.sub0:vreg_64 = V_MOV_B32_e32 22, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %32.sub1:vreg_64 = V_MOV_B32_e32 23, implicit $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %32
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_no_sink_multiple_uses
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_no_sink_multiple_uses
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %33
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_NOP 0, implicit %33
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_no_sink_multiple_defs_clobber
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_no_sink_multiple_defs_clobber
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %33
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    %33:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_no_sink_fail_to_increase_occupancy
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_no_sink_fail_to_increase_occupancy
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %33
+    S_NOP 0, implicit %34
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_no_sink_high_rp_outside_loop
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_no_sink_high_rp_outside_loop
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_25]], implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %33
+    S_NOP 0, implicit %34
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    S_NOP 0, implicit %35, implicit %36
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_no_sink_high_rp_before_low_rp_loop
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_no_sink_high_rp_before_low_rp_loop
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.3
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.4(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.6(0x04000000), %bb.5(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.6, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.6:
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34
+
+  bb.1:
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+
+  bb.2:
+    successors: %bb.3, %bb.4
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.4, implicit $exec
+    S_BRANCH %bb.3
+
+  bb.3:
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    S_NOP 0, implicit %36
+    S_NOP 0, implicit %35
+
+
+  bb.4:
+    successors: %bb.5(0x04000000), %bb.6(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+
+  bb.6:
+    S_BRANCH %bb.2
+
+  bb.5:
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_no_sink_high_rp_after_low_rp_loop
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_no_sink_high_rp_after_low_rp_loop
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.3
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.4(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.6(0x04000000), %bb.5(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.6, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.6:
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_10]], implicit [[V_MOV_B32_e32_20]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_11]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+
+  bb.1:
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+
+  bb.2:
+    successors: %bb.3, %bb.4
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.4, implicit $exec
+    S_BRANCH %bb.3
+
+  bb.3:
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    S_NOP 0, implicit %36
+    S_NOP 0, implicit %35
+
+
+  bb.4:
+    successors: %bb.5(0x04000000), %bb.6(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+
+  bb.6:
+    S_BRANCH %bb.2
+
+  bb.5:
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34
+
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_no_sink_high_rp_between_two_low_rp_loops
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_no_sink_high_rp_between_two_low_rp_loops
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.3
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.4(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.6(0x04000000), %bb.5(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.6, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.6:
+  ; GFX908-NEXT:   successors: %bb.7(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_10]], implicit [[V_MOV_B32_e32_20]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_11]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.7:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $sgpr0 = IMPLICIT_DEF
+  ; GFX908-NEXT:   $sgpr1 = IMPLICIT_DEF
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY3]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_1:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM1]].sub0, [[V_MOV_B32_e32_27]], implicit $exec
+  ; GFX908-NEXT:   undef %38.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %38.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM1]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.8:
+  ; GFX908-NEXT:   successors: %bb.9(0x40000000), %bb.10(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_GT_U32_e64_1]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_1]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.10, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.9
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.9:
+  ; GFX908-NEXT:   successors: %bb.10(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_29:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.10:
+  ; GFX908-NEXT:   successors: %bb.12(0x04000000), %bb.11(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
+  ; GFX908-NEXT:   %38.sub0:sreg_64 = S_ADD_I32 %38.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %38.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.12, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.11:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.8
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.12:
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+
+  bb.1:
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+
+  bb.2:
+    successors: %bb.3, %bb.4
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.4, implicit $exec
+    S_BRANCH %bb.3
+
+  bb.3:
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    S_NOP 0, implicit %36
+    S_NOP 0, implicit %35
+
+  bb.4:
+    successors: %bb.5(0x04000000), %bb.6(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+
+  bb.6:
+    S_BRANCH %bb.2
+
+  bb.5:
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34
+
+  bb.7:
+    $sgpr0 = IMPLICIT_DEF
+    $sgpr1 = IMPLICIT_DEF
+    %101:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %102:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %103:sreg_64_xexec = S_LOAD_DWORDX2_IMM %101(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %104:sreg_64 = V_CMP_GT_U32_e64 %103.sub0, %102, implicit $exec
+    undef %105.sub1:sreg_64 = S_MOV_B32 0
+    %105.sub0:sreg_64 = COPY %103.sub1
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+
+  bb.8:
+    successors: %bb.9, %bb.10
+
+    %106:sreg_64 = COPY $exec, implicit-def $exec
+    %107:sreg_64 = S_AND_B64 %106, %104, implicit-def dead $scc
+    $exec = S_MOV_B64_term %107
+    S_CBRANCH_EXECZ %bb.10, implicit $exec
+    S_BRANCH %bb.9
+
+  bb.9:
+    %38:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+    S_NOP 0, implicit %38
+    S_NOP 0, implicit %37
+
+  bb.10:
+    successors: %bb.11(0x04000000), %bb.12(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %106, implicit-def $scc
+    %105.sub0:sreg_64 = S_ADD_I32 %105.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %105.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.11, implicit killed $scc
+
+  bb.12:
+    S_BRANCH %bb.8
+
+  bb.11:
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_two_loops_sink_high_rp_no_sink_low_rp
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_two_loops_sink_high_rp_no_sink_low_rp
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.3
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.4(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.6(0x04000000), %bb.5(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.6, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.6:
+  ; GFX908-NEXT:   successors: %bb.7(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.7:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $sgpr0 = IMPLICIT_DEF
+  ; GFX908-NEXT:   $sgpr1 = IMPLICIT_DEF
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY3]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_1:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM1]].sub0, [[V_MOV_B32_e32_25]], implicit $exec
+  ; GFX908-NEXT:   undef %36.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %36.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM1]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.8:
+  ; GFX908-NEXT:   successors: %bb.9(0x40000000), %bb.10(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_GT_U32_e64_1]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_1]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.10, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.9
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.9:
+  ; GFX908-NEXT:   successors: %bb.10(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.10:
+  ; GFX908-NEXT:   successors: %bb.12(0x04000000), %bb.11(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
+  ; GFX908-NEXT:   %36.sub0:sreg_64 = S_ADD_I32 %36.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %36.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.12, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.11:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.8
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.12:
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+
+  bb.1:
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.2:
+    successors: %bb.3, %bb.4
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.4, implicit $exec
+    S_BRANCH %bb.3
+
+  bb.3:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %33
+
+  bb.4:
+    successors: %bb.5(0x04000000), %bb.6(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+
+  bb.6:
+    S_BRANCH %bb.2
+
+  bb.5:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+
+  bb.7:
+    $sgpr0 = IMPLICIT_DEF
+    $sgpr1 = IMPLICIT_DEF
+    %101:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %102:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %103:sreg_64_xexec = S_LOAD_DWORDX2_IMM %101(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %104:sreg_64 = V_CMP_GT_U32_e64 %103.sub0, %102, implicit $exec
+    undef %105.sub1:sreg_64 = S_MOV_B32 0
+    %105.sub0:sreg_64 = COPY %103.sub1
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+
+  bb.8:
+    successors: %bb.9, %bb.10
+
+    %106:sreg_64 = COPY $exec, implicit-def $exec
+    %107:sreg_64 = S_AND_B64 %106, %104, implicit-def dead $scc
+    $exec = S_MOV_B64_term %107
+    S_CBRANCH_EXECZ %bb.10, implicit $exec
+    S_BRANCH %bb.9
+
+  bb.9:
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    S_NOP 0, implicit %36
+    S_NOP 0, implicit %35
+
+  bb.10:
+    successors: %bb.11(0x04000000), %bb.12(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %106, implicit-def $scc
+    %105.sub0:sreg_64 = S_ADD_I32 %105.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %105.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.11, implicit killed $scc
+
+  bb.12:
+    S_BRANCH %bb.8
+
+  bb.11:
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_two_loops_no_sink_low_rp_sink_high_rp
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_two_loops_no_sink_low_rp_sink_high_rp
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.3
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.4(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.6(0x04000000), %bb.5(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.6, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.6:
+  ; GFX908-NEXT:   successors: %bb.7(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.7:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $sgpr0 = IMPLICIT_DEF
+  ; GFX908-NEXT:   $sgpr1 = IMPLICIT_DEF
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY3]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_1:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM1]].sub0, [[V_MOV_B32_e32_2]], implicit $exec
+  ; GFX908-NEXT:   undef %13.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %13.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM1]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.8:
+  ; GFX908-NEXT:   successors: %bb.9(0x40000000), %bb.10(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_GT_U32_e64_1]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_1]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.10, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.9
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.9:
+  ; GFX908-NEXT:   successors: %bb.10(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.10:
+  ; GFX908-NEXT:   successors: %bb.12(0x04000000), %bb.11(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
+  ; GFX908-NEXT:   %13.sub0:sreg_64 = S_ADD_I32 %13.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %13.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.12, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.11:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.8
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.12:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_10]], implicit [[V_MOV_B32_e32_20]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_11]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_12]], implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]], implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+
+  bb.1:
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.2:
+    successors: %bb.3, %bb.4
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.4, implicit $exec
+    S_BRANCH %bb.3
+
+  bb.3:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %33
+
+  bb.4:
+    successors: %bb.5(0x04000000), %bb.6(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+
+  bb.6:
+    S_BRANCH %bb.2
+
+  bb.5:
+    S_NOP 0
+
+  bb.7:
+    $sgpr0 = IMPLICIT_DEF
+    $sgpr1 = IMPLICIT_DEF
+    %101:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %102:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %103:sreg_64_xexec = S_LOAD_DWORDX2_IMM %101(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %104:sreg_64 = V_CMP_GT_U32_e64 %103.sub0, %102, implicit $exec
+    undef %105.sub1:sreg_64 = S_MOV_B32 0
+    %105.sub0:sreg_64 = COPY %103.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+
+  bb.8:
+    successors: %bb.9, %bb.10
+
+    %106:sreg_64 = COPY $exec, implicit-def $exec
+    %107:sreg_64 = S_AND_B64 %106, %104, implicit-def dead $scc
+    $exec = S_MOV_B64_term %107
+    S_CBRANCH_EXECZ %bb.10, implicit $exec
+    S_BRANCH %bb.9
+
+  bb.9:
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    S_NOP 0, implicit %36
+    S_NOP 0, implicit %35
+
+  bb.10:
+    successors: %bb.11(0x04000000), %bb.12(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %106, implicit-def $scc
+    %105.sub0:sreg_64 = S_ADD_I32 %105.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %105.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.11, implicit killed $scc
+
+  bb.12:
+    S_BRANCH %bb.8
+
+  bb.11:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_two_loops_sink_both
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_two_loops_sink_both
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.3
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.4(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.6(0x04000000), %bb.5(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.6, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.6:
+  ; GFX908-NEXT:   successors: %bb.7(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.7:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $sgpr0 = IMPLICIT_DEF
+  ; GFX908-NEXT:   $sgpr1 = IMPLICIT_DEF
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY3]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_1:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM1]].sub0, [[V_MOV_B32_e32_25]], implicit $exec
+  ; GFX908-NEXT:   undef %36.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %36.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM1]].sub1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.8:
+  ; GFX908-NEXT:   successors: %bb.9(0x40000000), %bb.10(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_GT_U32_e64_1]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_1]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.10, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.9
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.9:
+  ; GFX908-NEXT:   successors: %bb.10(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.10:
+  ; GFX908-NEXT:   successors: %bb.12(0x04000000), %bb.11(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
+  ; GFX908-NEXT:   %36.sub0:sreg_64 = S_ADD_I32 %36.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %36.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.12, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.11:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.8
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.12:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+
+  bb.1:
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.2:
+    successors: %bb.3, %bb.4
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.4, implicit $exec
+    S_BRANCH %bb.3
+
+  bb.3:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %33
+
+  bb.4:
+    successors: %bb.5(0x04000000), %bb.6(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+
+  bb.6:
+    S_BRANCH %bb.2
+
+  bb.5:
+    S_NOP 0
+
+  bb.7:
+    $sgpr0 = IMPLICIT_DEF
+    $sgpr1 = IMPLICIT_DEF
+    %101:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %102:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %103:sreg_64_xexec = S_LOAD_DWORDX2_IMM %101(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %104:sreg_64 = V_CMP_GT_U32_e64 %103.sub0, %102, implicit $exec
+    undef %105.sub1:sreg_64 = S_MOV_B32 0
+    %105.sub0:sreg_64 = COPY %103.sub1
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+
+  bb.8:
+    successors: %bb.9, %bb.10
+
+    %106:sreg_64 = COPY $exec, implicit-def $exec
+    %107:sreg_64 = S_AND_B64 %106, %104, implicit-def dead $scc
+    $exec = S_MOV_B64_term %107
+    S_CBRANCH_EXECZ %bb.10, implicit $exec
+    S_BRANCH %bb.9
+
+  bb.9:
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    S_NOP 0, implicit %36
+    S_NOP 0, implicit %35
+
+  bb.10:
+    successors: %bb.11(0x04000000), %bb.12(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %106, implicit-def $scc
+    %105.sub0:sreg_64 = S_ADD_I32 %105.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %105.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.11, implicit killed $scc
+
+  bb.12:
+    S_BRANCH %bb.8
+
+  bb.11:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_two_loops_sink_two_sinkable_per_loop_sink_only_one
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_two_loops_sink_two_sinkable_per_loop_sink_only_one
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.3
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.4(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.6(0x04000000), %bb.5(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.6, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.6:
+  ; GFX908-NEXT:   successors: %bb.7(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.7:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $sgpr0 = IMPLICIT_DEF
+  ; GFX908-NEXT:   $sgpr1 = IMPLICIT_DEF
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY3]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_1:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM1]].sub0, [[V_MOV_B32_e32_25]], implicit $exec
+  ; GFX908-NEXT:   undef %36.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %36.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM1]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.8:
+  ; GFX908-NEXT:   successors: %bb.9(0x40000000), %bb.10(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_GT_U32_e64_1]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_1]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.10, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.9
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.9:
+  ; GFX908-NEXT:   successors: %bb.10(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]], implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.10:
+  ; GFX908-NEXT:   successors: %bb.12(0x04000000), %bb.11(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
+  ; GFX908-NEXT:   %36.sub0:sreg_64 = S_ADD_I32 %36.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %36.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.12, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.11:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.8
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.12:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+
+  bb.1:
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.2:
+    successors: %bb.3, %bb.4
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.4, implicit $exec
+    S_BRANCH %bb.3
+
+  bb.3:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %32, implicit %33
+
+  bb.4:
+    successors: %bb.5(0x04000000), %bb.6(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+
+  bb.6:
+    S_BRANCH %bb.2
+
+  bb.5:
+    S_NOP 0
+
+  bb.7:
+    $sgpr0 = IMPLICIT_DEF
+    $sgpr1 = IMPLICIT_DEF
+    %101:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %102:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %103:sreg_64_xexec = S_LOAD_DWORDX2_IMM %101(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %104:sreg_64 = V_CMP_GT_U32_e64 %103.sub0, %102, implicit $exec
+    undef %105.sub1:sreg_64 = S_MOV_B32 0
+    %105.sub0:sreg_64 = COPY %103.sub1
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+
+  bb.8:
+    successors: %bb.9, %bb.10
+
+    %106:sreg_64 = COPY $exec, implicit-def $exec
+    %107:sreg_64 = S_AND_B64 %106, %104, implicit-def dead $scc
+    $exec = S_MOV_B64_term %107
+    S_CBRANCH_EXECZ %bb.10, implicit $exec
+    S_BRANCH %bb.9
+
+  bb.9:
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+    S_NOP 0, implicit %37
+    S_NOP 0, implicit %35, implicit %36
+
+  bb.10:
+    successors: %bb.11(0x04000000), %bb.12(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %106, implicit-def $scc
+    %105.sub0:sreg_64 = S_ADD_I32 %105.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %105.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.11, implicit killed $scc
+
+  bb.12:
+    S_BRANCH %bb.8
+
+  bb.11:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_two_loops_no_sink_one_loop_fails
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_two_loops_no_sink_one_loop_fails
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.3
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.4(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.6(0x04000000), %bb.5(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.6, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   successors: %bb.2(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.6:
+  ; GFX908-NEXT:   successors: %bb.7(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_NOP 0
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.7:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $sgpr0 = IMPLICIT_DEF
+  ; GFX908-NEXT:   $sgpr1 = IMPLICIT_DEF
+  ; GFX908-NEXT:   [[COPY3:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM1:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY3]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_1:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM1]].sub0, [[V_MOV_B32_e32_25]], implicit $exec
+  ; GFX908-NEXT:   undef %36.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %36.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM1]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.8:
+  ; GFX908-NEXT:   successors: %bb.9(0x40000000), %bb.10(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_GT_U32_e64_1]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_1]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.10, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.9
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.9:
+  ; GFX908-NEXT:   successors: %bb.10(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_27]], implicit [[V_MOV_B32_e32_28]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.10:
+  ; GFX908-NEXT:   successors: %bb.12(0x04000000), %bb.11(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
+  ; GFX908-NEXT:   %36.sub0:sreg_64 = S_ADD_I32 %36.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %36.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.12, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.11:
+  ; GFX908-NEXT:   successors: %bb.8(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.8
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.12:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+
+  bb.1:
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+  bb.2:
+    successors: %bb.3, %bb.4
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.4, implicit $exec
+    S_BRANCH %bb.3
+
+  bb.3:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %33
+
+  bb.4:
+    successors: %bb.5(0x04000000), %bb.6(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+
+  bb.6:
+    S_BRANCH %bb.2
+
+  bb.5:
+    S_NOP 0
+
+  bb.7:
+    $sgpr0 = IMPLICIT_DEF
+    $sgpr1 = IMPLICIT_DEF
+    %101:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %102:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %103:sreg_64_xexec = S_LOAD_DWORDX2_IMM %101(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %104:sreg_64 = V_CMP_GT_U32_e64 %103.sub0, %102, implicit $exec
+    undef %105.sub1:sreg_64 = S_MOV_B32 0
+    %105.sub0:sreg_64 = COPY %103.sub1
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+
+  bb.8:
+    successors: %bb.9, %bb.10
+
+    %106:sreg_64 = COPY $exec, implicit-def $exec
+    %107:sreg_64 = S_AND_B64 %106, %104, implicit-def dead $scc
+    $exec = S_MOV_B64_term %107
+    S_CBRANCH_EXECZ %bb.10, implicit $exec
+    S_BRANCH %bb.9
+
+  bb.9:
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+    S_NOP 0, implicit %36, implicit %37
+    S_NOP 0, implicit %35
+
+  bb.10:
+    successors: %bb.11(0x04000000), %bb.12(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %106, implicit-def $scc
+    %105.sub0:sreg_64 = S_ADD_I32 %105.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %105.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.11, implicit killed $scc
+
+  bb.12:
+    S_BRANCH %bb.8
+
+  bb.11:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+    S_ENDPGM 0
+...
+
+
+---
+name:            test_occ_8_sink_for_9_occ
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_8_sink_for_9_occ
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %38:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+    S_NOP 0, implicit %38
+    S_NOP 0, implicit %37
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34, implicit %35
+    S_NOP 0, implicit %36
+    S_ENDPGM 0
+...
+---
+name:            test_occ_7_sink_for_8_occ
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_7_sink_for_8_occ
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_29:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_30:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_31:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_31]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_32:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_32]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]], implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]], implicit [[V_MOV_B32_e32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_30]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+    %38:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+    %39:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+    %40:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+    %41:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %42:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+    S_NOP 0, implicit %42
+    S_NOP 0, implicit %41
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34, implicit %35
+    S_NOP 0, implicit %36, implicit %37
+    S_NOP 0, implicit %38, implicit %39
+    S_NOP 0, implicit %40
+    S_ENDPGM 0
+...
+---
+name:            test_occ_6_sink_for_7_occ
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_6_sink_for_7_occ
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_29:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_30:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_31:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_32:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_33:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_34:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_35:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_35]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_36:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_36]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]], implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]], implicit [[V_MOV_B32_e32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_30]], implicit [[V_MOV_B32_e32_31]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_32]], implicit [[V_MOV_B32_e32_33]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_34]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+    %38:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+    %39:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+    %40:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+    %41:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+    %42:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+    %44:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+    %45:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %46:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+    S_NOP 0, implicit %46
+    S_NOP 0, implicit %45
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34, implicit %35
+    S_NOP 0, implicit %36, implicit %37
+    S_NOP 0, implicit %38, implicit %39
+    S_NOP 0, implicit %40, implicit %41
+    S_NOP 0, implicit %42, implicit %43
+    S_NOP 0, implicit %44
+    S_ENDPGM 0
+...
+---
+name:            test_occ_5_sink_for_6_occ
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_5_sink_for_6_occ
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_29:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_30:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_31:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_32:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_33:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_34:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_35:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_36:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_37:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 37, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_38:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 38, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_39:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 40, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_39]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_40:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 39, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_40]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]], implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]], implicit [[V_MOV_B32_e32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_30]], implicit [[V_MOV_B32_e32_31]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_32]], implicit [[V_MOV_B32_e32_33]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_34]], implicit [[V_MOV_B32_e32_35]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_36]], implicit [[V_MOV_B32_e32_37]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_38]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+    %38:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+    %39:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+    %40:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+    %41:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+    %42:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+    %44:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+    %45:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+    %46:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+    %47:vgpr_32 = V_MOV_B32_e32 37, implicit $exec
+    %48:vgpr_32 = V_MOV_B32_e32 38, implicit $exec
+    %49:vgpr_32 = V_MOV_B32_e32 39, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %50:vgpr_32 = V_MOV_B32_e32 40, implicit $exec
+    S_NOP 0, implicit %50
+    S_NOP 0, implicit %49
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34, implicit %35
+    S_NOP 0, implicit %36, implicit %37
+    S_NOP 0, implicit %38, implicit %39
+    S_NOP 0, implicit %40, implicit %41
+    S_NOP 0, implicit %42, implicit %43
+    S_NOP 0, implicit %44, implicit %45
+    S_NOP 0, implicit %46, implicit %47
+    S_NOP 0, implicit %48
+    S_ENDPGM 0
+...
+---
+name:            test_occ_4_sink_for_5_occ
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_4_sink_for_5_occ
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_29:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_30:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_31:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_32:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_33:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_34:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_35:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_36:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_37:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 37, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_38:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 38, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_39:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 39, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_40:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 40, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_41:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 41, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_42:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_43:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 43, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_44:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 44, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_45:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 45, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_46:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 46, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_47:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 48, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_47]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_48:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 47, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_48]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]], implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]], implicit [[V_MOV_B32_e32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_30]], implicit [[V_MOV_B32_e32_31]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_32]], implicit [[V_MOV_B32_e32_33]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_34]], implicit [[V_MOV_B32_e32_35]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_36]], implicit [[V_MOV_B32_e32_37]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_38]], implicit [[V_MOV_B32_e32_39]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_40]], implicit [[V_MOV_B32_e32_41]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_42]], implicit [[V_MOV_B32_e32_43]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_44]], implicit [[V_MOV_B32_e32_45]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_46]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+    %38:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+    %39:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+    %40:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+    %41:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+    %42:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+    %44:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+    %45:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+    %46:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+    %47:vgpr_32 = V_MOV_B32_e32 37, implicit $exec
+    %48:vgpr_32 = V_MOV_B32_e32 38, implicit $exec
+    %49:vgpr_32 = V_MOV_B32_e32 39, implicit $exec
+    %50:vgpr_32 = V_MOV_B32_e32 40, implicit $exec
+    %51:vgpr_32 = V_MOV_B32_e32 41, implicit $exec
+    %52:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
+    %53:vgpr_32 = V_MOV_B32_e32 43, implicit $exec
+    %54:vgpr_32 = V_MOV_B32_e32 44, implicit $exec
+    %55:vgpr_32 = V_MOV_B32_e32 45, implicit $exec
+    %56:vgpr_32 = V_MOV_B32_e32 46, implicit $exec
+    %57:vgpr_32 = V_MOV_B32_e32 47, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %58:vgpr_32 = V_MOV_B32_e32 48, implicit $exec
+    S_NOP 0, implicit %58
+    S_NOP 0, implicit %57
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34, implicit %35
+    S_NOP 0, implicit %36, implicit %37
+    S_NOP 0, implicit %38, implicit %39
+    S_NOP 0, implicit %40, implicit %41
+    S_NOP 0, implicit %42, implicit %43
+    S_NOP 0, implicit %44, implicit %45
+    S_NOP 0, implicit %46, implicit %47
+    S_NOP 0, implicit %48, implicit %49
+    S_NOP 0, implicit %50, implicit %51
+    S_NOP 0, implicit %52, implicit %53
+    S_NOP 0, implicit %54, implicit %55
+    S_NOP 0, implicit %56
+    S_ENDPGM 0
+...
+---
+name:            test_occ_3_sink_for_4_occ
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_3_sink_for_4_occ
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_29:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_30:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_31:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_32:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_33:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_34:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_35:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_36:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_37:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 37, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_38:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 38, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_39:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 39, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_40:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 40, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_41:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 41, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_42:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_43:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 43, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_44:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 44, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_45:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 45, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_46:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 46, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_47:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 47, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_48:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 48, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_49:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 49, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_50:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 50, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_51:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 51, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_52:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 52, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_53:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 53, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_54:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 54, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_55:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 55, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_56:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 56, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_57:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 57, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_58:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 58, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_59:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 59, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_60:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 60, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_61:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 61, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_62:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_63:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 64, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_63]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_64:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_64]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]], implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]], implicit [[V_MOV_B32_e32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_30]], implicit [[V_MOV_B32_e32_31]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_32]], implicit [[V_MOV_B32_e32_33]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_34]], implicit [[V_MOV_B32_e32_35]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_36]], implicit [[V_MOV_B32_e32_37]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_38]], implicit [[V_MOV_B32_e32_39]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_40]], implicit [[V_MOV_B32_e32_41]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_42]], implicit [[V_MOV_B32_e32_43]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_44]], implicit [[V_MOV_B32_e32_45]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_46]], implicit [[V_MOV_B32_e32_47]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_48]], implicit [[V_MOV_B32_e32_49]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_50]], implicit [[V_MOV_B32_e32_51]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_52]], implicit [[V_MOV_B32_e32_53]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_54]], implicit [[V_MOV_B32_e32_55]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_56]], implicit [[V_MOV_B32_e32_57]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_58]], implicit [[V_MOV_B32_e32_59]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_60]], implicit [[V_MOV_B32_e32_61]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_62]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+    %38:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+    %39:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+    %40:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+    %41:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+    %42:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+    %44:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+    %45:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+    %46:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+    %47:vgpr_32 = V_MOV_B32_e32 37, implicit $exec
+    %48:vgpr_32 = V_MOV_B32_e32 38, implicit $exec
+    %49:vgpr_32 = V_MOV_B32_e32 39, implicit $exec
+    %50:vgpr_32 = V_MOV_B32_e32 40, implicit $exec
+    %51:vgpr_32 = V_MOV_B32_e32 41, implicit $exec
+    %52:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
+    %53:vgpr_32 = V_MOV_B32_e32 43, implicit $exec
+    %54:vgpr_32 = V_MOV_B32_e32 44, implicit $exec
+    %55:vgpr_32 = V_MOV_B32_e32 45, implicit $exec
+    %56:vgpr_32 = V_MOV_B32_e32 46, implicit $exec
+    %57:vgpr_32 = V_MOV_B32_e32 47, implicit $exec
+    %58:vgpr_32 = V_MOV_B32_e32 48, implicit $exec
+    %59:vgpr_32 = V_MOV_B32_e32 49, implicit $exec
+    %60:vgpr_32 = V_MOV_B32_e32 50, implicit $exec
+    %61:vgpr_32 = V_MOV_B32_e32 51, implicit $exec
+    %62:vgpr_32 = V_MOV_B32_e32 52, implicit $exec
+    %63:vgpr_32 = V_MOV_B32_e32 53, implicit $exec
+    %64:vgpr_32 = V_MOV_B32_e32 54, implicit $exec
+    %65:vgpr_32 = V_MOV_B32_e32 55, implicit $exec
+    %66:vgpr_32 = V_MOV_B32_e32 56, implicit $exec
+    %67:vgpr_32 = V_MOV_B32_e32 57, implicit $exec
+    %68:vgpr_32 = V_MOV_B32_e32 58, implicit $exec
+    %69:vgpr_32 = V_MOV_B32_e32 59, implicit $exec
+    %70:vgpr_32 = V_MOV_B32_e32 60, implicit $exec
+    %71:vgpr_32 = V_MOV_B32_e32 61, implicit $exec
+    %72:vgpr_32 = V_MOV_B32_e32 62, implicit $exec
+    %73:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %74:vgpr_32 = V_MOV_B32_e32 64, implicit $exec
+    S_NOP 0, implicit %74
+    S_NOP 0, implicit %73
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34, implicit %35
+    S_NOP 0, implicit %36, implicit %37
+    S_NOP 0, implicit %38, implicit %39
+    S_NOP 0, implicit %40, implicit %41
+    S_NOP 0, implicit %42, implicit %43
+    S_NOP 0, implicit %44, implicit %45
+    S_NOP 0, implicit %46, implicit %47
+    S_NOP 0, implicit %48, implicit %49
+    S_NOP 0, implicit %50, implicit %51
+    S_NOP 0, implicit %52, implicit %53
+    S_NOP 0, implicit %54, implicit %55
+    S_NOP 0, implicit %56, implicit %57
+    S_NOP 0, implicit %58, implicit %59
+    S_NOP 0, implicit %60, implicit %61
+    S_NOP 0, implicit %62, implicit %63
+    S_NOP 0, implicit %64, implicit %65
+    S_NOP 0, implicit %66, implicit %67
+    S_NOP 0, implicit %68, implicit %69
+    S_NOP 0, implicit %70, implicit %71
+    S_NOP 0, implicit %72
+    S_ENDPGM 0
+...
+---
+name:            test_occ_2_sink_for_3_occ
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_2_sink_for_3_occ
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_29:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_30:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_31:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_32:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_33:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_34:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_35:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_36:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_37:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 37, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_38:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 38, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_39:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 39, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_40:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 40, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_41:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 41, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_42:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_43:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 43, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_44:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 44, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_45:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 45, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_46:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 46, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_47:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 47, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_48:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 48, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_49:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 49, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_50:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 50, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_51:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 51, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_52:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 52, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_53:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 53, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_54:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 54, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_55:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 55, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_56:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 56, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_57:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 57, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_58:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 58, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_59:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 59, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_60:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 60, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_61:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 61, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_62:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_63:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_64:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 64, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_65:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 65, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_66:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 66, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_67:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 67, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_68:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 68, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_69:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 69, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_70:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 70, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_71:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 71, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_72:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 72, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_73:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 73, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_74:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 74, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_75:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 75, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_76:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 76, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_77:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 77, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_78:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 78, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_79:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 79, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_80:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 80, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_81:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 81, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_82:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 82, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_83:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 84, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_83]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_84:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 83, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_84]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]], implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]], implicit [[V_MOV_B32_e32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_30]], implicit [[V_MOV_B32_e32_31]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_32]], implicit [[V_MOV_B32_e32_33]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_34]], implicit [[V_MOV_B32_e32_35]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_36]], implicit [[V_MOV_B32_e32_37]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_38]], implicit [[V_MOV_B32_e32_39]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_40]], implicit [[V_MOV_B32_e32_41]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_42]], implicit [[V_MOV_B32_e32_43]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_44]], implicit [[V_MOV_B32_e32_45]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_46]], implicit [[V_MOV_B32_e32_47]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_48]], implicit [[V_MOV_B32_e32_49]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_50]], implicit [[V_MOV_B32_e32_51]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_52]], implicit [[V_MOV_B32_e32_53]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_54]], implicit [[V_MOV_B32_e32_55]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_56]], implicit [[V_MOV_B32_e32_57]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_58]], implicit [[V_MOV_B32_e32_59]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_60]], implicit [[V_MOV_B32_e32_61]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_62]], implicit [[V_MOV_B32_e32_63]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_64]], implicit [[V_MOV_B32_e32_65]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_66]], implicit [[V_MOV_B32_e32_67]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_68]], implicit [[V_MOV_B32_e32_69]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_70]], implicit [[V_MOV_B32_e32_71]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_72]], implicit [[V_MOV_B32_e32_73]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_74]], implicit [[V_MOV_B32_e32_75]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_76]], implicit [[V_MOV_B32_e32_77]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_78]], implicit [[V_MOV_B32_e32_79]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_80]], implicit [[V_MOV_B32_e32_81]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_82]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+    %38:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+    %39:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+    %40:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+    %41:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+    %42:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+    %44:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+    %45:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+    %46:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+    %47:vgpr_32 = V_MOV_B32_e32 37, implicit $exec
+    %48:vgpr_32 = V_MOV_B32_e32 38, implicit $exec
+    %49:vgpr_32 = V_MOV_B32_e32 39, implicit $exec
+    %50:vgpr_32 = V_MOV_B32_e32 40, implicit $exec
+    %51:vgpr_32 = V_MOV_B32_e32 41, implicit $exec
+    %52:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
+    %53:vgpr_32 = V_MOV_B32_e32 43, implicit $exec
+    %54:vgpr_32 = V_MOV_B32_e32 44, implicit $exec
+    %55:vgpr_32 = V_MOV_B32_e32 45, implicit $exec
+    %56:vgpr_32 = V_MOV_B32_e32 46, implicit $exec
+    %57:vgpr_32 = V_MOV_B32_e32 47, implicit $exec
+    %58:vgpr_32 = V_MOV_B32_e32 48, implicit $exec
+    %59:vgpr_32 = V_MOV_B32_e32 49, implicit $exec
+    %60:vgpr_32 = V_MOV_B32_e32 50, implicit $exec
+    %61:vgpr_32 = V_MOV_B32_e32 51, implicit $exec
+    %62:vgpr_32 = V_MOV_B32_e32 52, implicit $exec
+    %63:vgpr_32 = V_MOV_B32_e32 53, implicit $exec
+    %64:vgpr_32 = V_MOV_B32_e32 54, implicit $exec
+    %65:vgpr_32 = V_MOV_B32_e32 55, implicit $exec
+    %66:vgpr_32 = V_MOV_B32_e32 56, implicit $exec
+    %67:vgpr_32 = V_MOV_B32_e32 57, implicit $exec
+    %68:vgpr_32 = V_MOV_B32_e32 58, implicit $exec
+    %69:vgpr_32 = V_MOV_B32_e32 59, implicit $exec
+    %70:vgpr_32 = V_MOV_B32_e32 60, implicit $exec
+    %71:vgpr_32 = V_MOV_B32_e32 61, implicit $exec
+    %72:vgpr_32 = V_MOV_B32_e32 62, implicit $exec
+    %73:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+    %74:vgpr_32 = V_MOV_B32_e32 64, implicit $exec
+    %75:vgpr_32 = V_MOV_B32_e32 65, implicit $exec
+    %76:vgpr_32 = V_MOV_B32_e32 66, implicit $exec
+    %77:vgpr_32 = V_MOV_B32_e32 67, implicit $exec
+    %78:vgpr_32 = V_MOV_B32_e32 68, implicit $exec
+    %79:vgpr_32 = V_MOV_B32_e32 69, implicit $exec
+    %80:vgpr_32 = V_MOV_B32_e32 70, implicit $exec
+    %81:vgpr_32 = V_MOV_B32_e32 71, implicit $exec
+    %82:vgpr_32 = V_MOV_B32_e32 72, implicit $exec
+    %83:vgpr_32 = V_MOV_B32_e32 73, implicit $exec
+    %84:vgpr_32 = V_MOV_B32_e32 74, implicit $exec
+    %85:vgpr_32 = V_MOV_B32_e32 75, implicit $exec
+    %86:vgpr_32 = V_MOV_B32_e32 76, implicit $exec
+    %87:vgpr_32 = V_MOV_B32_e32 77, implicit $exec
+    %88:vgpr_32 = V_MOV_B32_e32 78, implicit $exec
+    %89:vgpr_32 = V_MOV_B32_e32 79, implicit $exec
+    %90:vgpr_32 = V_MOV_B32_e32 80, implicit $exec
+    %91:vgpr_32 = V_MOV_B32_e32 81, implicit $exec
+    %92:vgpr_32 = V_MOV_B32_e32 82, implicit $exec
+    %93:vgpr_32 = V_MOV_B32_e32 83, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %94:vgpr_32 = V_MOV_B32_e32 84, implicit $exec
+    S_NOP 0, implicit %94
+    S_NOP 0, implicit %93
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34, implicit %35
+    S_NOP 0, implicit %36, implicit %37
+    S_NOP 0, implicit %38, implicit %39
+    S_NOP 0, implicit %40, implicit %41
+    S_NOP 0, implicit %42, implicit %43
+    S_NOP 0, implicit %44, implicit %45
+    S_NOP 0, implicit %46, implicit %47
+    S_NOP 0, implicit %48, implicit %49
+    S_NOP 0, implicit %50, implicit %51
+    S_NOP 0, implicit %52, implicit %53
+    S_NOP 0, implicit %54, implicit %55
+    S_NOP 0, implicit %56, implicit %57
+    S_NOP 0, implicit %58, implicit %59
+    S_NOP 0, implicit %60, implicit %61
+    S_NOP 0, implicit %62, implicit %63
+    S_NOP 0, implicit %64, implicit %65
+    S_NOP 0, implicit %66, implicit %67
+    S_NOP 0, implicit %68, implicit %69
+    S_NOP 0, implicit %70, implicit %71
+    S_NOP 0, implicit %72, implicit %73
+    S_NOP 0, implicit %74, implicit %75
+    S_NOP 0, implicit %76, implicit %77
+    S_NOP 0, implicit %78, implicit %79
+    S_NOP 0, implicit %80, implicit %81
+    S_NOP 0, implicit %82, implicit %83
+    S_NOP 0, implicit %84, implicit %85
+    S_NOP 0, implicit %86, implicit %87
+    S_NOP 0, implicit %88, implicit %89
+    S_NOP 0, implicit %90, implicit %91
+    S_NOP 0, implicit %92
+    S_ENDPGM 0
+...
+---
+name:            test_occ_1_sink_for_2_occ
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_1_sink_for_2_occ
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_29:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_30:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_31:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_32:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_33:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_34:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_35:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_36:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_37:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 37, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_38:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 38, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_39:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 39, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_40:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 40, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_41:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 41, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_42:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_43:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 43, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_44:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 44, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_45:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 45, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_46:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 46, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_47:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 47, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_48:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 48, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_49:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 49, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_50:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 50, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_51:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 51, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_52:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 52, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_53:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 53, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_54:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 54, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_55:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 55, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_56:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 56, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_57:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 57, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_58:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 58, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_59:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 59, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_60:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 60, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_61:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 61, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_62:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_63:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_64:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 64, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_65:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 65, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_66:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 66, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_67:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 67, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_68:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 68, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_69:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 69, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_70:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 70, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_71:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 71, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_72:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 72, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_73:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 73, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_74:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 74, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_75:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 75, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_76:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 76, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_77:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 77, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_78:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 78, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_79:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 79, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_80:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 80, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_81:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 81, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_82:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 82, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_83:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 83, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_84:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 84, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_85:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 85, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_86:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 86, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_87:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 87, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_88:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 88, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_89:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 89, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_90:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 90, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_91:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 91, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_92:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 92, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_93:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 93, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_94:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 94, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_95:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 95, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_96:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 96, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_97:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 97, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_98:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 98, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_99:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 99, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_100:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 100, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_101:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 101, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_102:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 102, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_103:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 103, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_104:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 104, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_105:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 105, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_106:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 106, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_107:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 107, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_108:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 108, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_109:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 109, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_110:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 110, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_111:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 111, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_112:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 112, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_113:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 113, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_114:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 114, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_115:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 115, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_116:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 116, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_117:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 117, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_118:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 118, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_119:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 119, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_120:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 120, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_121:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 121, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_122:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 122, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_123:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 123, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_124:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 124, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_125:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 125, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_126:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 126, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_127:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 128, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_127]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_128:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 127, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_128]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]], implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]], implicit [[V_MOV_B32_e32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_30]], implicit [[V_MOV_B32_e32_31]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_32]], implicit [[V_MOV_B32_e32_33]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_34]], implicit [[V_MOV_B32_e32_35]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_36]], implicit [[V_MOV_B32_e32_37]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_38]], implicit [[V_MOV_B32_e32_39]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_40]], implicit [[V_MOV_B32_e32_41]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_42]], implicit [[V_MOV_B32_e32_43]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_44]], implicit [[V_MOV_B32_e32_45]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_46]], implicit [[V_MOV_B32_e32_47]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_48]], implicit [[V_MOV_B32_e32_49]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_50]], implicit [[V_MOV_B32_e32_51]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_52]], implicit [[V_MOV_B32_e32_53]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_54]], implicit [[V_MOV_B32_e32_55]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_56]], implicit [[V_MOV_B32_e32_57]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_58]], implicit [[V_MOV_B32_e32_59]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_60]], implicit [[V_MOV_B32_e32_61]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_62]], implicit [[V_MOV_B32_e32_63]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_64]], implicit [[V_MOV_B32_e32_65]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_66]], implicit [[V_MOV_B32_e32_67]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_68]], implicit [[V_MOV_B32_e32_69]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_70]], implicit [[V_MOV_B32_e32_71]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_72]], implicit [[V_MOV_B32_e32_73]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_74]], implicit [[V_MOV_B32_e32_75]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_76]], implicit [[V_MOV_B32_e32_77]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_78]], implicit [[V_MOV_B32_e32_79]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_80]], implicit [[V_MOV_B32_e32_81]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_82]], implicit [[V_MOV_B32_e32_83]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_84]], implicit [[V_MOV_B32_e32_85]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_86]], implicit [[V_MOV_B32_e32_87]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_88]], implicit [[V_MOV_B32_e32_89]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_90]], implicit [[V_MOV_B32_e32_91]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_92]], implicit [[V_MOV_B32_e32_93]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_94]], implicit [[V_MOV_B32_e32_95]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_96]], implicit [[V_MOV_B32_e32_97]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_98]], implicit [[V_MOV_B32_e32_99]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_100]], implicit [[V_MOV_B32_e32_101]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_102]], implicit [[V_MOV_B32_e32_103]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_104]], implicit [[V_MOV_B32_e32_105]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_106]], implicit [[V_MOV_B32_e32_107]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_108]], implicit [[V_MOV_B32_e32_109]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_110]], implicit [[V_MOV_B32_e32_111]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_112]], implicit [[V_MOV_B32_e32_113]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_114]], implicit [[V_MOV_B32_e32_115]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_116]], implicit [[V_MOV_B32_e32_117]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_118]], implicit [[V_MOV_B32_e32_119]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_120]], implicit [[V_MOV_B32_e32_121]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_122]], implicit [[V_MOV_B32_e32_123]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_124]], implicit [[V_MOV_B32_e32_125]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_126]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+    %38:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+    %39:vgpr_32 = V_MOV_B32_e32 29, implicit $exec
+    %40:vgpr_32 = V_MOV_B32_e32 30, implicit $exec
+    %41:vgpr_32 = V_MOV_B32_e32 31, implicit $exec
+    %42:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
+    %43:vgpr_32 = V_MOV_B32_e32 33, implicit $exec
+    %44:vgpr_32 = V_MOV_B32_e32 34, implicit $exec
+    %45:vgpr_32 = V_MOV_B32_e32 35, implicit $exec
+    %46:vgpr_32 = V_MOV_B32_e32 36, implicit $exec
+    %47:vgpr_32 = V_MOV_B32_e32 37, implicit $exec
+    %48:vgpr_32 = V_MOV_B32_e32 38, implicit $exec
+    %49:vgpr_32 = V_MOV_B32_e32 39, implicit $exec
+    %50:vgpr_32 = V_MOV_B32_e32 40, implicit $exec
+    %51:vgpr_32 = V_MOV_B32_e32 41, implicit $exec
+    %52:vgpr_32 = V_MOV_B32_e32 42, implicit $exec
+    %53:vgpr_32 = V_MOV_B32_e32 43, implicit $exec
+    %54:vgpr_32 = V_MOV_B32_e32 44, implicit $exec
+    %55:vgpr_32 = V_MOV_B32_e32 45, implicit $exec
+    %56:vgpr_32 = V_MOV_B32_e32 46, implicit $exec
+    %57:vgpr_32 = V_MOV_B32_e32 47, implicit $exec
+    %58:vgpr_32 = V_MOV_B32_e32 48, implicit $exec
+    %59:vgpr_32 = V_MOV_B32_e32 49, implicit $exec
+    %60:vgpr_32 = V_MOV_B32_e32 50, implicit $exec
+    %61:vgpr_32 = V_MOV_B32_e32 51, implicit $exec
+    %62:vgpr_32 = V_MOV_B32_e32 52, implicit $exec
+    %63:vgpr_32 = V_MOV_B32_e32 53, implicit $exec
+    %64:vgpr_32 = V_MOV_B32_e32 54, implicit $exec
+    %65:vgpr_32 = V_MOV_B32_e32 55, implicit $exec
+    %66:vgpr_32 = V_MOV_B32_e32 56, implicit $exec
+    %67:vgpr_32 = V_MOV_B32_e32 57, implicit $exec
+    %68:vgpr_32 = V_MOV_B32_e32 58, implicit $exec
+    %69:vgpr_32 = V_MOV_B32_e32 59, implicit $exec
+    %70:vgpr_32 = V_MOV_B32_e32 60, implicit $exec
+    %71:vgpr_32 = V_MOV_B32_e32 61, implicit $exec
+    %72:vgpr_32 = V_MOV_B32_e32 62, implicit $exec
+    %73:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+    %74:vgpr_32 = V_MOV_B32_e32 64, implicit $exec
+    %75:vgpr_32 = V_MOV_B32_e32 65, implicit $exec
+    %76:vgpr_32 = V_MOV_B32_e32 66, implicit $exec
+    %77:vgpr_32 = V_MOV_B32_e32 67, implicit $exec
+    %78:vgpr_32 = V_MOV_B32_e32 68, implicit $exec
+    %79:vgpr_32 = V_MOV_B32_e32 69, implicit $exec
+    %80:vgpr_32 = V_MOV_B32_e32 70, implicit $exec
+    %81:vgpr_32 = V_MOV_B32_e32 71, implicit $exec
+    %82:vgpr_32 = V_MOV_B32_e32 72, implicit $exec
+    %83:vgpr_32 = V_MOV_B32_e32 73, implicit $exec
+    %84:vgpr_32 = V_MOV_B32_e32 74, implicit $exec
+    %85:vgpr_32 = V_MOV_B32_e32 75, implicit $exec
+    %86:vgpr_32 = V_MOV_B32_e32 76, implicit $exec
+    %87:vgpr_32 = V_MOV_B32_e32 77, implicit $exec
+    %88:vgpr_32 = V_MOV_B32_e32 78, implicit $exec
+    %89:vgpr_32 = V_MOV_B32_e32 79, implicit $exec
+    %90:vgpr_32 = V_MOV_B32_e32 80, implicit $exec
+    %91:vgpr_32 = V_MOV_B32_e32 81, implicit $exec
+    %92:vgpr_32 = V_MOV_B32_e32 82, implicit $exec
+    %93:vgpr_32 = V_MOV_B32_e32 83, implicit $exec
+    %94:vgpr_32 = V_MOV_B32_e32 84, implicit $exec
+    %95:vgpr_32 = V_MOV_B32_e32 85, implicit $exec
+    %96:vgpr_32 = V_MOV_B32_e32 86, implicit $exec
+    %97:vgpr_32 = V_MOV_B32_e32 87, implicit $exec
+    %98:vgpr_32 = V_MOV_B32_e32 88, implicit $exec
+    %99:vgpr_32 = V_MOV_B32_e32 89, implicit $exec
+    %100:vgpr_32 = V_MOV_B32_e32 90, implicit $exec
+    %101:vgpr_32 = V_MOV_B32_e32 91, implicit $exec
+    %102:vgpr_32 = V_MOV_B32_e32 92, implicit $exec
+    %103:vgpr_32 = V_MOV_B32_e32 93, implicit $exec
+    %104:vgpr_32 = V_MOV_B32_e32 94, implicit $exec
+    %105:vgpr_32 = V_MOV_B32_e32 95, implicit $exec
+    %106:vgpr_32 = V_MOV_B32_e32 96, implicit $exec
+    %107:vgpr_32 = V_MOV_B32_e32 97, implicit $exec
+    %108:vgpr_32 = V_MOV_B32_e32 98, implicit $exec
+    %109:vgpr_32 = V_MOV_B32_e32 99, implicit $exec
+    %110:vgpr_32 = V_MOV_B32_e32 100, implicit $exec
+    %111:vgpr_32 = V_MOV_B32_e32 101, implicit $exec
+    %112:vgpr_32 = V_MOV_B32_e32 102, implicit $exec
+    %113:vgpr_32 = V_MOV_B32_e32 103, implicit $exec
+    %114:vgpr_32 = V_MOV_B32_e32 104, implicit $exec
+    %115:vgpr_32 = V_MOV_B32_e32 105, implicit $exec
+    %116:vgpr_32 = V_MOV_B32_e32 106, implicit $exec
+    %117:vgpr_32 = V_MOV_B32_e32 107, implicit $exec
+    %118:vgpr_32 = V_MOV_B32_e32 108, implicit $exec
+    %119:vgpr_32 = V_MOV_B32_e32 109, implicit $exec
+    %120:vgpr_32 = V_MOV_B32_e32 110, implicit $exec
+    %121:vgpr_32 = V_MOV_B32_e32 111, implicit $exec
+    %122:vgpr_32 = V_MOV_B32_e32 112, implicit $exec
+    %123:vgpr_32 = V_MOV_B32_e32 113, implicit $exec
+    %124:vgpr_32 = V_MOV_B32_e32 114, implicit $exec
+    %125:vgpr_32 = V_MOV_B32_e32 115, implicit $exec
+    %126:vgpr_32 = V_MOV_B32_e32 116, implicit $exec
+    %127:vgpr_32 = V_MOV_B32_e32 117, implicit $exec
+    %128:vgpr_32 = V_MOV_B32_e32 118, implicit $exec
+    %129:vgpr_32 = V_MOV_B32_e32 119, implicit $exec
+    %130:vgpr_32 = V_MOV_B32_e32 120, implicit $exec
+    %131:vgpr_32 = V_MOV_B32_e32 121, implicit $exec
+    %132:vgpr_32 = V_MOV_B32_e32 122, implicit $exec
+    %133:vgpr_32 = V_MOV_B32_e32 123, implicit $exec
+    %134:vgpr_32 = V_MOV_B32_e32 124, implicit $exec
+    %135:vgpr_32 = V_MOV_B32_e32 125, implicit $exec
+    %136:vgpr_32 = V_MOV_B32_e32 126, implicit $exec
+    %137:vgpr_32 = V_MOV_B32_e32 127, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %138:vgpr_32 = V_MOV_B32_e32 128, implicit $exec
+    S_NOP 0, implicit %138
+    S_NOP 0, implicit %137
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34, implicit %35
+    S_NOP 0, implicit %36, implicit %37
+    S_NOP 0, implicit %38, implicit %39
+    S_NOP 0, implicit %40, implicit %41
+    S_NOP 0, implicit %42, implicit %43
+    S_NOP 0, implicit %44, implicit %45
+    S_NOP 0, implicit %46, implicit %47
+    S_NOP 0, implicit %48, implicit %49
+    S_NOP 0, implicit %50, implicit %51
+    S_NOP 0, implicit %52, implicit %53
+    S_NOP 0, implicit %54, implicit %55
+    S_NOP 0, implicit %56, implicit %57
+    S_NOP 0, implicit %58, implicit %59
+    S_NOP 0, implicit %60, implicit %61
+    S_NOP 0, implicit %62, implicit %63
+    S_NOP 0, implicit %64, implicit %65
+    S_NOP 0, implicit %66, implicit %67
+    S_NOP 0, implicit %68, implicit %69
+    S_NOP 0, implicit %70, implicit %71
+    S_NOP 0, implicit %72, implicit %73
+    S_NOP 0, implicit %74, implicit %75
+    S_NOP 0, implicit %76, implicit %77
+    S_NOP 0, implicit %78, implicit %79
+    S_NOP 0, implicit %80, implicit %81
+    S_NOP 0, implicit %82, implicit %83
+    S_NOP 0, implicit %84, implicit %85
+    S_NOP 0, implicit %86, implicit %87
+    S_NOP 0, implicit %88, implicit %89
+    S_NOP 0, implicit %90, implicit %91
+    S_NOP 0, implicit %92, implicit %93
+    S_NOP 0, implicit %94, implicit %95
+    S_NOP 0, implicit %96, implicit %97
+    S_NOP 0, implicit %98, implicit %99
+    S_NOP 0, implicit %100, implicit %101
+    S_NOP 0, implicit %102, implicit %103
+    S_NOP 0, implicit %104, implicit %105
+    S_NOP 0, implicit %106, implicit %107
+    S_NOP 0, implicit %108, implicit %109
+    S_NOP 0, implicit %110, implicit %111
+    S_NOP 0, implicit %112, implicit %113
+    S_NOP 0, implicit %114, implicit %115
+    S_NOP 0, implicit %116, implicit %117
+    S_NOP 0, implicit %118, implicit %119
+    S_NOP 0, implicit %120, implicit %121
+    S_NOP 0, implicit %122, implicit %123
+    S_NOP 0, implicit %124, implicit %125
+    S_NOP 0, implicit %126, implicit %127
+    S_NOP 0, implicit %128, implicit %129
+    S_NOP 0, implicit %130, implicit %131
+    S_NOP 0, implicit %132, implicit %133
+    S_NOP 0, implicit %134, implicit %135
+    S_NOP 0, implicit %136
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_no_sink_limited_by_sgprs
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_no_sink_limited_by_sgprs
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0
+  ; GFX908-NEXT:   [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 1
+  ; GFX908-NEXT:   [[S_MOV_B32_2:%[0-9]+]]:sgpr_32 = S_MOV_B32 2
+  ; GFX908-NEXT:   [[S_MOV_B32_3:%[0-9]+]]:sgpr_32 = S_MOV_B32 3
+  ; GFX908-NEXT:   [[S_MOV_B32_4:%[0-9]+]]:sgpr_32 = S_MOV_B32 4
+  ; GFX908-NEXT:   [[S_MOV_B32_5:%[0-9]+]]:sgpr_32 = S_MOV_B32 5
+  ; GFX908-NEXT:   [[S_MOV_B32_6:%[0-9]+]]:sgpr_32 = S_MOV_B32 6
+  ; GFX908-NEXT:   [[S_MOV_B32_7:%[0-9]+]]:sgpr_32 = S_MOV_B32 7
+  ; GFX908-NEXT:   [[S_MOV_B32_8:%[0-9]+]]:sgpr_32 = S_MOV_B32 8
+  ; GFX908-NEXT:   [[S_MOV_B32_9:%[0-9]+]]:sgpr_32 = S_MOV_B32 9
+  ; GFX908-NEXT:   [[S_MOV_B32_10:%[0-9]+]]:sgpr_32 = S_MOV_B32 10
+  ; GFX908-NEXT:   [[S_MOV_B32_11:%[0-9]+]]:sgpr_32 = S_MOV_B32 11
+  ; GFX908-NEXT:   [[S_MOV_B32_12:%[0-9]+]]:sgpr_32 = S_MOV_B32 12
+  ; GFX908-NEXT:   [[S_MOV_B32_13:%[0-9]+]]:sgpr_32 = S_MOV_B32 13
+  ; GFX908-NEXT:   [[S_MOV_B32_14:%[0-9]+]]:sgpr_32 = S_MOV_B32 14
+  ; GFX908-NEXT:   [[S_MOV_B32_15:%[0-9]+]]:sgpr_32 = S_MOV_B32 15
+  ; GFX908-NEXT:   [[S_MOV_B32_16:%[0-9]+]]:sgpr_32 = S_MOV_B32 16
+  ; GFX908-NEXT:   [[S_MOV_B32_17:%[0-9]+]]:sgpr_32 = S_MOV_B32 17
+  ; GFX908-NEXT:   [[S_MOV_B32_18:%[0-9]+]]:sgpr_32 = S_MOV_B32 18
+  ; GFX908-NEXT:   [[S_MOV_B32_19:%[0-9]+]]:sgpr_32 = S_MOV_B32 19
+  ; GFX908-NEXT:   [[S_MOV_B32_20:%[0-9]+]]:sgpr_32 = S_MOV_B32 20
+  ; GFX908-NEXT:   [[S_MOV_B32_21:%[0-9]+]]:sgpr_32 = S_MOV_B32 21
+  ; GFX908-NEXT:   [[S_MOV_B32_22:%[0-9]+]]:sgpr_32 = S_MOV_B32 22
+  ; GFX908-NEXT:   [[S_MOV_B32_23:%[0-9]+]]:sgpr_32 = S_MOV_B32 23
+  ; GFX908-NEXT:   [[S_MOV_B32_24:%[0-9]+]]:sgpr_32 = S_MOV_B32 24
+  ; GFX908-NEXT:   [[S_MOV_B32_25:%[0-9]+]]:sgpr_32 = S_MOV_B32 25
+  ; GFX908-NEXT:   [[S_MOV_B32_26:%[0-9]+]]:sgpr_32 = S_MOV_B32 26
+  ; GFX908-NEXT:   [[S_MOV_B32_27:%[0-9]+]]:sgpr_32 = S_MOV_B32 27
+  ; GFX908-NEXT:   [[S_MOV_B32_28:%[0-9]+]]:sgpr_32 = S_MOV_B32 28
+  ; GFX908-NEXT:   [[S_MOV_B32_29:%[0-9]+]]:sgpr_32 = S_MOV_B32 29
+  ; GFX908-NEXT:   [[S_MOV_B32_30:%[0-9]+]]:sgpr_32 = S_MOV_B32 30
+  ; GFX908-NEXT:   [[S_MOV_B32_31:%[0-9]+]]:sgpr_32 = S_MOV_B32 31
+  ; GFX908-NEXT:   [[S_MOV_B32_32:%[0-9]+]]:sgpr_32 = S_MOV_B32 32
+  ; GFX908-NEXT:   [[S_MOV_B32_33:%[0-9]+]]:sgpr_32 = S_MOV_B32 33
+  ; GFX908-NEXT:   [[S_MOV_B32_34:%[0-9]+]]:sgpr_32 = S_MOV_B32 34
+  ; GFX908-NEXT:   [[S_MOV_B32_35:%[0-9]+]]:sgpr_32 = S_MOV_B32 35
+  ; GFX908-NEXT:   [[S_MOV_B32_36:%[0-9]+]]:sgpr_32 = S_MOV_B32 36
+  ; GFX908-NEXT:   [[S_MOV_B32_37:%[0-9]+]]:sgpr_32 = S_MOV_B32 37
+  ; GFX908-NEXT:   [[S_MOV_B32_38:%[0-9]+]]:sgpr_32 = S_MOV_B32 38
+  ; GFX908-NEXT:   [[S_MOV_B32_39:%[0-9]+]]:sgpr_32 = S_MOV_B32 39
+  ; GFX908-NEXT:   [[S_MOV_B32_40:%[0-9]+]]:sgpr_32 = S_MOV_B32 40
+  ; GFX908-NEXT:   [[S_MOV_B32_41:%[0-9]+]]:sgpr_32 = S_MOV_B32 41
+  ; GFX908-NEXT:   [[S_MOV_B32_42:%[0-9]+]]:sgpr_32 = S_MOV_B32 42
+  ; GFX908-NEXT:   [[S_MOV_B32_43:%[0-9]+]]:sgpr_32 = S_MOV_B32 43
+  ; GFX908-NEXT:   [[S_MOV_B32_44:%[0-9]+]]:sgpr_32 = S_MOV_B32 44
+  ; GFX908-NEXT:   [[S_MOV_B32_45:%[0-9]+]]:sgpr_32 = S_MOV_B32 45
+  ; GFX908-NEXT:   [[S_MOV_B32_46:%[0-9]+]]:sgpr_32 = S_MOV_B32 46
+  ; GFX908-NEXT:   [[S_MOV_B32_47:%[0-9]+]]:sgpr_32 = S_MOV_B32 47
+  ; GFX908-NEXT:   [[S_MOV_B32_48:%[0-9]+]]:sgpr_32 = S_MOV_B32 48
+  ; GFX908-NEXT:   [[S_MOV_B32_49:%[0-9]+]]:sgpr_32 = S_MOV_B32 49
+  ; GFX908-NEXT:   [[S_MOV_B32_50:%[0-9]+]]:sgpr_32 = S_MOV_B32 50
+  ; GFX908-NEXT:   [[S_MOV_B32_51:%[0-9]+]]:sgpr_32 = S_MOV_B32 51
+  ; GFX908-NEXT:   [[S_MOV_B32_52:%[0-9]+]]:sgpr_32 = S_MOV_B32 52
+  ; GFX908-NEXT:   [[S_MOV_B32_53:%[0-9]+]]:sgpr_32 = S_MOV_B32 53
+  ; GFX908-NEXT:   [[S_MOV_B32_54:%[0-9]+]]:sgpr_32 = S_MOV_B32 54
+  ; GFX908-NEXT:   [[S_MOV_B32_55:%[0-9]+]]:sgpr_32 = S_MOV_B32 55
+  ; GFX908-NEXT:   [[S_MOV_B32_56:%[0-9]+]]:sgpr_32 = S_MOV_B32 56
+  ; GFX908-NEXT:   [[S_MOV_B32_57:%[0-9]+]]:sgpr_32 = S_MOV_B32 57
+  ; GFX908-NEXT:   [[S_MOV_B32_58:%[0-9]+]]:sgpr_32 = S_MOV_B32 58
+  ; GFX908-NEXT:   [[S_MOV_B32_59:%[0-9]+]]:sgpr_32 = S_MOV_B32 59
+  ; GFX908-NEXT:   [[S_MOV_B32_60:%[0-9]+]]:sgpr_32 = S_MOV_B32 60
+  ; GFX908-NEXT:   [[S_MOV_B32_61:%[0-9]+]]:sgpr_32 = S_MOV_B32 61
+  ; GFX908-NEXT:   [[S_MOV_B32_62:%[0-9]+]]:sgpr_32 = S_MOV_B32 62
+  ; GFX908-NEXT:   [[S_MOV_B32_63:%[0-9]+]]:sgpr_32 = S_MOV_B32 63
+  ; GFX908-NEXT:   [[S_MOV_B32_64:%[0-9]+]]:sgpr_32 = S_MOV_B32 64
+  ; GFX908-NEXT:   [[S_MOV_B32_65:%[0-9]+]]:sgpr_32 = S_MOV_B32 65
+  ; GFX908-NEXT:   [[S_MOV_B32_66:%[0-9]+]]:sgpr_32 = S_MOV_B32 66
+  ; GFX908-NEXT:   [[S_MOV_B32_67:%[0-9]+]]:sgpr_32 = S_MOV_B32 67
+  ; GFX908-NEXT:   [[S_MOV_B32_68:%[0-9]+]]:sgpr_32 = S_MOV_B32 68
+  ; GFX908-NEXT:   [[S_MOV_B32_69:%[0-9]+]]:sgpr_32 = S_MOV_B32 69
+  ; GFX908-NEXT:   [[S_MOV_B32_70:%[0-9]+]]:sgpr_32 = S_MOV_B32 70
+  ; GFX908-NEXT:   [[S_MOV_B32_71:%[0-9]+]]:sgpr_32 = S_MOV_B32 71
+  ; GFX908-NEXT:   [[S_MOV_B32_72:%[0-9]+]]:sgpr_32 = S_MOV_B32 72
+  ; GFX908-NEXT:   [[S_MOV_B32_73:%[0-9]+]]:sgpr_32 = S_MOV_B32 73
+  ; GFX908-NEXT:   [[S_MOV_B32_74:%[0-9]+]]:sgpr_32 = S_MOV_B32 74
+  ; GFX908-NEXT:   [[S_MOV_B32_75:%[0-9]+]]:sgpr_32 = S_MOV_B32 75
+  ; GFX908-NEXT:   [[S_MOV_B32_76:%[0-9]+]]:sgpr_32 = S_MOV_B32 76
+  ; GFX908-NEXT:   [[S_MOV_B32_77:%[0-9]+]]:sgpr_32 = S_MOV_B32 77
+  ; GFX908-NEXT:   [[S_MOV_B32_78:%[0-9]+]]:sgpr_32 = S_MOV_B32 78
+  ; GFX908-NEXT:   [[S_MOV_B32_79:%[0-9]+]]:sgpr_32 = S_MOV_B32 79
+  ; GFX908-NEXT:   [[S_MOV_B32_80:%[0-9]+]]:sgpr_32 = S_MOV_B32 80
+  ; GFX908-NEXT:   [[S_MOV_B32_81:%[0-9]+]]:sgpr_32 = S_MOV_B32 81
+  ; GFX908-NEXT:   [[S_MOV_B32_82:%[0-9]+]]:sgpr_32 = S_MOV_B32 82
+  ; GFX908-NEXT:   [[S_MOV_B32_83:%[0-9]+]]:sgpr_32 = S_MOV_B32 83
+  ; GFX908-NEXT:   [[S_MOV_B32_84:%[0-9]+]]:sgpr_32 = S_MOV_B32 84
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_]], implicit [[S_MOV_B32_1]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_2]], implicit [[S_MOV_B32_3]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_4]], implicit [[S_MOV_B32_5]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_6]], implicit [[S_MOV_B32_7]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_8]], implicit [[S_MOV_B32_9]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_10]], implicit [[S_MOV_B32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_12]], implicit [[S_MOV_B32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_14]], implicit [[S_MOV_B32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_16]], implicit [[S_MOV_B32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_18]], implicit [[S_MOV_B32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_20]], implicit [[S_MOV_B32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_22]], implicit [[S_MOV_B32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_24]], implicit [[S_MOV_B32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_26]], implicit [[S_MOV_B32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_28]], implicit [[S_MOV_B32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_30]], implicit [[S_MOV_B32_31]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_32]], implicit [[S_MOV_B32_33]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_34]], implicit [[S_MOV_B32_35]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_36]], implicit [[S_MOV_B32_37]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_38]], implicit [[S_MOV_B32_39]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_40]], implicit [[S_MOV_B32_41]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_42]], implicit [[S_MOV_B32_43]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_44]], implicit [[S_MOV_B32_45]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_46]], implicit [[S_MOV_B32_47]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_48]], implicit [[S_MOV_B32_49]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_50]], implicit [[S_MOV_B32_51]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_52]], implicit [[S_MOV_B32_53]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_54]], implicit [[S_MOV_B32_55]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_56]], implicit [[S_MOV_B32_57]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_58]], implicit [[S_MOV_B32_59]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_60]], implicit [[S_MOV_B32_61]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_62]], implicit [[S_MOV_B32_63]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_64]], implicit [[S_MOV_B32_65]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_66]], implicit [[S_MOV_B32_67]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_68]], implicit [[S_MOV_B32_69]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_70]], implicit [[S_MOV_B32_71]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_72]], implicit [[S_MOV_B32_73]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_74]], implicit [[S_MOV_B32_75]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_76]], implicit [[S_MOV_B32_77]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_78]], implicit [[S_MOV_B32_79]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_80]], implicit [[S_MOV_B32_81]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_82]], implicit [[S_MOV_B32_83]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_84]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+    %100:sgpr_32 = S_MOV_B32 0
+    %101:sgpr_32 = S_MOV_B32 1
+    %102:sgpr_32 = S_MOV_B32 2
+    %103:sgpr_32 = S_MOV_B32 3
+    %104:sgpr_32 = S_MOV_B32 4
+    %105:sgpr_32 = S_MOV_B32 5
+    %106:sgpr_32 = S_MOV_B32 6
+    %107:sgpr_32 = S_MOV_B32 7
+    %108:sgpr_32 = S_MOV_B32 8
+    %109:sgpr_32 = S_MOV_B32 9
+    %110:sgpr_32 = S_MOV_B32 10
+    %111:sgpr_32 = S_MOV_B32 11
+    %112:sgpr_32 = S_MOV_B32 12
+    %113:sgpr_32 = S_MOV_B32 13
+    %114:sgpr_32 = S_MOV_B32 14
+    %115:sgpr_32 = S_MOV_B32 15
+    %116:sgpr_32 = S_MOV_B32 16
+    %117:sgpr_32 = S_MOV_B32 17
+    %118:sgpr_32 = S_MOV_B32 18
+    %119:sgpr_32 = S_MOV_B32 19
+    %120:sgpr_32 = S_MOV_B32 20
+    %121:sgpr_32 = S_MOV_B32 21
+    %122:sgpr_32 = S_MOV_B32 22
+    %123:sgpr_32 = S_MOV_B32 23
+    %124:sgpr_32 = S_MOV_B32 24
+    %125:sgpr_32 = S_MOV_B32 25
+    %126:sgpr_32 = S_MOV_B32 26
+    %127:sgpr_32 = S_MOV_B32 27
+    %128:sgpr_32 = S_MOV_B32 28
+    %129:sgpr_32 = S_MOV_B32 29
+    %130:sgpr_32 = S_MOV_B32 30
+    %131:sgpr_32 = S_MOV_B32 31
+    %132:sgpr_32 = S_MOV_B32 32
+    %133:sgpr_32 = S_MOV_B32 33
+    %134:sgpr_32 = S_MOV_B32 34
+    %135:sgpr_32 = S_MOV_B32 35
+    %136:sgpr_32 = S_MOV_B32 36
+    %137:sgpr_32 = S_MOV_B32 37
+    %138:sgpr_32 = S_MOV_B32 38
+    %139:sgpr_32 = S_MOV_B32 39
+    %140:sgpr_32 = S_MOV_B32 40
+    %141:sgpr_32 = S_MOV_B32 41
+    %142:sgpr_32 = S_MOV_B32 42
+    %143:sgpr_32 = S_MOV_B32 43
+    %144:sgpr_32 = S_MOV_B32 44
+    %145:sgpr_32 = S_MOV_B32 45
+    %146:sgpr_32 = S_MOV_B32 46
+    %147:sgpr_32 = S_MOV_B32 47
+    %148:sgpr_32 = S_MOV_B32 48
+    %149:sgpr_32 = S_MOV_B32 49
+    %150:sgpr_32 = S_MOV_B32 50
+    %151:sgpr_32 = S_MOV_B32 51
+    %152:sgpr_32 = S_MOV_B32 52
+    %153:sgpr_32 = S_MOV_B32 53
+    %154:sgpr_32 = S_MOV_B32 54
+    %155:sgpr_32 = S_MOV_B32 55
+    %156:sgpr_32 = S_MOV_B32 56
+    %157:sgpr_32 = S_MOV_B32 57
+    %158:sgpr_32 = S_MOV_B32 58
+    %159:sgpr_32 = S_MOV_B32 59
+    %160:sgpr_32 = S_MOV_B32 60
+    %161:sgpr_32 = S_MOV_B32 61
+    %162:sgpr_32 = S_MOV_B32 62
+    %163:sgpr_32 = S_MOV_B32 63
+    %164:sgpr_32 = S_MOV_B32 64
+    %165:sgpr_32 = S_MOV_B32 65
+    %166:sgpr_32 = S_MOV_B32 66
+    %167:sgpr_32 = S_MOV_B32 67
+    %168:sgpr_32 = S_MOV_B32 68
+    %169:sgpr_32 = S_MOV_B32 69
+    %170:sgpr_32 = S_MOV_B32 70
+    %171:sgpr_32 = S_MOV_B32 71
+    %172:sgpr_32 = S_MOV_B32 72
+    %173:sgpr_32 = S_MOV_B32 73
+    %174:sgpr_32 = S_MOV_B32 74
+    %175:sgpr_32 = S_MOV_B32 75
+    %176:sgpr_32 = S_MOV_B32 76
+    %177:sgpr_32 = S_MOV_B32 77
+    %178:sgpr_32 = S_MOV_B32 78
+    %179:sgpr_32 = S_MOV_B32 79
+    %180:sgpr_32 = S_MOV_B32 80
+    %181:sgpr_32 = S_MOV_B32 81
+    %182:sgpr_32 = S_MOV_B32 82
+    %183:sgpr_32 = S_MOV_B32 83
+    %184:sgpr_32 = S_MOV_B32 84
+    S_NOP 0, implicit %100, implicit %101
+    S_NOP 0, implicit %102, implicit %103
+    S_NOP 0, implicit %104, implicit %105
+    S_NOP 0, implicit %106, implicit %107
+    S_NOP 0, implicit %108, implicit %109
+    S_NOP 0, implicit %110, implicit %111
+    S_NOP 0, implicit %112, implicit %113
+    S_NOP 0, implicit %114, implicit %115
+    S_NOP 0, implicit %116, implicit %117
+    S_NOP 0, implicit %118, implicit %119
+    S_NOP 0, implicit %120, implicit %121
+    S_NOP 0, implicit %122, implicit %123
+    S_NOP 0, implicit %124, implicit %125
+    S_NOP 0, implicit %126, implicit %127
+    S_NOP 0, implicit %128, implicit %129
+    S_NOP 0, implicit %130, implicit %131
+    S_NOP 0, implicit %132, implicit %133
+    S_NOP 0, implicit %134, implicit %135
+    S_NOP 0, implicit %136, implicit %137
+    S_NOP 0, implicit %138, implicit %139
+    S_NOP 0, implicit %140, implicit %141
+    S_NOP 0, implicit %142, implicit %143
+    S_NOP 0, implicit %144, implicit %145
+    S_NOP 0, implicit %146, implicit %147
+    S_NOP 0, implicit %148, implicit %149
+    S_NOP 0, implicit %150, implicit %151
+    S_NOP 0, implicit %152, implicit %153
+    S_NOP 0, implicit %154, implicit %155
+    S_NOP 0, implicit %156, implicit %157
+    S_NOP 0, implicit %158, implicit %159
+    S_NOP 0, implicit %160, implicit %161
+    S_NOP 0, implicit %162, implicit %163
+    S_NOP 0, implicit %164, implicit %165
+    S_NOP 0, implicit %166, implicit %167
+    S_NOP 0, implicit %168, implicit %169
+    S_NOP 0, implicit %170, implicit %171
+    S_NOP 0, implicit %172, implicit %173
+    S_NOP 0, implicit %174, implicit %175
+    S_NOP 0, implicit %176, implicit %177
+    S_NOP 0, implicit %178, implicit %179
+    S_NOP 0, implicit %180, implicit %181
+    S_NOP 0, implicit %182, implicit %183
+    S_NOP 0, implicit %184
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %33
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_no_sink_limited_by_sgprs_2
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_no_sink_limited_by_sgprs_2
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0
+  ; GFX908-NEXT:   [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 1
+  ; GFX908-NEXT:   [[S_MOV_B32_2:%[0-9]+]]:sgpr_32 = S_MOV_B32 2
+  ; GFX908-NEXT:   [[S_MOV_B32_3:%[0-9]+]]:sgpr_32 = S_MOV_B32 3
+  ; GFX908-NEXT:   [[S_MOV_B32_4:%[0-9]+]]:sgpr_32 = S_MOV_B32 4
+  ; GFX908-NEXT:   [[S_MOV_B32_5:%[0-9]+]]:sgpr_32 = S_MOV_B32 5
+  ; GFX908-NEXT:   [[S_MOV_B32_6:%[0-9]+]]:sgpr_32 = S_MOV_B32 6
+  ; GFX908-NEXT:   [[S_MOV_B32_7:%[0-9]+]]:sgpr_32 = S_MOV_B32 7
+  ; GFX908-NEXT:   [[S_MOV_B32_8:%[0-9]+]]:sgpr_32 = S_MOV_B32 8
+  ; GFX908-NEXT:   [[S_MOV_B32_9:%[0-9]+]]:sgpr_32 = S_MOV_B32 9
+  ; GFX908-NEXT:   [[S_MOV_B32_10:%[0-9]+]]:sgpr_32 = S_MOV_B32 10
+  ; GFX908-NEXT:   [[S_MOV_B32_11:%[0-9]+]]:sgpr_32 = S_MOV_B32 11
+  ; GFX908-NEXT:   [[S_MOV_B32_12:%[0-9]+]]:sgpr_32 = S_MOV_B32 12
+  ; GFX908-NEXT:   [[S_MOV_B32_13:%[0-9]+]]:sgpr_32 = S_MOV_B32 13
+  ; GFX908-NEXT:   [[S_MOV_B32_14:%[0-9]+]]:sgpr_32 = S_MOV_B32 14
+  ; GFX908-NEXT:   [[S_MOV_B32_15:%[0-9]+]]:sgpr_32 = S_MOV_B32 15
+  ; GFX908-NEXT:   [[S_MOV_B32_16:%[0-9]+]]:sgpr_32 = S_MOV_B32 16
+  ; GFX908-NEXT:   [[S_MOV_B32_17:%[0-9]+]]:sgpr_32 = S_MOV_B32 17
+  ; GFX908-NEXT:   [[S_MOV_B32_18:%[0-9]+]]:sgpr_32 = S_MOV_B32 18
+  ; GFX908-NEXT:   [[S_MOV_B32_19:%[0-9]+]]:sgpr_32 = S_MOV_B32 19
+  ; GFX908-NEXT:   [[S_MOV_B32_20:%[0-9]+]]:sgpr_32 = S_MOV_B32 20
+  ; GFX908-NEXT:   [[S_MOV_B32_21:%[0-9]+]]:sgpr_32 = S_MOV_B32 21
+  ; GFX908-NEXT:   [[S_MOV_B32_22:%[0-9]+]]:sgpr_32 = S_MOV_B32 22
+  ; GFX908-NEXT:   [[S_MOV_B32_23:%[0-9]+]]:sgpr_32 = S_MOV_B32 23
+  ; GFX908-NEXT:   [[S_MOV_B32_24:%[0-9]+]]:sgpr_32 = S_MOV_B32 24
+  ; GFX908-NEXT:   [[S_MOV_B32_25:%[0-9]+]]:sgpr_32 = S_MOV_B32 25
+  ; GFX908-NEXT:   [[S_MOV_B32_26:%[0-9]+]]:sgpr_32 = S_MOV_B32 26
+  ; GFX908-NEXT:   [[S_MOV_B32_27:%[0-9]+]]:sgpr_32 = S_MOV_B32 27
+  ; GFX908-NEXT:   [[S_MOV_B32_28:%[0-9]+]]:sgpr_32 = S_MOV_B32 28
+  ; GFX908-NEXT:   [[S_MOV_B32_29:%[0-9]+]]:sgpr_32 = S_MOV_B32 29
+  ; GFX908-NEXT:   [[S_MOV_B32_30:%[0-9]+]]:sgpr_32 = S_MOV_B32 30
+  ; GFX908-NEXT:   [[S_MOV_B32_31:%[0-9]+]]:sgpr_32 = S_MOV_B32 31
+  ; GFX908-NEXT:   [[S_MOV_B32_32:%[0-9]+]]:sgpr_32 = S_MOV_B32 32
+  ; GFX908-NEXT:   [[S_MOV_B32_33:%[0-9]+]]:sgpr_32 = S_MOV_B32 33
+  ; GFX908-NEXT:   [[S_MOV_B32_34:%[0-9]+]]:sgpr_32 = S_MOV_B32 34
+  ; GFX908-NEXT:   [[S_MOV_B32_35:%[0-9]+]]:sgpr_32 = S_MOV_B32 35
+  ; GFX908-NEXT:   [[S_MOV_B32_36:%[0-9]+]]:sgpr_32 = S_MOV_B32 36
+  ; GFX908-NEXT:   [[S_MOV_B32_37:%[0-9]+]]:sgpr_32 = S_MOV_B32 37
+  ; GFX908-NEXT:   [[S_MOV_B32_38:%[0-9]+]]:sgpr_32 = S_MOV_B32 38
+  ; GFX908-NEXT:   [[S_MOV_B32_39:%[0-9]+]]:sgpr_32 = S_MOV_B32 39
+  ; GFX908-NEXT:   [[S_MOV_B32_40:%[0-9]+]]:sgpr_32 = S_MOV_B32 40
+  ; GFX908-NEXT:   [[S_MOV_B32_41:%[0-9]+]]:sgpr_32 = S_MOV_B32 41
+  ; GFX908-NEXT:   [[S_MOV_B32_42:%[0-9]+]]:sgpr_32 = S_MOV_B32 42
+  ; GFX908-NEXT:   [[S_MOV_B32_43:%[0-9]+]]:sgpr_32 = S_MOV_B32 43
+  ; GFX908-NEXT:   [[S_MOV_B32_44:%[0-9]+]]:sgpr_32 = S_MOV_B32 44
+  ; GFX908-NEXT:   [[S_MOV_B32_45:%[0-9]+]]:sgpr_32 = S_MOV_B32 45
+  ; GFX908-NEXT:   [[S_MOV_B32_46:%[0-9]+]]:sgpr_32 = S_MOV_B32 46
+  ; GFX908-NEXT:   [[S_MOV_B32_47:%[0-9]+]]:sgpr_32 = S_MOV_B32 47
+  ; GFX908-NEXT:   [[S_MOV_B32_48:%[0-9]+]]:sgpr_32 = S_MOV_B32 48
+  ; GFX908-NEXT:   [[S_MOV_B32_49:%[0-9]+]]:sgpr_32 = S_MOV_B32 49
+  ; GFX908-NEXT:   [[S_MOV_B32_50:%[0-9]+]]:sgpr_32 = S_MOV_B32 50
+  ; GFX908-NEXT:   [[S_MOV_B32_51:%[0-9]+]]:sgpr_32 = S_MOV_B32 51
+  ; GFX908-NEXT:   [[S_MOV_B32_52:%[0-9]+]]:sgpr_32 = S_MOV_B32 52
+  ; GFX908-NEXT:   [[S_MOV_B32_53:%[0-9]+]]:sgpr_32 = S_MOV_B32 53
+  ; GFX908-NEXT:   [[S_MOV_B32_54:%[0-9]+]]:sgpr_32 = S_MOV_B32 54
+  ; GFX908-NEXT:   [[S_MOV_B32_55:%[0-9]+]]:sgpr_32 = S_MOV_B32 55
+  ; GFX908-NEXT:   [[S_MOV_B32_56:%[0-9]+]]:sgpr_32 = S_MOV_B32 56
+  ; GFX908-NEXT:   [[S_MOV_B32_57:%[0-9]+]]:sgpr_32 = S_MOV_B32 57
+  ; GFX908-NEXT:   [[S_MOV_B32_58:%[0-9]+]]:sgpr_32 = S_MOV_B32 58
+  ; GFX908-NEXT:   [[S_MOV_B32_59:%[0-9]+]]:sgpr_32 = S_MOV_B32 59
+  ; GFX908-NEXT:   [[S_MOV_B32_60:%[0-9]+]]:sgpr_32 = S_MOV_B32 60
+  ; GFX908-NEXT:   [[S_MOV_B32_61:%[0-9]+]]:sgpr_32 = S_MOV_B32 61
+  ; GFX908-NEXT:   [[S_MOV_B32_62:%[0-9]+]]:sgpr_32 = S_MOV_B32 62
+  ; GFX908-NEXT:   [[S_MOV_B32_63:%[0-9]+]]:sgpr_32 = S_MOV_B32 63
+  ; GFX908-NEXT:   [[S_MOV_B32_64:%[0-9]+]]:sgpr_32 = S_MOV_B32 64
+  ; GFX908-NEXT:   [[S_MOV_B32_65:%[0-9]+]]:sgpr_32 = S_MOV_B32 65
+  ; GFX908-NEXT:   [[S_MOV_B32_66:%[0-9]+]]:sgpr_32 = S_MOV_B32 66
+  ; GFX908-NEXT:   [[S_MOV_B32_67:%[0-9]+]]:sgpr_32 = S_MOV_B32 67
+  ; GFX908-NEXT:   [[S_MOV_B32_68:%[0-9]+]]:sgpr_32 = S_MOV_B32 68
+  ; GFX908-NEXT:   [[S_MOV_B32_69:%[0-9]+]]:sgpr_32 = S_MOV_B32 69
+  ; GFX908-NEXT:   [[S_MOV_B32_70:%[0-9]+]]:sgpr_32 = S_MOV_B32 70
+  ; GFX908-NEXT:   [[S_MOV_B32_71:%[0-9]+]]:sgpr_32 = S_MOV_B32 71
+  ; GFX908-NEXT:   [[S_MOV_B32_72:%[0-9]+]]:sgpr_32 = S_MOV_B32 72
+  ; GFX908-NEXT:   [[S_MOV_B32_73:%[0-9]+]]:sgpr_32 = S_MOV_B32 73
+  ; GFX908-NEXT:   [[S_MOV_B32_74:%[0-9]+]]:sgpr_32 = S_MOV_B32 74
+  ; GFX908-NEXT:   [[S_MOV_B32_75:%[0-9]+]]:sgpr_32 = S_MOV_B32 75
+  ; GFX908-NEXT:   [[S_MOV_B32_76:%[0-9]+]]:sgpr_32 = S_MOV_B32 76
+  ; GFX908-NEXT:   [[S_MOV_B32_77:%[0-9]+]]:sgpr_32 = S_MOV_B32 77
+  ; GFX908-NEXT:   [[S_MOV_B32_78:%[0-9]+]]:sgpr_32 = S_MOV_B32 78
+  ; GFX908-NEXT:   [[S_MOV_B32_79:%[0-9]+]]:sgpr_32 = S_MOV_B32 79
+  ; GFX908-NEXT:   [[S_MOV_B32_80:%[0-9]+]]:sgpr_32 = S_MOV_B32 80
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_]], implicit [[S_MOV_B32_1]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_2]], implicit [[S_MOV_B32_3]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_4]], implicit [[S_MOV_B32_5]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_6]], implicit [[S_MOV_B32_7]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_8]], implicit [[S_MOV_B32_9]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_10]], implicit [[S_MOV_B32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_12]], implicit [[S_MOV_B32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_14]], implicit [[S_MOV_B32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_16]], implicit [[S_MOV_B32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_18]], implicit [[S_MOV_B32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_20]], implicit [[S_MOV_B32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_22]], implicit [[S_MOV_B32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_24]], implicit [[S_MOV_B32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_26]], implicit [[S_MOV_B32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_28]], implicit [[S_MOV_B32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_30]], implicit [[S_MOV_B32_31]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_32]], implicit [[S_MOV_B32_33]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_34]], implicit [[S_MOV_B32_35]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_36]], implicit [[S_MOV_B32_37]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_38]], implicit [[S_MOV_B32_39]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_40]], implicit [[S_MOV_B32_41]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_42]], implicit [[S_MOV_B32_43]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_44]], implicit [[S_MOV_B32_45]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_46]], implicit [[S_MOV_B32_47]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_48]], implicit [[S_MOV_B32_49]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_50]], implicit [[S_MOV_B32_51]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_52]], implicit [[S_MOV_B32_53]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_54]], implicit [[S_MOV_B32_55]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_56]], implicit [[S_MOV_B32_57]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_58]], implicit [[S_MOV_B32_59]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_60]], implicit [[S_MOV_B32_61]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_62]], implicit [[S_MOV_B32_63]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_64]], implicit [[S_MOV_B32_65]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_66]], implicit [[S_MOV_B32_67]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_68]], implicit [[S_MOV_B32_69]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_70]], implicit [[S_MOV_B32_71]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_72]], implicit [[S_MOV_B32_73]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_74]], implicit [[S_MOV_B32_75]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_76]], implicit [[S_MOV_B32_77]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_78]], implicit [[S_MOV_B32_79]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_80]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+
+    %100:sgpr_32 = S_MOV_B32 0
+    %101:sgpr_32 = S_MOV_B32 1
+    %102:sgpr_32 = S_MOV_B32 2
+    %103:sgpr_32 = S_MOV_B32 3
+    %104:sgpr_32 = S_MOV_B32 4
+    %105:sgpr_32 = S_MOV_B32 5
+    %106:sgpr_32 = S_MOV_B32 6
+    %107:sgpr_32 = S_MOV_B32 7
+    %108:sgpr_32 = S_MOV_B32 8
+    %109:sgpr_32 = S_MOV_B32 9
+    %110:sgpr_32 = S_MOV_B32 10
+    %111:sgpr_32 = S_MOV_B32 11
+    %112:sgpr_32 = S_MOV_B32 12
+    %113:sgpr_32 = S_MOV_B32 13
+    %114:sgpr_32 = S_MOV_B32 14
+    %115:sgpr_32 = S_MOV_B32 15
+    %116:sgpr_32 = S_MOV_B32 16
+    %117:sgpr_32 = S_MOV_B32 17
+    %118:sgpr_32 = S_MOV_B32 18
+    %119:sgpr_32 = S_MOV_B32 19
+    %120:sgpr_32 = S_MOV_B32 20
+    %121:sgpr_32 = S_MOV_B32 21
+    %122:sgpr_32 = S_MOV_B32 22
+    %123:sgpr_32 = S_MOV_B32 23
+    %124:sgpr_32 = S_MOV_B32 24
+    %125:sgpr_32 = S_MOV_B32 25
+    %126:sgpr_32 = S_MOV_B32 26
+    %127:sgpr_32 = S_MOV_B32 27
+    %128:sgpr_32 = S_MOV_B32 28
+    %129:sgpr_32 = S_MOV_B32 29
+    %130:sgpr_32 = S_MOV_B32 30
+    %131:sgpr_32 = S_MOV_B32 31
+    %132:sgpr_32 = S_MOV_B32 32
+    %133:sgpr_32 = S_MOV_B32 33
+    %134:sgpr_32 = S_MOV_B32 34
+    %135:sgpr_32 = S_MOV_B32 35
+    %136:sgpr_32 = S_MOV_B32 36
+    %137:sgpr_32 = S_MOV_B32 37
+    %138:sgpr_32 = S_MOV_B32 38
+    %139:sgpr_32 = S_MOV_B32 39
+    %140:sgpr_32 = S_MOV_B32 40
+    %141:sgpr_32 = S_MOV_B32 41
+    %142:sgpr_32 = S_MOV_B32 42
+    %143:sgpr_32 = S_MOV_B32 43
+    %144:sgpr_32 = S_MOV_B32 44
+    %145:sgpr_32 = S_MOV_B32 45
+    %146:sgpr_32 = S_MOV_B32 46
+    %147:sgpr_32 = S_MOV_B32 47
+    %148:sgpr_32 = S_MOV_B32 48
+    %149:sgpr_32 = S_MOV_B32 49
+    %150:sgpr_32 = S_MOV_B32 50
+    %151:sgpr_32 = S_MOV_B32 51
+    %152:sgpr_32 = S_MOV_B32 52
+    %153:sgpr_32 = S_MOV_B32 53
+    %154:sgpr_32 = S_MOV_B32 54
+    %155:sgpr_32 = S_MOV_B32 55
+    %156:sgpr_32 = S_MOV_B32 56
+    %157:sgpr_32 = S_MOV_B32 57
+    %158:sgpr_32 = S_MOV_B32 58
+    %159:sgpr_32 = S_MOV_B32 59
+    %160:sgpr_32 = S_MOV_B32 60
+    %161:sgpr_32 = S_MOV_B32 61
+    %162:sgpr_32 = S_MOV_B32 62
+    %163:sgpr_32 = S_MOV_B32 63
+    %164:sgpr_32 = S_MOV_B32 64
+    %165:sgpr_32 = S_MOV_B32 65
+    %166:sgpr_32 = S_MOV_B32 66
+    %167:sgpr_32 = S_MOV_B32 67
+    %168:sgpr_32 = S_MOV_B32 68
+    %169:sgpr_32 = S_MOV_B32 69
+    %170:sgpr_32 = S_MOV_B32 70
+    %171:sgpr_32 = S_MOV_B32 71
+    %172:sgpr_32 = S_MOV_B32 72
+    %173:sgpr_32 = S_MOV_B32 73
+    %174:sgpr_32 = S_MOV_B32 74
+    %175:sgpr_32 = S_MOV_B32 75
+    %176:sgpr_32 = S_MOV_B32 76
+    %177:sgpr_32 = S_MOV_B32 77
+    %178:sgpr_32 = S_MOV_B32 78
+    %179:sgpr_32 = S_MOV_B32 79
+    %180:sgpr_32 = S_MOV_B32 80
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    S_NOP 0, implicit %34
+    S_NOP 0, implicit %33
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32
+
+    S_NOP 0, implicit %100, implicit %101
+    S_NOP 0, implicit %102, implicit %103
+    S_NOP 0, implicit %104, implicit %105
+    S_NOP 0, implicit %106, implicit %107
+    S_NOP 0, implicit %108, implicit %109
+    S_NOP 0, implicit %110, implicit %111
+    S_NOP 0, implicit %112, implicit %113
+    S_NOP 0, implicit %114, implicit %115
+    S_NOP 0, implicit %116, implicit %117
+    S_NOP 0, implicit %118, implicit %119
+    S_NOP 0, implicit %120, implicit %121
+    S_NOP 0, implicit %122, implicit %123
+    S_NOP 0, implicit %124, implicit %125
+    S_NOP 0, implicit %126, implicit %127
+    S_NOP 0, implicit %128, implicit %129
+    S_NOP 0, implicit %130, implicit %131
+    S_NOP 0, implicit %132, implicit %133
+    S_NOP 0, implicit %134, implicit %135
+    S_NOP 0, implicit %136, implicit %137
+    S_NOP 0, implicit %138, implicit %139
+    S_NOP 0, implicit %140, implicit %141
+    S_NOP 0, implicit %142, implicit %143
+    S_NOP 0, implicit %144, implicit %145
+    S_NOP 0, implicit %146, implicit %147
+    S_NOP 0, implicit %148, implicit %149
+    S_NOP 0, implicit %150, implicit %151
+    S_NOP 0, implicit %152, implicit %153
+    S_NOP 0, implicit %154, implicit %155
+    S_NOP 0, implicit %156, implicit %157
+    S_NOP 0, implicit %158, implicit %159
+    S_NOP 0, implicit %160, implicit %161
+    S_NOP 0, implicit %162, implicit %163
+    S_NOP 0, implicit %164, implicit %165
+    S_NOP 0, implicit %166, implicit %167
+    S_NOP 0, implicit %168, implicit %169
+    S_NOP 0, implicit %170, implicit %171
+    S_NOP 0, implicit %172, implicit %173
+    S_NOP 0, implicit %174, implicit %175
+    S_NOP 0, implicit %176, implicit %177
+    S_NOP 0, implicit %178, implicit %179
+    S_NOP 0, implicit %180
+
+    S_ENDPGM 0
+...
+---
+name:            test_sink_vgpr_regs_gives_8_occ_not_limited_by_sgprs
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_sink_vgpr_regs_gives_8_occ_not_limited_by_sgprs
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_24:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_25:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_26:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0
+  ; GFX908-NEXT:   [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 1
+  ; GFX908-NEXT:   [[S_MOV_B32_2:%[0-9]+]]:sgpr_32 = S_MOV_B32 2
+  ; GFX908-NEXT:   [[S_MOV_B32_3:%[0-9]+]]:sgpr_32 = S_MOV_B32 3
+  ; GFX908-NEXT:   [[S_MOV_B32_4:%[0-9]+]]:sgpr_32 = S_MOV_B32 4
+  ; GFX908-NEXT:   [[S_MOV_B32_5:%[0-9]+]]:sgpr_32 = S_MOV_B32 5
+  ; GFX908-NEXT:   [[S_MOV_B32_6:%[0-9]+]]:sgpr_32 = S_MOV_B32 6
+  ; GFX908-NEXT:   [[S_MOV_B32_7:%[0-9]+]]:sgpr_32 = S_MOV_B32 7
+  ; GFX908-NEXT:   [[S_MOV_B32_8:%[0-9]+]]:sgpr_32 = S_MOV_B32 8
+  ; GFX908-NEXT:   [[S_MOV_B32_9:%[0-9]+]]:sgpr_32 = S_MOV_B32 9
+  ; GFX908-NEXT:   [[S_MOV_B32_10:%[0-9]+]]:sgpr_32 = S_MOV_B32 10
+  ; GFX908-NEXT:   [[S_MOV_B32_11:%[0-9]+]]:sgpr_32 = S_MOV_B32 11
+  ; GFX908-NEXT:   [[S_MOV_B32_12:%[0-9]+]]:sgpr_32 = S_MOV_B32 12
+  ; GFX908-NEXT:   [[S_MOV_B32_13:%[0-9]+]]:sgpr_32 = S_MOV_B32 13
+  ; GFX908-NEXT:   [[S_MOV_B32_14:%[0-9]+]]:sgpr_32 = S_MOV_B32 14
+  ; GFX908-NEXT:   [[S_MOV_B32_15:%[0-9]+]]:sgpr_32 = S_MOV_B32 15
+  ; GFX908-NEXT:   [[S_MOV_B32_16:%[0-9]+]]:sgpr_32 = S_MOV_B32 16
+  ; GFX908-NEXT:   [[S_MOV_B32_17:%[0-9]+]]:sgpr_32 = S_MOV_B32 17
+  ; GFX908-NEXT:   [[S_MOV_B32_18:%[0-9]+]]:sgpr_32 = S_MOV_B32 18
+  ; GFX908-NEXT:   [[S_MOV_B32_19:%[0-9]+]]:sgpr_32 = S_MOV_B32 19
+  ; GFX908-NEXT:   [[S_MOV_B32_20:%[0-9]+]]:sgpr_32 = S_MOV_B32 20
+  ; GFX908-NEXT:   [[S_MOV_B32_21:%[0-9]+]]:sgpr_32 = S_MOV_B32 21
+  ; GFX908-NEXT:   [[S_MOV_B32_22:%[0-9]+]]:sgpr_32 = S_MOV_B32 22
+  ; GFX908-NEXT:   [[S_MOV_B32_23:%[0-9]+]]:sgpr_32 = S_MOV_B32 23
+  ; GFX908-NEXT:   [[S_MOV_B32_24:%[0-9]+]]:sgpr_32 = S_MOV_B32 24
+  ; GFX908-NEXT:   [[S_MOV_B32_25:%[0-9]+]]:sgpr_32 = S_MOV_B32 25
+  ; GFX908-NEXT:   [[S_MOV_B32_26:%[0-9]+]]:sgpr_32 = S_MOV_B32 26
+  ; GFX908-NEXT:   [[S_MOV_B32_27:%[0-9]+]]:sgpr_32 = S_MOV_B32 27
+  ; GFX908-NEXT:   [[S_MOV_B32_28:%[0-9]+]]:sgpr_32 = S_MOV_B32 28
+  ; GFX908-NEXT:   [[S_MOV_B32_29:%[0-9]+]]:sgpr_32 = S_MOV_B32 29
+  ; GFX908-NEXT:   [[S_MOV_B32_30:%[0-9]+]]:sgpr_32 = S_MOV_B32 30
+  ; GFX908-NEXT:   [[S_MOV_B32_31:%[0-9]+]]:sgpr_32 = S_MOV_B32 31
+  ; GFX908-NEXT:   [[S_MOV_B32_32:%[0-9]+]]:sgpr_32 = S_MOV_B32 32
+  ; GFX908-NEXT:   [[S_MOV_B32_33:%[0-9]+]]:sgpr_32 = S_MOV_B32 33
+  ; GFX908-NEXT:   [[S_MOV_B32_34:%[0-9]+]]:sgpr_32 = S_MOV_B32 34
+  ; GFX908-NEXT:   [[S_MOV_B32_35:%[0-9]+]]:sgpr_32 = S_MOV_B32 35
+  ; GFX908-NEXT:   [[S_MOV_B32_36:%[0-9]+]]:sgpr_32 = S_MOV_B32 36
+  ; GFX908-NEXT:   [[S_MOV_B32_37:%[0-9]+]]:sgpr_32 = S_MOV_B32 37
+  ; GFX908-NEXT:   [[S_MOV_B32_38:%[0-9]+]]:sgpr_32 = S_MOV_B32 38
+  ; GFX908-NEXT:   [[S_MOV_B32_39:%[0-9]+]]:sgpr_32 = S_MOV_B32 39
+  ; GFX908-NEXT:   [[S_MOV_B32_40:%[0-9]+]]:sgpr_32 = S_MOV_B32 40
+  ; GFX908-NEXT:   [[S_MOV_B32_41:%[0-9]+]]:sgpr_32 = S_MOV_B32 41
+  ; GFX908-NEXT:   [[S_MOV_B32_42:%[0-9]+]]:sgpr_32 = S_MOV_B32 42
+  ; GFX908-NEXT:   [[S_MOV_B32_43:%[0-9]+]]:sgpr_32 = S_MOV_B32 43
+  ; GFX908-NEXT:   [[S_MOV_B32_44:%[0-9]+]]:sgpr_32 = S_MOV_B32 44
+  ; GFX908-NEXT:   [[S_MOV_B32_45:%[0-9]+]]:sgpr_32 = S_MOV_B32 45
+  ; GFX908-NEXT:   [[S_MOV_B32_46:%[0-9]+]]:sgpr_32 = S_MOV_B32 46
+  ; GFX908-NEXT:   [[S_MOV_B32_47:%[0-9]+]]:sgpr_32 = S_MOV_B32 47
+  ; GFX908-NEXT:   [[S_MOV_B32_48:%[0-9]+]]:sgpr_32 = S_MOV_B32 48
+  ; GFX908-NEXT:   [[S_MOV_B32_49:%[0-9]+]]:sgpr_32 = S_MOV_B32 49
+  ; GFX908-NEXT:   [[S_MOV_B32_50:%[0-9]+]]:sgpr_32 = S_MOV_B32 50
+  ; GFX908-NEXT:   [[S_MOV_B32_51:%[0-9]+]]:sgpr_32 = S_MOV_B32 51
+  ; GFX908-NEXT:   [[S_MOV_B32_52:%[0-9]+]]:sgpr_32 = S_MOV_B32 52
+  ; GFX908-NEXT:   [[S_MOV_B32_53:%[0-9]+]]:sgpr_32 = S_MOV_B32 53
+  ; GFX908-NEXT:   [[S_MOV_B32_54:%[0-9]+]]:sgpr_32 = S_MOV_B32 54
+  ; GFX908-NEXT:   [[S_MOV_B32_55:%[0-9]+]]:sgpr_32 = S_MOV_B32 55
+  ; GFX908-NEXT:   [[S_MOV_B32_56:%[0-9]+]]:sgpr_32 = S_MOV_B32 56
+  ; GFX908-NEXT:   [[S_MOV_B32_57:%[0-9]+]]:sgpr_32 = S_MOV_B32 57
+  ; GFX908-NEXT:   [[S_MOV_B32_58:%[0-9]+]]:sgpr_32 = S_MOV_B32 58
+  ; GFX908-NEXT:   [[S_MOV_B32_59:%[0-9]+]]:sgpr_32 = S_MOV_B32 59
+  ; GFX908-NEXT:   [[S_MOV_B32_60:%[0-9]+]]:sgpr_32 = S_MOV_B32 60
+  ; GFX908-NEXT:   [[S_MOV_B32_61:%[0-9]+]]:sgpr_32 = S_MOV_B32 61
+  ; GFX908-NEXT:   [[S_MOV_B32_62:%[0-9]+]]:sgpr_32 = S_MOV_B32 62
+  ; GFX908-NEXT:   [[S_MOV_B32_63:%[0-9]+]]:sgpr_32 = S_MOV_B32 63
+  ; GFX908-NEXT:   [[S_MOV_B32_64:%[0-9]+]]:sgpr_32 = S_MOV_B32 64
+  ; GFX908-NEXT:   [[S_MOV_B32_65:%[0-9]+]]:sgpr_32 = S_MOV_B32 65
+  ; GFX908-NEXT:   [[S_MOV_B32_66:%[0-9]+]]:sgpr_32 = S_MOV_B32 66
+  ; GFX908-NEXT:   [[S_MOV_B32_67:%[0-9]+]]:sgpr_32 = S_MOV_B32 67
+  ; GFX908-NEXT:   [[S_MOV_B32_68:%[0-9]+]]:sgpr_32 = S_MOV_B32 68
+  ; GFX908-NEXT:   [[S_MOV_B32_69:%[0-9]+]]:sgpr_32 = S_MOV_B32 69
+  ; GFX908-NEXT:   [[S_MOV_B32_70:%[0-9]+]]:sgpr_32 = S_MOV_B32 70
+  ; GFX908-NEXT:   [[S_MOV_B32_71:%[0-9]+]]:sgpr_32 = S_MOV_B32 71
+  ; GFX908-NEXT:   [[S_MOV_B32_72:%[0-9]+]]:sgpr_32 = S_MOV_B32 72
+  ; GFX908-NEXT:   [[S_MOV_B32_73:%[0-9]+]]:sgpr_32 = S_MOV_B32 73
+  ; GFX908-NEXT:   [[S_MOV_B32_74:%[0-9]+]]:sgpr_32 = S_MOV_B32 74
+  ; GFX908-NEXT:   [[S_MOV_B32_75:%[0-9]+]]:sgpr_32 = S_MOV_B32 75
+  ; GFX908-NEXT:   [[S_MOV_B32_76:%[0-9]+]]:sgpr_32 = S_MOV_B32 76
+  ; GFX908-NEXT:   [[S_MOV_B32_77:%[0-9]+]]:sgpr_32 = S_MOV_B32 77
+  ; GFX908-NEXT:   [[S_MOV_B32_78:%[0-9]+]]:sgpr_32 = S_MOV_B32 78
+  ; GFX908-NEXT:   [[S_MOV_B32_79:%[0-9]+]]:sgpr_32 = S_MOV_B32 79
+  ; GFX908-NEXT:   [[S_MOV_B32_80:%[0-9]+]]:sgpr_32 = S_MOV_B32 80
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_27:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_27]]
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_28:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_28]]
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_24]], implicit [[V_MOV_B32_e32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_26]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_]], implicit [[S_MOV_B32_1]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_2]], implicit [[S_MOV_B32_3]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_4]], implicit [[S_MOV_B32_5]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_6]], implicit [[S_MOV_B32_7]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_8]], implicit [[S_MOV_B32_9]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_10]], implicit [[S_MOV_B32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_12]], implicit [[S_MOV_B32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_14]], implicit [[S_MOV_B32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_16]], implicit [[S_MOV_B32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_18]], implicit [[S_MOV_B32_19]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_20]], implicit [[S_MOV_B32_21]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_22]], implicit [[S_MOV_B32_23]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_24]], implicit [[S_MOV_B32_25]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_26]], implicit [[S_MOV_B32_27]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_28]], implicit [[S_MOV_B32_29]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_30]], implicit [[S_MOV_B32_31]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_32]], implicit [[S_MOV_B32_33]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_34]], implicit [[S_MOV_B32_35]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_36]], implicit [[S_MOV_B32_37]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_38]], implicit [[S_MOV_B32_39]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_40]], implicit [[S_MOV_B32_41]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_42]], implicit [[S_MOV_B32_43]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_44]], implicit [[S_MOV_B32_45]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_46]], implicit [[S_MOV_B32_47]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_48]], implicit [[S_MOV_B32_49]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_50]], implicit [[S_MOV_B32_51]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_52]], implicit [[S_MOV_B32_53]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_54]], implicit [[S_MOV_B32_55]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_56]], implicit [[S_MOV_B32_57]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_58]], implicit [[S_MOV_B32_59]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_60]], implicit [[S_MOV_B32_61]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_62]], implicit [[S_MOV_B32_63]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_64]], implicit [[S_MOV_B32_65]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_66]], implicit [[S_MOV_B32_67]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_68]], implicit [[S_MOV_B32_69]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_70]], implicit [[S_MOV_B32_71]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_72]], implicit [[S_MOV_B32_73]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_74]], implicit [[S_MOV_B32_75]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_76]], implicit [[S_MOV_B32_77]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_78]], implicit [[S_MOV_B32_79]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[S_MOV_B32_80]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    %30:vgpr_32 = V_MOV_B32_e32 20, implicit $exec
+    %31:vgpr_32 = V_MOV_B32_e32 21, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 22, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %35:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %36:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %37:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+
+    %100:sgpr_32 = S_MOV_B32 0
+    %101:sgpr_32 = S_MOV_B32 1
+    %102:sgpr_32 = S_MOV_B32 2
+    %103:sgpr_32 = S_MOV_B32 3
+    %104:sgpr_32 = S_MOV_B32 4
+    %105:sgpr_32 = S_MOV_B32 5
+    %106:sgpr_32 = S_MOV_B32 6
+    %107:sgpr_32 = S_MOV_B32 7
+    %108:sgpr_32 = S_MOV_B32 8
+    %109:sgpr_32 = S_MOV_B32 9
+    %110:sgpr_32 = S_MOV_B32 10
+    %111:sgpr_32 = S_MOV_B32 11
+    %112:sgpr_32 = S_MOV_B32 12
+    %113:sgpr_32 = S_MOV_B32 13
+    %114:sgpr_32 = S_MOV_B32 14
+    %115:sgpr_32 = S_MOV_B32 15
+    %116:sgpr_32 = S_MOV_B32 16
+    %117:sgpr_32 = S_MOV_B32 17
+    %118:sgpr_32 = S_MOV_B32 18
+    %119:sgpr_32 = S_MOV_B32 19
+    %120:sgpr_32 = S_MOV_B32 20
+    %121:sgpr_32 = S_MOV_B32 21
+    %122:sgpr_32 = S_MOV_B32 22
+    %123:sgpr_32 = S_MOV_B32 23
+    %124:sgpr_32 = S_MOV_B32 24
+    %125:sgpr_32 = S_MOV_B32 25
+    %126:sgpr_32 = S_MOV_B32 26
+    %127:sgpr_32 = S_MOV_B32 27
+    %128:sgpr_32 = S_MOV_B32 28
+    %129:sgpr_32 = S_MOV_B32 29
+    %130:sgpr_32 = S_MOV_B32 30
+    %131:sgpr_32 = S_MOV_B32 31
+    %132:sgpr_32 = S_MOV_B32 32
+    %133:sgpr_32 = S_MOV_B32 33
+    %134:sgpr_32 = S_MOV_B32 34
+    %135:sgpr_32 = S_MOV_B32 35
+    %136:sgpr_32 = S_MOV_B32 36
+    %137:sgpr_32 = S_MOV_B32 37
+    %138:sgpr_32 = S_MOV_B32 38
+    %139:sgpr_32 = S_MOV_B32 39
+    %140:sgpr_32 = S_MOV_B32 40
+    %141:sgpr_32 = S_MOV_B32 41
+    %142:sgpr_32 = S_MOV_B32 42
+    %143:sgpr_32 = S_MOV_B32 43
+    %144:sgpr_32 = S_MOV_B32 44
+    %145:sgpr_32 = S_MOV_B32 45
+    %146:sgpr_32 = S_MOV_B32 46
+    %147:sgpr_32 = S_MOV_B32 47
+    %148:sgpr_32 = S_MOV_B32 48
+    %149:sgpr_32 = S_MOV_B32 49
+    %150:sgpr_32 = S_MOV_B32 50
+    %151:sgpr_32 = S_MOV_B32 51
+    %152:sgpr_32 = S_MOV_B32 52
+    %153:sgpr_32 = S_MOV_B32 53
+    %154:sgpr_32 = S_MOV_B32 54
+    %155:sgpr_32 = S_MOV_B32 55
+    %156:sgpr_32 = S_MOV_B32 56
+    %157:sgpr_32 = S_MOV_B32 57
+    %158:sgpr_32 = S_MOV_B32 58
+    %159:sgpr_32 = S_MOV_B32 59
+    %160:sgpr_32 = S_MOV_B32 60
+    %161:sgpr_32 = S_MOV_B32 61
+    %162:sgpr_32 = S_MOV_B32 62
+    %163:sgpr_32 = S_MOV_B32 63
+    %164:sgpr_32 = S_MOV_B32 64
+    %165:sgpr_32 = S_MOV_B32 65
+    %166:sgpr_32 = S_MOV_B32 66
+    %167:sgpr_32 = S_MOV_B32 67
+    %168:sgpr_32 = S_MOV_B32 68
+    %169:sgpr_32 = S_MOV_B32 69
+    %170:sgpr_32 = S_MOV_B32 70
+    %171:sgpr_32 = S_MOV_B32 71
+    %172:sgpr_32 = S_MOV_B32 72
+    %173:sgpr_32 = S_MOV_B32 73
+    %174:sgpr_32 = S_MOV_B32 74
+    %175:sgpr_32 = S_MOV_B32 75
+    %176:sgpr_32 = S_MOV_B32 76
+    %177:sgpr_32 = S_MOV_B32 77
+    %178:sgpr_32 = S_MOV_B32 78
+    %179:sgpr_32 = S_MOV_B32 79
+    %180:sgpr_32 = S_MOV_B32 80
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %38:vgpr_32 = V_MOV_B32_e32 28, implicit $exec
+    S_NOP 0, implicit %38
+    S_NOP 0, implicit %37
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_NOP 0, implicit %30, implicit %31
+    S_NOP 0, implicit %32, implicit %33
+    S_NOP 0, implicit %34, implicit %35
+    S_NOP 0, implicit %36
+
+    S_NOP 0, implicit %100, implicit %101
+    S_NOP 0, implicit %102, implicit %103
+    S_NOP 0, implicit %104, implicit %105
+    S_NOP 0, implicit %106, implicit %107
+    S_NOP 0, implicit %108, implicit %109
+    S_NOP 0, implicit %110, implicit %111
+    S_NOP 0, implicit %112, implicit %113
+    S_NOP 0, implicit %114, implicit %115
+    S_NOP 0, implicit %116, implicit %117
+    S_NOP 0, implicit %118, implicit %119
+    S_NOP 0, implicit %120, implicit %121
+    S_NOP 0, implicit %122, implicit %123
+    S_NOP 0, implicit %124, implicit %125
+    S_NOP 0, implicit %126, implicit %127
+    S_NOP 0, implicit %128, implicit %129
+    S_NOP 0, implicit %130, implicit %131
+    S_NOP 0, implicit %132, implicit %133
+    S_NOP 0, implicit %134, implicit %135
+    S_NOP 0, implicit %136, implicit %137
+    S_NOP 0, implicit %138, implicit %139
+    S_NOP 0, implicit %140, implicit %141
+    S_NOP 0, implicit %142, implicit %143
+    S_NOP 0, implicit %144, implicit %145
+    S_NOP 0, implicit %146, implicit %147
+    S_NOP 0, implicit %148, implicit %149
+    S_NOP 0, implicit %150, implicit %151
+    S_NOP 0, implicit %152, implicit %153
+    S_NOP 0, implicit %154, implicit %155
+    S_NOP 0, implicit %156, implicit %157
+    S_NOP 0, implicit %158, implicit %159
+    S_NOP 0, implicit %160, implicit %161
+    S_NOP 0, implicit %162, implicit %163
+    S_NOP 0, implicit %164, implicit %165
+    S_NOP 0, implicit %166, implicit %167
+    S_NOP 0, implicit %168, implicit %169
+    S_NOP 0, implicit %170, implicit %171
+    S_NOP 0, implicit %172, implicit %173
+    S_NOP 0, implicit %174, implicit %175
+    S_NOP 0, implicit %176, implicit %177
+    S_NOP 0, implicit %178, implicit %179
+    S_NOP 0, implicit %180
+
+    S_ENDPGM 0
+...
+---
+name:            test_occ_9_in_loop_sink_undef_to_get_occ_10_multiple_subregs
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  ; GFX908-LABEL: name: test_occ_9_in_loop_sink_undef_to_get_occ_10_multiple_subregs
+  ; GFX908: bb.0:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1
+  ; GFX908-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
+  ; GFX908-NEXT:   [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+  ; GFX908-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec
+  ; GFX908-NEXT:   undef %4.sub1:sreg_64 = S_MOV_B32 0
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_10:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_11:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_12:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_13:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_14:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_15:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_16:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_17:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_18:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_19:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.1:
+  ; GFX908-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
+  ; GFX908-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_GT_U32_e64_]], implicit-def dead $scc
+  ; GFX908-NEXT:   $exec = S_MOV_B64_term [[S_AND_B64_]]
+  ; GFX908-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
+  ; GFX908-NEXT:   S_BRANCH %bb.2
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.2:
+  ; GFX908-NEXT:   successors: %bb.3(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_20:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_21:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_22:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+  ; GFX908-NEXT:   [[V_MOV_B32_e32_23:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_20]], implicit [[V_MOV_B32_e32_21]], implicit [[V_MOV_B32_e32_22]], implicit [[V_MOV_B32_e32_23]]
+  ; GFX908-NEXT:   undef %25.sub3:vreg_128 = V_MOV_B32_e32 20, implicit $exec
+  ; GFX908-NEXT:   %25.sub0:vreg_128 = V_MOV_B32_e32 21, implicit $exec
+  ; GFX908-NEXT:   %25.sub1:vreg_128 = V_MOV_B32_e32 22, implicit $exec
+  ; GFX908-NEXT:   %25.sub2:vreg_128 = V_MOV_B32_e32 23, implicit $exec
+  ; GFX908-NEXT:   S_NOP 0, implicit %25
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.3:
+  ; GFX908-NEXT:   successors: %bb.5(0x04000000), %bb.4(0x7c000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
+  ; GFX908-NEXT:   %4.sub0:sreg_64 = S_ADD_I32 %4.sub0, -1, implicit-def dead $scc
+  ; GFX908-NEXT:   S_CMP_LG_U32 %4.sub0, 0, implicit-def $scc
+  ; GFX908-NEXT:   S_CBRANCH_SCC0 %bb.5, implicit killed $scc
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.4:
+  ; GFX908-NEXT:   successors: %bb.1(0x80000000)
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT:   S_BRANCH %bb.1
+  ; GFX908-NEXT: {{  $}}
+  ; GFX908-NEXT: bb.5:
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_]], implicit [[V_MOV_B32_e32_10]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_1]], implicit [[V_MOV_B32_e32_11]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_12]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_3]], implicit [[V_MOV_B32_e32_13]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_4]], implicit [[V_MOV_B32_e32_14]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_5]], implicit [[V_MOV_B32_e32_15]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_6]], implicit [[V_MOV_B32_e32_16]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_7]], implicit [[V_MOV_B32_e32_17]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_8]], implicit [[V_MOV_B32_e32_18]]
+  ; GFX908-NEXT:   S_NOP 0, implicit [[V_MOV_B32_e32_9]], implicit [[V_MOV_B32_e32_19]]
+  ; GFX908-NEXT:   S_ENDPGM 0
+  bb.0:
+    liveins: $vgpr0, $sgpr0_sgpr1
+
+    %1:sgpr_64(p4) = COPY $sgpr0_sgpr1
+    %2:vgpr_32(s32) = COPY $vgpr0
+    %3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4)
+    %4:sreg_64 = V_CMP_GT_U32_e64 %3.sub0, %2(s32), implicit $exec
+    undef %5.sub1:sreg_64 = S_MOV_B32 0
+    %5.sub0:sreg_64 = COPY %3.sub1
+    %10:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+    %12:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+    %13:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+    %14:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
+    %15:vgpr_32 = V_MOV_B32_e32 5, implicit $exec
+    %16:vgpr_32 = V_MOV_B32_e32 6, implicit $exec
+    %17:vgpr_32 = V_MOV_B32_e32 7, implicit $exec
+    %18:vgpr_32 = V_MOV_B32_e32 8, implicit $exec
+    %19:vgpr_32 = V_MOV_B32_e32 9, implicit $exec
+    %20:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
+    %21:vgpr_32 = V_MOV_B32_e32 11, implicit $exec
+    %22:vgpr_32 = V_MOV_B32_e32 12, implicit $exec
+    %23:vgpr_32 = V_MOV_B32_e32 13, implicit $exec
+    %24:vgpr_32 = V_MOV_B32_e32 14, implicit $exec
+    %25:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
+    %26:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
+    %27:vgpr_32 = V_MOV_B32_e32 17, implicit $exec
+    %28:vgpr_32 = V_MOV_B32_e32 18, implicit $exec
+    %29:vgpr_32 = V_MOV_B32_e32 19, implicit $exec
+    undef %30.sub3:vreg_128 = V_MOV_B32_e32 20, implicit $exec
+
+  bb.1:
+    successors: %bb.2, %bb.3
+
+    %6:sreg_64 = COPY $exec, implicit-def $exec
+    %7:sreg_64 = S_AND_B64 %6, %4, implicit-def dead $scc
+    $exec = S_MOV_B64_term %7
+    S_CBRANCH_EXECZ %bb.3, implicit $exec
+    S_BRANCH %bb.2
+
+  bb.2:
+    %31:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+    %32:vgpr_32 = V_MOV_B32_e32 25, implicit $exec
+    %33:vgpr_32 = V_MOV_B32_e32 26, implicit $exec
+    %34:vgpr_32 = V_MOV_B32_e32 27, implicit $exec
+    S_NOP 0, implicit %31, implicit %32, implicit %33, implicit %34
+    %30.sub0:vreg_128 = V_MOV_B32_e32 21, implicit $exec
+    %30.sub1:vreg_128 = V_MOV_B32_e32 22, implicit $exec
+    %30.sub2:vreg_128 = V_MOV_B32_e32 23, implicit $exec
+    S_NOP 0, implicit %30
+
+
+  bb.3:
+    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
+
+    $exec = S_OR_B64 $exec, %6, implicit-def $scc
+    %5.sub0:sreg_64 = S_ADD_I32 %5.sub0, -1, implicit-def dead $scc
+    S_CMP_LG_U32 %5.sub0, 0, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.4, implicit killed $scc
+
+  bb.5:
+    S_BRANCH %bb.1
+
+  bb.4:
+    S_NOP 0, implicit %10, implicit %20
+    S_NOP 0, implicit %11, implicit %21
+    S_NOP 0, implicit %12, implicit %22
+    S_NOP 0, implicit %13, implicit %23
+    S_NOP 0, implicit %14, implicit %24
+    S_NOP 0, implicit %15, implicit %25
+    S_NOP 0, implicit %16, implicit %26
+    S_NOP 0, implicit %17, implicit %27
+    S_NOP 0, implicit %18, implicit %28
+    S_NOP 0, implicit %19, implicit %29
+    S_ENDPGM 0
+...