[llvm][test] rewrite callbr to use i rather than X constraint NFC

[nickdesaulniers]

Summary

[llvm][test] rewrite callbr to use i rather than X constraint NFC

In D115311, we're looking to modify clang to emit i constraints rather
than X constraints for callbr's indirect destinations. Prior to doing
so, update all of the existing tests in llvm/ to match.

[nickdesaulniers]

• update

[nickdesaulniers]

• phab sux

[nickdesaulniers]

llvm/test/Verifier/callbr.ll

41

Note to reviewers, this is the only case that was interesting IMO, because the middle input operand is not an indirect destination. Ie. the label referred to in the blockaddress parameter is not duplicated in the [] on the next line.

Not that it makes a difference, just preemptively answering the question: "why is this case different from everything else in this change?"

[pengfei]

llvm/test/Verifier/callbr.ll

42

Does it mean we are able to pass blockaddress out of current function? For that case, we can't put it in the indirect labels list, right?

llvm/test/tools/llvm-diff/callbr.ll

28–29

If my above assumption is true, I think we can't replace the X with i here.
Besides, I'm confused on the indirect labels list. Are they the labels of bar or foo?

[jyknight]

This looks good to me, but I'd like to wait for a conclusion on D115409 first.

[jyknight]

llvm/test/Verifier/callbr.ll

42

In general, you may pass whatever blockaddress you like to an asm -- it's just a value. You just cannot jump to a location that's not it's listed in the indirect labels list.

llvm/test/tools/llvm-diff/callbr.ll

28–29

I don't see a a problem with using "i" everywhere -- all blockaddress are going to be immediate values no matter whether they're an indirect target or not.

The indirect labels list is only referring to labels in the current function.

This test is confusing, but, it is a test for llvm-diff, so that's okay or maybe even intended. (It can't actually possibly jump to @bar:%return or @bar:%t_no, because nothing ever gets the address of those labels. It does get the similarly-named labels in @foo, but it can't jump to those either, since they're in a different function.)

[pengfei]

llvm/test/tools/llvm-diff/callbr.ll

28–29

Thanks for the explanation. My point is the test3 above intended to use X to indicate the destination is not in the indirect labels list. For consistency, we should use X here too, since the @foo:%return etc. are not in the list either. Or we don't need to use X in test3.

[nickdesaulniers]

• rebase onto D115688

[nickdesaulniers]

llvm/test/tools/llvm-diff/callbr.ll

28–29

The "indirect destination list" for the callbr in @bar is the [label %return, label %t_no]. Both operands have corresponding blockaddress arguments. So they should not use X in this case.

[jyknight]

llvm/test/tools/llvm-diff/callbr.ll

28–29

I don't see why the correct constraint to use should be related at all to whether the blockaddress argument corresponds to a label in the indirect label list or not.

Using something other than "X" should probably always be preferred, since presumably the instruction you're emitting has requirements. (Unless of course you don't actually use the argument, or only use it in a comment, or something like that...in which case "X" is fine.)

But, FTR, in this test, the blockaddress is for a label in a different function ("@foo") than the function we're in ("@bar"), which is what pengfei was pointing out.

[nickdesaulniers]

llvm/test/tools/llvm-diff/callbr.ll

28–29

I don't see why the correct constraint to use should be related at all to whether the blockaddress argument corresponds to a label in the indirect label list or not.
Using something other than "X" should probably always be preferred

Note: child patch D115311 only changes the goto label list for asm goto; it does not change labels in the input list.

But, FTR, in this test, the blockaddress is for a label in a different function ("@foo") than the function we're in ("@bar"), which is what pengfei was pointing out.

Ah, I missed that. @void can you clarify; @bar looks exactly like @foo to me; was @bar copy-pasted from @foo without the blockaddresses being updated to refer to @bar? I don't really understand the intent of this test; I don't understand why llvm-diff has output for @bar but not @foo. If there's a difference, I'm having trouble spotting it.

[void]

Approved with one change.

llvm/test/tools/llvm-diff/callbr.ll

28–29

It's a copy-and-paste error, and I'm not sure how it could have worked, given that LLVM's tools should abort when it sees the bad blockaddress. IOW, it should be @bar.

[nickdesaulniers]

llvm/test/tools/llvm-diff/callbr.ll

28–29

I'm not sure how it could have worked, given that LLVM's tools should abort when it sees the bad blockaddress

The function referred to in the blockaddress does not need to be scoped to the same function; otherwise I don't think you could store the address of a label in a global variable (without shenanigans like converting it to a integer).

IOW, it should be @bar.

diff --git a/llvm/test/tools/llvm-diff/callbr.ll b/llvm/test/tools/llvm-diff/callbr.ll
index f925606c11cf..8a26f3529d43 100644
--- a/llvm/test/tools/llvm-diff/callbr.ll
+++ b/llvm/test/tools/llvm-diff/callbr.ll
@@ -25,7 +25,7 @@ return:
 
 define void @bar() {
 entry:
-  callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %t_no), i8* blockaddress(@foo, %return))
+  callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@bar, %t_no), i8* blockaddress(@bar, %return))
           to label %asm.fallthrough [label %return, label %t_no]
 
 asm.fallthrough:

causes the test to fail as there's no output from llvm-diff to input to FileCheck. What was the original intent of llvm/test/tools/llvm-diff/callbr.ll?

llvm/test/Assembler/call-arg-is-callee.ll

exception:
   landingpad { i8*, i32 } cleanup
   ret void
 }
 
 ; Check order for callbr instruction. Cannot reuse labels in the test since the
 ; verifier prevents duplicating callbr destinations.
 define void @callbr() {
 entry:
-  callbr i32 asm "", "=r,r,X,X"(i32 0,
+  callbr i32 asm "", "=r,r,i,i"(i32 0,
                                 i8 *blockaddress(@callbr, %two),
                                 i8 *blockaddress(@callbr, %three))
               to label %one [label %two, label %three]
 one:
   ret void
 two:
   ret void
 three:
   ret void
 }

llvm/test/Bitcode/callbr.ll

 ; RUN:  llvm-dis < %s.bc | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED
 ; callbr.ll.bc was generated by passing this file to llvm-as.
 
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED
 ; RUN: llvm-as -opaque-pointers < %s | llvm-dis -opaque-pointers | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE
 
 define i32 @test_asm_goto(i32 %x){
 entry:
-; CHECK-TYPED:      callbr void asm "", "r,X"(i32 %x, i8* blockaddress(@test_asm_goto, %fail))
-; CHECK-OPAQUE:     callbr void asm "", "r,X"(i32 %x, ptr blockaddress(@test_asm_goto, %fail))
+; CHECK-TYPED:      callbr void asm "", "r,i"(i32 %x, i8* blockaddress(@test_asm_goto, %fail))
+; CHECK-OPAQUE:     callbr void asm "", "r,i"(i32 %x, ptr blockaddress(@test_asm_goto, %fail))
 ; CHECK-NEXT: to label %normal [label %fail]
-  callbr void asm "", "r,X"(i32 %x, i8* blockaddress(@test_asm_goto, %fail)) to label %normal [label %fail]
+  callbr void asm "", "r,i"(i32 %x, i8* blockaddress(@test_asm_goto, %fail)) to label %normal [label %fail]
 normal:
   ret i32 1
 fail:
   ret i32 0
 }

llvm/test/CodeGen/AArch64/callbr-asm-label.ll

 ; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
 
 @X = common local_unnamed_addr global i32 0, align 4
 
 define i32 @test1() {
 ; CHECK-LABEL: test1:
 ; CHECK:         .word b
 ; CHECK-NEXT:    .word .Ltmp0
 ; CHECK: // %bb.1:
 ; CHECK: .Ltmp0:
 ; CHECK: .LBB0_2: // %indirect
 entry:
-  callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "X"(i8* blockaddress(@test1, %indirect))
+  callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "i"(i8* blockaddress(@test1, %indirect))
           to label %cleanup [label %indirect]
 
 indirect:
   br label %cleanup
 
 cleanup:
   %retval.0 = phi i32 [ 1, %indirect ], [ 0, %entry ]
   ret i32 %retval.0
 }
 
 define void @test2() {
 ; CHECK-LABEL: test2:
 entry:
   %0 = load i32, i32* @X, align 4
   %and = and i32 %0, 1
   %tobool = icmp eq i32 %and, 0
   br i1 %tobool, label %if.end10, label %if.then
 
 if.then:
 ; CHECK:       .word b
 ; CHECK-NEXT:  .word .Ltmp2
 ; CHECK:       .Ltmp2:
 ; CHECK-NEXT:  .LBB1_3: // %if.end6
-  callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "X"(i8* blockaddress(@test2, %if.end6))
+  callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "i"(i8* blockaddress(@test2, %if.end6))
           to label %if.then4 [label %if.end6]
 
 if.then4:
   %call5 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   br label %if.end6
 
 if.end6:
   %.pre = load i32, i32* @X, align 4
   %.pre13 = and i32 %.pre, 1
   %phitmp = icmp eq i32 %.pre13, 0
   br i1 %phitmp, label %if.end10, label %if.then9
 
 if.then9:
 ; CHECK: .Ltmp4:
 ; CHECK-NEXT:  .LBB1_5: // %l_yes
-  callbr void asm sideeffect "", "X"(i8* blockaddress(@test2, %l_yes))
+  callbr void asm sideeffect "", "i"(i8* blockaddress(@test2, %l_yes))
           to label %if.end10 [label %l_yes]
 
 if.end10:
   br label %l_yes
 
 l_yes:
   ret void
 }
 
 declare i32 @g(...)

llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll

 ; CHECK-NEXT:    ldr x30, [sp], #16
 ; CHECK-NEXT:    ret
 define hidden i32 @test1() {
   %1 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   %2 = icmp eq i32 %1, 0
   br i1 %2, label %3, label %5
 
 3:                                                ; preds = %0
-  callbr void asm sideeffect "1: nop\0A\09.quad a\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,X"(i32* null, i8* blockaddress(@test1, %7))
+  callbr void asm sideeffect "1: nop\0A\09.quad a\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,i"(i32* null, i8* blockaddress(@test1, %7))
           to label %4 [label %7]
 
 4:                                                ; preds = %3
   br label %7
 
 5:                                                ; preds = %0
   %6 = tail call i32 bitcast (i32 (...)* @i to i32 ()*)()
   br label %7
define hidden i32 @test2() local_unnamed_addr {
   br i1 %2, label %10, label %3
 
 3:                                                ; preds = %0
   %4 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   %5 = icmp eq i32 %4, 0
   br i1 %5, label %6, label %7
 
 6:                                                ; preds = %3
-  callbr void asm sideeffect "1: nop\0A\09.quad b\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,X"(i32* null, i8* blockaddress(@test2, %7))
+  callbr void asm sideeffect "1: nop\0A\09.quad b\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,i"(i32* null, i8* blockaddress(@test2, %7))
           to label %10 [label %7]
 
 7:                                                ; preds = %3
   %8 = tail call i32 bitcast (i32 (...)* @i to i32 ()*)()
   br label %10
 
 9:                                                ; preds = %6
   br label %10

 ; CHECK-NEXT:    ldr x30, [sp], #16
 ; CHECK-NEXT:    ret
 define internal i1 @test3() {
   %1 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   %2 = icmp eq i32 %1, 0
   br i1 %2, label %3, label %5
 
 3:                                                ; preds = %0
-  callbr void asm sideeffect "1: nop\0A\09.quad c\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,X"(i32* null, i8* blockaddress(@test3, %8))
+  callbr void asm sideeffect "1: nop\0A\09.quad c\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,i"(i32* null, i8* blockaddress(@test3, %8))
           to label %4 [label %8]
 
 4:                                                ; preds = %3
   br label %8
 
 5:                                                ; preds = %0
   %6 = tail call i32 bitcast (i32 (...)* @i to i32 ()*)()
   %7 = icmp ne i32 %6, 0
   br label %8
 
 8:                                                ; preds = %3, %4, %5
   %9 = phi i1 [ %7, %5 ], [ false, %4 ], [ false, %3 ]
   ret i1 %9
 }

llvm/test/CodeGen/AArch64/speculation-hardening-sls.ll

 ; SB-NEXT:     {{ sb$}}
 ; CHECK-NEXT: .Lfunc_end
     ret i32 %a
 }
 
 define i32 @asmgoto() {
 entry:
 ; CHECK-LABEL: asmgoto:
-  callbr void asm sideeffect "B $0", "X"(i8* blockaddress(@asmgoto, %d))
+  callbr void asm sideeffect "B $0", "i"(i8* blockaddress(@asmgoto, %d))
             to label %asm.fallthrough [label %d]
      ; The asm goto above produces a direct branch:
 ; CHECK:           //APP
 ; CHECK-NEXT:      {{^[ \t]+b }}
 ; CHECK-NEXT:      //NO_APP
      ; For direct branches, no mitigation is needed.
 ; ISDDSB-NOT: dsb sy
 ; SB-NOT:     {{ sb$}}

llvm/test/CodeGen/ARM/speculation-hardening-sls.ll

 ; ISBDSB-NEXT: isb
 ; SB-NEXT:     {{ sb$}}
 ; CHECK-NEXT: .Lfunc_end
 }
 
 define i32 @asmgoto() {
 entry:
 ; CHECK-LABEL: asmgoto:
-  callbr void asm sideeffect "B $0", "X"(i8* blockaddress(@asmgoto, %d))
+  callbr void asm sideeffect "B $0", "i"(i8* blockaddress(@asmgoto, %d))
             to label %asm.fallthrough [label %d]
      ; The asm goto above produces a direct branch:
 ; CHECK:           @APP
 ; CHECK-NEXT:      {{^[ \t]+b }}
 ; CHECK-NEXT:      @NO_APP
      ; For direct branches, no mitigation is needed.
 ; ISDDSB-NOT: dsb sy
 ; SB-NOT:     {{ sb$}}

llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll

 ; PPC64BE-NEXT:    ld r0, 16(r1)
 ; PPC64BE-NEXT:    mtlr r0
 ; PPC64BE-NEXT:    blr
 ; PPC64BE-NEXT:  .Ltmp0: # Block address taken
 ; PPC64BE-NEXT:  .LBB3_2: # %return_early
 ; PPC64BE-NEXT:    li r3, 0
 ; PPC64BE-NEXT:    b .LBB3_1
 entry:
-  callbr void asm sideeffect "nop", "X,~{lr}"(i8* blockaddress(@ClobberLR_BR, %return_early))
+  callbr void asm sideeffect "nop", "i,~{lr}"(i8* blockaddress(@ClobberLR_BR, %return_early))
           to label %return [label %return_early]
 
 return_early:
   br label %return
 
 return:
   %retval.0 = phi i32 [ 0, %return_early ], [ %in, %entry ]
   ret i32 %retval.0

 ; PPC64BE-NEXT:    extsw r3, r3
 ; PPC64BE-NEXT:    blr
 ; PPC64BE-NEXT:  .Ltmp1: # Block address taken
 ; PPC64BE-NEXT:  .LBB4_2: # %return_early
 ; PPC64BE-NEXT:    li r3, 0
 ; PPC64BE-NEXT:    extsw r3, r3
 ; PPC64BE-NEXT:    blr
 entry:
-  callbr void asm sideeffect "nop", "X,~{r5}"(i8* blockaddress(@ClobberR5_BR, %return_early))
+  callbr void asm sideeffect "nop", "i,~{r5}"(i8* blockaddress(@ClobberR5_BR, %return_early))
           to label %return [label %return_early]
 
 return_early:
   br label %return
 
 return:
   %retval.0 = phi i32 [ 0, %return_early ], [ %in, %entry ]
   ret i32 %retval.0

llvm/test/CodeGen/SystemZ/asm-20.ll

 ; Test that asm goto can be compiled.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14
 
 define i32 @c() {
 entry:
-  callbr void asm sideeffect "j d", "X"(i8* blockaddress(@c, %d))
+  callbr void asm sideeffect "j d", "i"(i8* blockaddress(@c, %d))
           to label %asm.fallthrough [label %d]
 
 asm.fallthrough:               ; preds = %entry
   br label %d
 
 d:                             ; preds = %asm.fallthrough, %entry
   ret i32 undef
 }

llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll

 ; CHECK-NEXT: t22: ch,glue = CopyToReg t17, Register:i32 %5, t8
 ; CHECK-NEXT: t30: ch,glue = inlineasm_br t22, TargetExternalSymbol:i64'xorl $0, $0; jmp ${1:l}', MDNode:ch<null>, TargetConstant:i64<8>, TargetConstant:i32<2293769>, Register:i32 %5, TargetConstant:i64<13>, TargetBlockAddress:i64<@test, %fail> 0, TargetConstant:i32<12>, Register:i32 $df, TargetConstant:i32<12>, Register:i16 $fpsw, TargetConstant:i32<12>, Register:i32 $eflags, t22:1
 
 define i32 @test(i32 %a, i32 %b, i32 %c) {
 entry:
   %0 = add i32 %a, 4
   %1 = add i32 %b, 1
   %2 = add i32 %c, 1
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test, %fail)) to label %normal [label %fail]
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test, %fail)) to label %normal [label %fail]
 
 normal:
   ret i32 %1
 
 fail:
   ret i32 %2
 }

llvm/test/CodeGen/X86/callbr-asm-blockplacement.ll

bb8:                                              ; preds = %bb8, %bb5
   %tmp13 = add i64 undef, -2305847407260205056
   call void @hoge(i64 %tmp12)
   %tmp14 = icmp eq i32 0, 0
   br i1 %tmp14, label %bb15, label %bb8
 
 bb15:                                             ; preds = %bb8
   %tmp16 = getelementptr [0 x %struct.wibble], [0 x %struct.wibble]* @global, i64 0, i64 %tmp4, i32 2
   store i8* %tmp9, i8** %tmp16
-  callbr void asm sideeffect "", "X"(i8* blockaddress(@foo, %bb18))
+  callbr void asm sideeffect "", "i"(i8* blockaddress(@foo, %bb18))
           to label %bb17 [label %bb18]
 
 bb17:                                             ; preds = %bb15
   call void @widget()
   br label %bb18
 
 bb18:                                             ; preds = %bb17, %bb15, %bb
   %tmp19 = add i64 %tmp, 14

llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll

if.end8:                                          ; preds = %r, %if.end
   %tobool10 = icmp eq i32 %call, 0
   br i1 %tobool10, label %if.end12, label %r
 
 if.end12:                                         ; preds = %if.end8
   %tobool13 = icmp eq i32 %or, 0
   br i1 %tobool13, label %if.else, label %if.then14
 
 if.then14:                                        ; preds = %if.end12
-  callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@n, %if.then20.critedge))
+  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@n, %if.then20.critedge))
           to label %cleanup [label %if.then20.critedge]
 
 if.then20.critedge:                               ; preds = %if.then14
   %1 = load i32, i32* @j
   %conv21 = sext i32 %u to i64
   %call22 = tail call i32 @k(i32 %1, i64 1, i32* %o, i64 %conv21)
   br label %cleanup
 

llvm/test/CodeGen/X86/callbr-asm-destinations.ll

 ; RUN: not llc -mtriple=i686-- < %s 2> %t
 ; RUN: FileCheck %s < %t
 
 ; CHECK: Duplicate callbr destination
 
 ; A test for asm-goto duplicate labels limitation
 
 define i32 @test(i32 %a) {
 entry:
   %0 = add i32 %a, 4
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test, %fail)) to label %fail [label %fail]
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test, %fail)) to label %fail [label %fail]
 
 fail:
   ret i32 1
 }

llvm/test/CodeGen/X86/callbr-asm-errors.ll

 ; RUN: not llc -mtriple=i686-- < %s 2> %t
 ; RUN: FileCheck %s < %t
 
 ; CHECK: Duplicate callbr destination
 
 ; A test for asm-goto duplicate labels limitation
 
 define i32 @test(i32 %a) {
 entry:
   %0 = add i32 %a, 4
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,X,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test, %fail), i8* blockaddress(@test, %fail)) to label %normal [label %fail, label %fail]
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test, %fail), i8* blockaddress(@test, %fail)) to label %normal [label %fail, label %fail]
 
 normal:
   ret i32 %0
 
 fail:
   ret i32 1
 }

llvm/test/CodeGen/X86/callbr-asm-instr-scheduling.ll

entry:
   %1 = load i64, i64* @page_offset_base, align 8
   %add = add i64 %and.i, %1
   %2 = inttoptr i64 %add to %struct.pgd_t*
   %3 = load i32, i32* @pgdir_shift, align 4
   %sh_prom = zext i32 %3 to i64
   %shr = lshr i64 %addr, %sh_prom
   %and = and i64 %shr, 511
   %arrayidx = getelementptr %struct.pgd_t, %struct.pgd_t* %2, i64 %and
-  callbr void asm sideeffect "1: jmp 6f\0A2:\0A.skip -(((5f-4f) - (2b-1b)) > 0) * ((5f-4f) - (2b-1b)),0x90\0A3:\0A.section .altinstructions,\22a\22\0A .long 1b - .\0A .long 4f - .\0A .word ${1:P}\0A .byte 3b - 1b\0A .byte 5f - 4f\0A .byte 3b - 2b\0A.previous\0A.section .altinstr_replacement,\22ax\22\0A4: jmp ${5:l}\0A5:\0A.previous\0A.section .altinstructions,\22a\22\0A .long 1b - .\0A .long 0\0A .word ${0:P}\0A .byte 3b - 1b\0A .byte 0\0A .byte 0\0A.previous\0A.section .altinstr_aux,\22ax\22\0A6:\0A testb $2,$3\0A jnz ${4:l}\0A jmp ${5:l}\0A.previous\0A", "i,i,i,*m,X,X,~{dirflag},~{fpsr},~{flags}"(i16 528, i32 117, i32 1, i8* elementtype(i8) getelementptr inbounds (%struct.cpuinfo_x86, %struct.cpuinfo_x86* @boot_cpu_data, i64 0, i32 12, i32 1, i64 58), i8* blockaddress(@early_ioremap_pmd, %if.end.i), i8* blockaddress(@early_ioremap_pmd, %if.then.i))
+  callbr void asm sideeffect "1: jmp 6f\0A2:\0A.skip -(((5f-4f) - (2b-1b)) > 0) * ((5f-4f) - (2b-1b)),0x90\0A3:\0A.section .altinstructions,\22a\22\0A .long 1b - .\0A .long 4f - .\0A .word ${1:P}\0A .byte 3b - 1b\0A .byte 5f - 4f\0A .byte 3b - 2b\0A.previous\0A.section .altinstr_replacement,\22ax\22\0A4: jmp ${5:l}\0A5:\0A.previous\0A.section .altinstructions,\22a\22\0A .long 1b - .\0A .long 0\0A .word ${0:P}\0A .byte 3b - 1b\0A .byte 0\0A .byte 0\0A.previous\0A.section .altinstr_aux,\22ax\22\0A6:\0A testb $2,$3\0A jnz ${4:l}\0A jmp ${5:l}\0A.previous\0A", "i,i,i,*m,i,i,~{dirflag},~{fpsr},~{flags}"(i16 528, i32 117, i32 1, i8* elementtype(i8) getelementptr inbounds (%struct.cpuinfo_x86, %struct.cpuinfo_x86* @boot_cpu_data, i64 0, i32 12, i32 1, i64 58), i8* blockaddress(@early_ioremap_pmd, %if.end.i), i8* blockaddress(@early_ioremap_pmd, %if.then.i))
           to label %_static_cpu_has.exit.thread.i [label %if.end.i, label %if.then.i]
 
 _static_cpu_has.exit.thread.i:                    ; preds = %entry
   br label %if.end.i
 
 if.then.i:                                        ; preds = %entry
   %4 = bitcast %struct.pgd_t* %arrayidx to %struct.p4d_t*
   br label %p4d_offset.exit

llvm/test/CodeGen/X86/callbr-asm-kill.mir

--- |
   define void @test1(i8* %arg, i8** %mem) #0 {
   entry:
     br label %loop
 
   loop:                                             ; preds = %loop, %entry
     %a = phi i8* [ %arg, %entry ], [ %b, %loop ]
     %b = load i8*, i8** %mem, align 8
     call void @foo(i8* %a)
-    callbr void asm sideeffect "", "*m,X"(i8* elementtype(i8) %b, i8* blockaddress(@test1, %loop))
+    callbr void asm sideeffect "", "*m,i"(i8* elementtype(i8) %b, i8* blockaddress(@test1, %loop))
             to label %end [label %loop]
 
   end:                                              ; preds = %loop
     ret void
   }
 
   attributes #0 = { nounwind }
 

llvm/test/CodeGen/X86/callbr-asm-label-addr.ll

 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
 
 define i32 @test1(i32 %x) {
 ; CHECK-LABEL: test1:
 ; CHECK:         .quad .Ltmp0
 ; CHECK-NEXT:    .quad .Ltmp1
 ; CHECK: .Ltmp1:
 ; CHECK-NEXT: # %bb.1: # %bar
 ; CHECK-NEXT:    callq foo
 ; CHECK-NEXT: .Ltmp0:
 ; CHECK-NEXT:  # %bb.2: # %baz
 entry:
-  callbr void asm sideeffect ".quad ${0:l}\0A\09.quad ${1:l}", "i,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %baz), i8* blockaddress(@test1, %bar))
+  callbr void asm sideeffect ".quad ${0:l}\0A\09.quad ${1:l}", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %baz), i8* blockaddress(@test1, %bar))
           to label %asm.fallthrough [label %bar]
 
 asm.fallthrough:
   br label %bar
 
 bar:
   %call = tail call i32 @foo(i32 %x)
   br label %baz

llvm/test/CodeGen/X86/callbr-asm-obj-file.ll

 ; RUN: llc < %s -mtriple=x86_64-linux-gnu -filetype=obj -o - \
 ; RUN:  | llvm-objdump --triple=x86_64-linux-gnu -d - \
 ; RUN:  | FileCheck %s
 
 ; CHECK: 0000000000000000 <test1>:
 ; CHECK-NEXT:   0: 74 00 je 0x2 <test1+0x2>
 ; CHECK-NEXT:   2: c3    retq
 
 define void @test1() {
 entry:
-  callbr void asm sideeffect "je ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %a.b.normal.jump))
+  callbr void asm sideeffect "je ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %a.b.normal.jump))
           to label %asm.fallthrough [label %a.b.normal.jump]
 
 asm.fallthrough:
   ret void
 
 a.b.normal.jump:
   ret void
 }

llvm/test/CodeGen/X86/callbr-asm-outputs-pred-succ.ll

 
 @.str = private unnamed_addr constant [26 x i8] c"inline asm#1 returned %d\0A\00", align 1
 @.str.2 = private unnamed_addr constant [26 x i8] c"inline asm#2 returned %d\0A\00", align 1
 @str = private unnamed_addr constant [30 x i8] c"inline asm#1 caused exception\00", align 1
 @str.4 = private unnamed_addr constant [30 x i8] c"inline asm#2 caused exception\00", align 1
 
 ; Function Attrs: nounwind uwtable
 define dso_local i32 @main(i32 %0, i8** nocapture readnone %1) #0 {
-  %3 = callbr i32 asm "jmp ${1:l}", "=r,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@main, %11)) #3
+  %3 = callbr i32 asm "jmp ${1:l}", "=r,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@main, %11)) #3
           to label %4 [label %11]
 
 4:                                                ; preds = %2
   %5 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %3)
-  %6 = callbr i32 asm "jmp ${1:l}", "=r,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@main, %7)) #3
+  %6 = callbr i32 asm "jmp ${1:l}", "=r,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@main, %7)) #3
           to label %9 [label %7]
 
 7:                                                ; preds = %4
   %8 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str.4, i64 0, i64 0))
   br label %13
 
 9:                                                ; preds = %4
   %10 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0), i32 %6)

llvm/test/CodeGen/X86/callbr-asm-outputs.ll

 ; CHECK-NEXT:  # %bb.1: # %normal
 ; CHECK-NEXT:    retl
 ; CHECK-NEXT:  .Ltmp0: # Block address taken
 ; CHECK-NEXT:  .LBB0_2: # %abnormal
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    retl
 entry:
   %add = add nsw i32 %x, 4
-  %ret = callbr i32 asm "xorl $1, $0; jmp ${2:l}", "=r,r,X,~{dirflag},~{fpsr},~{flags}"(i32 %add, i8* blockaddress(@test1, %abnormal))
+  %ret = callbr i32 asm "xorl $1, $0; jmp ${2:l}", "=r,r,i,~{dirflag},~{fpsr},~{flags}"(i32 %add, i8* blockaddress(@test1, %abnormal))
           to label %normal [label %abnormal]
 
 normal:
   ret i32 %ret
 
 abnormal:
   ret i32 1
 }

 ; CHECK-NEXT:    .cfi_def_cfa_offset 12
 ; CHECK-NEXT:    movl $-2, %eax
 ; CHECK-NEXT:    jmp .LBB1_5
 entry:
   %cmp = icmp slt i32 %out1, %out2
   br i1 %cmp, label %if.then, label %if.else
 
 if.then:                                          ; preds = %entry
-  %0 = callbr { i32, i32 } asm sideeffect "testl $0, $0; testl $1, $2; jne ${3:l}", "={si},={di},r,X,X,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i8* blockaddress(@test2, %label_true), i8* blockaddress(@test2, %return), i32 %out1, i32 %out2)
+  %0 = callbr { i32, i32 } asm sideeffect "testl $0, $0; testl $1, $2; jne ${3:l}", "={si},={di},r,i,i,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i8* blockaddress(@test2, %label_true), i8* blockaddress(@test2, %return), i32 %out1, i32 %out2)
           to label %if.end [label %label_true, label %return]
 
 if.else:                                          ; preds = %entry
-  %1 = callbr { i32, i32 } asm sideeffect "testl $0, $1; testl $2, $3; jne ${5:l}", "={si},={di},r,r,X,X,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i32 %out2, i8* blockaddress(@test2, %label_true), i8* blockaddress(@test2, %return), i32 %out1, i32 %out2)
+  %1 = callbr { i32, i32 } asm sideeffect "testl $0, $1; testl $2, $3; jne ${5:l}", "={si},={di},r,r,i,i,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i32 %out2, i8* blockaddress(@test2, %label_true), i8* blockaddress(@test2, %return), i32 %out1, i32 %out2)
           to label %if.end [label %label_true, label %return]
 
 if.end:                                           ; preds = %if.else, %if.then
   %.sink11 = phi { i32, i32 } [ %0, %if.then ], [ %1, %if.else ]
   %asmresult3 = extractvalue { i32, i32 } %.sink11, 0
   %asmresult4 = extractvalue { i32, i32 } %.sink11, 1
   %add = add nsw i32 %asmresult4, %asmresult3
   br label %return

 ; CHECK-NEXT:  .LBB2_6: # %indirect
 ; CHECK-NEXT:    .cfi_def_cfa_offset 12
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:    jmp .LBB2_5
 entry:
   br i1 %cmp, label %true, label %false
 
 true:
-  %0 = callbr { i32, i32 } asm sideeffect ".word $0, $1", "={si},={di},X" (i8* blockaddress(@test3, %indirect)) to label %asm.fallthrough [label %indirect]
+  %0 = callbr { i32, i32 } asm sideeffect ".word $0, $1", "={si},={di},i" (i8* blockaddress(@test3, %indirect)) to label %asm.fallthrough [label %indirect]
 
 false:
-  %1 = callbr { i32, i32 } asm sideeffect ".word $0, $1", "={ax},={dx},X" (i8* blockaddress(@test3, %indirect)) to label %asm.fallthrough [label %indirect]
+  %1 = callbr { i32, i32 } asm sideeffect ".word $0, $1", "={ax},={dx},i" (i8* blockaddress(@test3, %indirect)) to label %asm.fallthrough [label %indirect]
 
 asm.fallthrough:
   %vals = phi { i32, i32 } [ %0, %true ], [ %1, %false ]
   %v = extractvalue { i32, i32 } %vals, 1
   ret i32 %v
 
 indirect:
   ret i32 42

 ; CHECK-NEXT:    retl
 ; CHECK-NEXT:  .Ltmp4: # Block address taken
 ; CHECK-NEXT:  .LBB3_3: # %label_true
 ; CHECK-NEXT:    movl $-2, %eax
 ; CHECK-NEXT:  .Ltmp5: # Block address taken
 ; CHECK-NEXT:  .LBB3_4: # %return
 ; CHECK-NEXT:    retl
 entry:
-  %0 = callbr { i32, i32 } asm sideeffect "testl $0, $0; testl $1, $2; jne ${3:l}", "=r,=r,r,X,X,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i8* blockaddress(@test4, %label_true), i8* blockaddress(@test4, %return))
+  %0 = callbr { i32, i32 } asm sideeffect "testl $0, $0; testl $1, $2; jne ${3:l}", "=r,=r,r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i8* blockaddress(@test4, %label_true), i8* blockaddress(@test4, %return))
           to label %asm.fallthrough [label %label_true, label %return]
 
 asm.fallthrough:                                  ; preds = %entry
   %asmresult = extractvalue { i32, i32 } %0, 0
   %asmresult1 = extractvalue { i32, i32 } %0, 1
-  %1 = callbr { i32, i32 } asm sideeffect "testl $0, $1; testl $2, $3; jne ${5:l}", "=r,=r,r,r,X,X,~{dirflag},~{fpsr},~{flags}"(i32 %asmresult, i32 %asmresult1, i8* blockaddress(@test4, %label_true), i8* blockaddress(@test4, %return))
+  %1 = callbr { i32, i32 } asm sideeffect "testl $0, $1; testl $2, $3; jne ${5:l}", "=r,=r,r,r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %asmresult, i32 %asmresult1, i8* blockaddress(@test4, %label_true), i8* blockaddress(@test4, %return))
           to label %asm.fallthrough2 [label %label_true, label %return]
 
 asm.fallthrough2:                                 ; preds = %asm.fallthrough
   %asmresult3 = extractvalue { i32, i32 } %1, 0
   %asmresult4 = extractvalue { i32, i32 } %1, 1
   %add = add nsw i32 %asmresult3, %asmresult4
   br label %return
 

llvm/test/CodeGen/X86/callbr-asm-phi-placement.ll

 ; CHECK-NEXT:    retq
 entry:
   br label %loop
 
 loop:
   %a = phi i8* [ %arg, %entry ], [ %b, %loop ]
   %b = load i8*, i8** %mem, align 8
   call void @foo(i8* %a)
-  callbr void asm sideeffect "", "*m,X"(i8* elementtype(i8) %b, i8* blockaddress(@test1, %loop))
+  callbr void asm sideeffect "", "*m,i"(i8* elementtype(i8) %b, i8* blockaddress(@test1, %loop))
           to label %end [label %loop]
 
 end:
   ret void
 }

llvm/test/CodeGen/X86/callbr-asm-sink.ll

 ; CHECK-NEXT:    #NO_APP
 ; CHECK-NEXT:  # %bb.2:
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:  .Ltmp0: # Block address taken
 ; CHECK-NEXT:  .LBB0_1:
 ; CHECK-NEXT:    movq $0, -8(%rax)
 ; CHECK-NEXT:    retq
   %2 = getelementptr inbounds %struct1, %struct1* %0, i64 0, i32 1
-  callbr void asm sideeffect "# $0 $1", "*m,X,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %2, i8* blockaddress(@klist_dec_and_del, %3))
+  callbr void asm sideeffect "# $0 $1", "*m,i,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %2, i8* blockaddress(@klist_dec_and_del, %3))
           to label %6 [label %3]
 
 3:
   %4 = getelementptr i32, i32* %2, i64 -2
   %5 = bitcast i32* %4 to i8**
   store i8* null, i8** %5, align 8
   br label %6
 
 6:
   ret void
 }

llvm/test/CodeGen/X86/callbr-asm.ll

 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    retl
 ; CHECK-NEXT:  .Ltmp0: # Block address taken
 ; CHECK-NEXT:  .LBB0_2: # %fail
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    retl
 entry:
   %0 = add i32 %a, 4
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test1, %fail)) to label %normal [label %fail]
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test1, %fail)) to label %normal [label %fail]
 
 normal:
   ret i32 0
 
 fail:
   ret i32 1
 }
 

 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    retl
 ; CHECK-NEXT:  .Ltmp1: # Block address taken
 ; CHECK-NEXT:  .LBB1_2: # %fail
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    retl
 entry:
   %0 = add i32 %a, 4
-  callbr void asm inteldialect "xor $0, $0; jmp ${1:l}", "r,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test1b, %fail)) to label %normal [label %fail]
+  callbr void asm inteldialect "xor $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test1b, %fail)) to label %normal [label %fail]
 
 normal:
   ret i32 0
 
 fail:
   ret i32 1
 }
 
 ; Test 2 - callbr terminates an unreachable block, function gets simplified
 ; to a trivial zero return.
 define i32 @test2(i32 %a) {
 ; CHECK-LABEL: test2:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    retl
 entry:
   br label %normal
 
 unreachableasm:
   %0 = add i32 %a, 4
-  callbr void asm sideeffect "xorl $0, $0; jmp ${1:l}", "r,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test2, %fail)) to label %normal [label %fail]
+  callbr void asm sideeffect "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@test2, %fail)) to label %normal [label %fail]
 
 normal:
   ret i32 0
 
 fail:
   ret i32 1
 }
 
label02:                                          ; preds = %normal0, %label04, %label01
   %add = add nsw i32 %0, 4
   store i32 %add, i32* %a.addr, align 4
   br label %label03
 
 label03:                                          ; preds = %normal0, %label04, %label02
   br label %label04
 
 label04:                                          ; preds = %normal0, %label03
-  callbr void asm sideeffect "jmp ${0:l}; jmp ${1:l}; jmp ${2:l}", "X,X,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test3, %label01), i8* blockaddress(@test3, %label02), i8* blockaddress(@test3, %label03))
+  callbr void asm sideeffect "jmp ${0:l}; jmp ${1:l}; jmp ${2:l}", "i,i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test3, %label01), i8* blockaddress(@test3, %label02), i8* blockaddress(@test3, %label03))
           to label %normal0 [label %label01, label %label02, label %label03]
 
 normal0:                                          ; preds = %label04
-  callbr void asm sideeffect "jmp ${0:l}; jmp ${1:l}; jmp ${2:l}; jmp ${3:l}", "X,X,X,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test3, %label01), i8* blockaddress(@test3, %label02), i8* blockaddress(@test3, %label03), i8* blockaddress(@test3, %label04))
+  callbr void asm sideeffect "jmp ${0:l}; jmp ${1:l}; jmp ${2:l}; jmp ${3:l}", "i,i,i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test3, %label01), i8* blockaddress(@test3, %label02), i8* blockaddress(@test3, %label03), i8* blockaddress(@test3, %label04))
           to label %normal1 [label %label01, label %label02, label %label03, label %label04]
 
 normal1:                                          ; preds = %normal0
   %1 = load i32, i32* %a.addr, align 4
   ret i32 %1
 }
 
 ; Test 4 - asm-goto referenced with the 'l' (ell) modifier and not.
 define void @test4() {
 ; CHECK-LABEL: test4:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    #APP
 ; CHECK-NEXT:    ja .Ltmp6
 ; CHECK-NEXT:    #NO_APP
 ; CHECK-NEXT:  # %bb.1: # %asm.fallthrough
 ; CHECK-NEXT:    #APP
 ; CHECK-NEXT:    ja .Ltmp6
 ; CHECK-NEXT:    #NO_APP
 ; CHECK-NEXT:  .Ltmp6: # Block address taken
 ; CHECK-NEXT:  .LBB4_3: # %quux
 ; CHECK-NEXT:    retl
 entry:
-  callbr void asm sideeffect "ja $0", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test4, %quux))
+  callbr void asm sideeffect "ja $0", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test4, %quux))
           to label %asm.fallthrough [label %quux]
 
 asm.fallthrough:                                  ; preds = %entry
-  callbr void asm sideeffect "ja ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test4, %quux))
+  callbr void asm sideeffect "ja ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test4, %quux))
           to label %cleanup [label %quux]
 
 quux:                                             ; preds = %asm.fallthrough, %entry
   br label %cleanup
 
 cleanup:                                          ; preds = %asm.fallthrough, %quux
   ret void
 }

llvm/test/CodeGen/X86/callbr-codegenprepare.ll

 ;; RUN: opt -S -codegenprepare < %s | FileCheck %s
 
 ;; Ensure that codegenprepare (via InstSimplify) doesn't eliminate the
 ;; phi here (which would cause a module verification error).
 
 ;; CHECK: phi
 
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 declare void @foo(i32)
 
 define dso_local i32 @futex_lock_pi_atomic() local_unnamed_addr {
 entry:
-  %0 = callbr i32 asm "", "=r,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@futex_lock_pi_atomic, %b.exit))
+  %0 = callbr i32 asm "", "=r,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@futex_lock_pi_atomic, %b.exit))
           to label %asm.fallthrough.i [label %b.exit]
 
 asm.fallthrough.i:
   br label %b.exit
 
 b.exit:
   %g.0 = phi i32 [ %0, %asm.fallthrough.i ], [ undef, %entry ]
   tail call void @foo(i32 %g.0)
   ret i32 undef
 }
 

llvm/test/CodeGen/X86/shrinkwrap-callbr.ll

entry:
   %tobool = icmp eq i32 %v, 0
   br i1 %tobool, label %ret0, label %if.end
 
 ret0:
   ret i32 0
 
 if.end:
   %call = tail call i32 @fn()
-  callbr void asm sideeffect "# jump to $0", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %two))
+  callbr void asm sideeffect "# jump to $0", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %two))
           to label %return [label %two]
 
 two:
   %call1 = tail call i32 @fn()
   br label %return
 
 return:
   %retval.1 = phi i32 [ %call1, %two ], [ 4, %if.end ]
   ret i32 %retval.1
 }

llvm/test/CodeGen/X86/tail-dup-asm-goto.ll

bb100:                                            ; preds = %bb
   br label %bb110
 
 bb106:                                            ; preds = %bb
   call void @foo()
   br label %bb110
 
 bb110:                                            ; preds = %bb106, %bb100
   %i10.1 = phi i8* [ %arg2, %bb106 ], [ %i28.i, %bb100 ]
-  callbr void asm sideeffect "#$0 $1 $2", "i,i,X,~{dirflag},~{fpsr},~{flags}"(i32 42, i1 false, i8* blockaddress(@test1, %bb17.i.i.i))
+  callbr void asm sideeffect "#$0 $1 $2", "i,i,i,~{dirflag},~{fpsr},~{flags}"(i32 42, i1 false, i8* blockaddress(@test1, %bb17.i.i.i))
           to label %kmem_cache_has_cpu_partial.exit [label %bb17.i.i.i]
 
 bb17.i.i.i:                                       ; preds = %bb110
   br label %kmem_cache_has_cpu_partial.exit
 
 kmem_cache_has_cpu_partial.exit:                  ; preds = %bb110
   ret i8* %i10.1
 }

llvm/test/Instrumentation/MemorySanitizer/msan_asm_conservative.ll

 ;    return 0;
 ;  skip_label:
 ;    return 1;
 ;  }
 ; asm goto statements can't have outputs, so just make sure we check the input
 ; and the compiler doesn't crash.
 define dso_local i32 @asm_goto(i32 %n) sanitize_memory {
 entry:
-  callbr void asm sideeffect "cmp $0, $1; jnz ${2:l}", "r,r,X,~{dirflag},~{fpsr},~{flags}"(i32 %n, i32 1, i8* blockaddress(@asm_goto, %skip_label))
+  callbr void asm sideeffect "cmp $0, $1; jnz ${2:l}", "r,r,i,~{dirflag},~{fpsr},~{flags}"(i32 %n, i32 1, i8* blockaddress(@asm_goto, %skip_label))
           to label %cleanup [label %skip_label]
 
 skip_label:                                       ; preds = %entry
   br label %cleanup
 
 cleanup:                                          ; preds = %entry, %skip_label
   %retval.0 = phi i32 [ 2, %skip_label ], [ 1, %entry ]
   ret i32 %retval.0
 }
 
 ; CHECK-LABEL: @asm_goto
 ; CHECK: [[LOAD_ARG:%.*]] = load {{.*}} %_msarg
 ; CHECK: [[CMP:%.*]] = icmp ne {{.*}} [[LOAD_ARG]], 0
 ; CHECK: br {{.*}} [[CMP]], label %[[LABEL:.*]], label
 ; CHECK: [[LABEL]]:
 ; CHECK-NEXT: call void @__msan_warning

llvm/test/Transforms/CallSiteSplitting/callsite-split-callbr.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -callsite-splitting -S -o - < %s | FileCheck %s
 
 ; Check that we can split the critical edge between Top and CallSiteBB, and
 ; rewrite the first callbr's indirect destination correctly.
 
 define void @caller() {
 ; CHECK-LABEL: @caller(
 ; CHECK-NEXT:  Top:
-; CHECK-NEXT:    callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@caller, [[TOP_SPLIT:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@caller, [[TOP_SPLIT:%.*]]))
 ; CHECK-NEXT:    to label [[NEXTCOND:%.*]] [label %Top.split]
 ; CHECK-LABEL: Top.split:
 ; CHECK-NEXT:    call void @callee(i1 false)
 ; CHECK-NEXT:    br label [[CALLSITEBB:%.*]]
 ; CHECK-LABEL: NextCond:
 ; CHECK-NEXT:    br label [[NEXTCOND_SPLIT:%.*]]
 ; CHECK-LABEL: NextCond.split:
 ; CHECK-NEXT:    call void @callee(i1 true)
 ; CHECK-NEXT:    br label [[CALLSITEBB]]
 ; CHECK-LABEL: CallSiteBB:
 ; CHECK-NEXT:    [[PHI:%.*]] = phi i1 [ false, [[TOP_SPLIT]] ], [ true, [[NEXTCOND_SPLIT]] ]
-; CHECK-NEXT:    callbr void asm sideeffect "", "r,X,~{dirflag},~{fpsr},~{flags}"(i1 [[PHI]], i8* blockaddress(@caller, [[END2:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "r,i,~{dirflag},~{fpsr},~{flags}"(i1 [[PHI]], i8* blockaddress(@caller, [[END2:%.*]]))
 ; CHECK-NEXT:    to label [[END:%.*]] [label %End2]
 ; CHECK-LABEL: End:
 ; CHECK-NEXT:    ret void
 ; CHECK-LABEL: End2:
 ; CHECK-NEXT:    ret void
 ;
 Top:
-  callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@caller, %CallSiteBB))
+  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@caller, %CallSiteBB))
   to label %NextCond [label %CallSiteBB]
 
 NextCond:
   br label %CallSiteBB
 
 CallSiteBB:
   %phi = phi i1 [0, %Top],[1, %NextCond]
   call void @callee(i1 %phi)
-  callbr void asm sideeffect "", "r,X,~{dirflag},~{fpsr},~{flags}"(i1 %phi, i8* blockaddress(@caller, %End2))
+  callbr void asm sideeffect "", "r,i,~{dirflag},~{fpsr},~{flags}"(i1 %phi, i8* blockaddress(@caller, %End2))
   to label %End [label %End2]
 
 End:
   ret void
 End2:
   ret void
 }
 
 define void @callee(i1 %b) {
 ; CHECK-LABEL: @callee(
 ; CHECK-NEXT:    ret void
 ;
   ret void
 }

llvm/test/Transforms/Coroutines/coro-debug.ll

 sw.default:                                       ; preds = %entry
   br label %coro_Suspend, !dbg !18
 
 sw.epilog:                                        ; preds = %sw.bb
   call void @llvm.dbg.declare(metadata i8* %new_storgae, metadata !31, metadata !13), !dbg !16
   %4 = load i32, i32* %x.addr, align 4, !dbg !20
   %add = add nsw i32 %4, 1, !dbg !21
   store i32 %add, i32* %x.addr, align 4, !dbg !22
-  %asm_res = callbr i32 asm "", "=r,r,X"(i32 %x, i8* blockaddress(@f, %indirect.dest))
+  %asm_res = callbr i32 asm "", "=r,r,i"(i32 %x, i8* blockaddress(@f, %indirect.dest))
           to label %coro_Cleanup [label %indirect.dest]
 
 indirect.dest:
   call void @log(), !dbg !18
   br label %coro_Cleanup
 
 coro_Cleanup:                                     ; preds = %sw.epilog, %sw.bb1
   %5 = load i8*, i8** %coro_hdl, align 8, !dbg !24

llvm/test/Transforms/GVN/callbr-loadpre-critedge.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -gvn -S | FileCheck %s
 
 ; This test checks that we don't hang trying to split a critical edge in loadpre
 ; when the control flow uses a callbr instruction.
 
 %struct.pluto = type <{ i8, i8 }>
 
 define void @widget(%struct.pluto** %tmp1) {
 ; CHECK-LABEL: @widget(
 ; CHECK-NEXT:  bb:
-; CHECK-NEXT:    callbr void asm sideeffect "", "X,X"(i8* blockaddress(@widget, [[BB5:%.*]]), i8* blockaddress(@widget, [[BB8:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "i,i"(i8* blockaddress(@widget, [[BB5:%.*]]), i8* blockaddress(@widget, [[BB8:%.*]]))
 ; CHECK-NEXT:    to label [[BB4:%.*]] [label [[BB5]], label %bb8]
 ; CHECK:       bb4:
 ; CHECK-NEXT:    br label [[BB5]]
 ; CHECK:       bb5:
 ; CHECK-NEXT:    [[TMP6:%.*]] = load %struct.pluto*, %struct.pluto** [[TMP1:%.*]]
 ; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_PLUTO:%.*]], %struct.pluto* [[TMP6]], i64 0, i32 1
 ; CHECK-NEXT:    br label [[BB8]]
 ; CHECK:       bb8:
 ; CHECK-NEXT:    [[TMP9:%.*]] = phi i8* [ [[TMP7]], [[BB5]] ], [ null, [[BB:%.*]] ]
 ; CHECK-NEXT:    [[TMP10:%.*]] = load %struct.pluto*, %struct.pluto** [[TMP1]]
 ; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_PLUTO]], %struct.pluto* [[TMP10]], i64 0, i32 0
 ; CHECK-NEXT:    [[TMP12:%.*]] = load i8, i8* [[TMP11]]
 ; CHECK-NEXT:    tail call void @spam(i8* [[TMP9]], i8 [[TMP12]])
 ; CHECK-NEXT:    ret void
 ;
 bb:
-  callbr void asm sideeffect "", "X,X"(i8* blockaddress(@widget, %bb5), i8* blockaddress(@widget, %bb8))
+  callbr void asm sideeffect "", "i,i"(i8* blockaddress(@widget, %bb5), i8* blockaddress(@widget, %bb8))
   to label %bb4 [label %bb5, label %bb8]
 
 bb4:                                              ; preds = %bb
   br label %bb5
 
 bb5:                                              ; preds = %bb4, %bb
   %tmp6 = load %struct.pluto*, %struct.pluto** %tmp1
   %tmp7 = getelementptr inbounds %struct.pluto, %struct.pluto* %tmp6, i64 0, i32 1

llvm/test/Transforms/GVN/callbr-scalarpre-critedge.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -gvn -S | FileCheck %s
 
 ; This test checks that we don't hang trying to split a critical edge in scalar
 ; PRE when the control flow uses a callbr instruction.
 
 define void @wombat(i64 %arg, i64* %arg1, i64 %arg2, i32* %arg3) {
 ; CHECK-LABEL: @wombat(
 ; CHECK-NEXT:  bb:
 ; CHECK-NEXT:    [[TMP5:%.*]] = or i64 [[ARG2:%.*]], [[ARG:%.*]]
-; CHECK-NEXT:    callbr void asm sideeffect "", "X,X"(i8* blockaddress(@wombat, [[BB7:%.*]]), i8* blockaddress(@wombat, [[BB9:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "i,i"(i8* blockaddress(@wombat, [[BB7:%.*]]), i8* blockaddress(@wombat, [[BB9:%.*]]))
 ; CHECK-NEXT:    to label [[BB6:%.*]] [label [[BB7]], label %bb9]
 ; CHECK:       bb6:
 ; CHECK-NEXT:    br label [[BB7]]
 ; CHECK:       bb7:
 ; CHECK-NEXT:    [[TMP8:%.*]] = trunc i64 [[TMP5]] to i32
 ; CHECK-NEXT:    tail call void @barney(i32 [[TMP8]])
 ; CHECK-NEXT:    br label [[BB9]]
 ; CHECK:       bb9:
 ; CHECK-NEXT:    [[TMP10:%.*]] = trunc i64 [[TMP5]] to i32
 ; CHECK-NEXT:    store i32 [[TMP10]], i32* [[ARG3:%.*]]
 ; CHECK-NEXT:    ret void
 ;
 bb:
   %tmp5 = or i64 %arg2, %arg
-  callbr void asm sideeffect "", "X,X"(i8* blockaddress(@wombat, %bb7), i8* blockaddress(@wombat, %bb9))
+  callbr void asm sideeffect "", "i,i"(i8* blockaddress(@wombat, %bb7), i8* blockaddress(@wombat, %bb9))
           to label %bb6 [label %bb7, label %bb9]
 
 bb6:                                              ; preds = %bb
   br label %bb7
 
 bb7:                                              ; preds = %bb6, %bb
   %tmp8 = trunc i64 %tmp5 to i32
   tail call void @barney(i32 %tmp8)

llvm/test/Transforms/GVN/critical-edge-split-failure.ll

 
 if.then:                                          ; preds = %for.cond
   %ns = bitcast %struct.sk_buff* %storemerge to i32*
   %3 = load i32, i32* %ns, align 4
   store i32 %3, i32* @l2tp_recv_dequeue_session_0, align 4
 ; Splitting the critical edge from if.then to if.end will fail, but should not
 ; cause an infinite loop in GVN. If we can one day split edges of callbr
 ; indirect targets, great!
-; CHECK: callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@l2tp_recv_dequeue, %if.end))
+; CHECK: callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@l2tp_recv_dequeue, %if.end))
 ; CHECK-NEXT: to label %asm.fallthrough.i [label %if.end]
-  callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@l2tp_recv_dequeue, %if.end))
+  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@l2tp_recv_dequeue, %if.end))
           to label %asm.fallthrough.i [label %if.end]
 
 asm.fallthrough.i:                                ; preds = %if.then
   br label %if.end
 
 if.end:                                           ; preds = %asm.fallthrough.i, %if.then, %for.cond
   %ns1 = bitcast %struct.sk_buff* %storemerge to i32*
   %4 = load i32, i32* %ns1, align 4
   %tobool2.not = icmp eq i32 %4, 0
   tail call void @llvm.assume(i1 %tobool2.not)
   br label %for.cond
 }
 

llvm/test/Transforms/IROutliner/illegal-callbr.ll

 ; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[B]], 1
 ; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[B]], 1
 ; CHECK-NEXT:    ret i32 0
 ;
 bb0:
   %0 = add i32 %a, 4
   %1 = add i32 %b, 1
   %2 = add i32 %b, 1
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@function1, %fail1)) to label %normal [label %fail1]
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@function1, %fail1)) to label %normal [label %fail1]
 normal:
   %3 = add i32 %b, 1
   %4 = add i32 %b, 1
   ret i32 0
 fail1:
   %5 = add i32 %b, 1
   %6 = add i32 %b, 1
   ret i32 0

 ; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[B]], 1
 ; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[B]], 1
 ; CHECK-NEXT:    ret i32 0
 ;
 bb0:
   %0 = add i32 %a, 4
   %1 = add i32 %b, 1
   %2 = add i32 %b, 1
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,X,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@function2, %fail1)) to label %normal [label %fail1]
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@function2, %fail1)) to label %normal [label %fail1]
 normal:
   %3 = add i32 %b, 1
   %4 = add i32 %b, 1
   ret i32 0
 fail1:
   %5 = add i32 %b, 1
   %6 = add i32 %b, 1
   ret i32 0
 }

llvm/test/Transforms/Inline/blockaddress.ll

 ; even if it contains a callbr. We might be able to relax this in the future
 ; as long as the global blockaddress is updated correctly.
 @ba = internal global i8* blockaddress(@foo, %7), align 8
 define internal i32 @foo(i32) {
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   store i32 %0, i32* %3, align 4
   %4 = load i32, i32* %3, align 4
-  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,X,X,~{dirflag},~{fpsr},~{flags}"(i32 %4, i8* blockaddress(@foo, %7), i8* blockaddress(@foo, %6)) #1
+  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %4, i8* blockaddress(@foo, %7), i8* blockaddress(@foo, %6)) #1
           to label %5 [label %7, label %6]
 
 ; <label>:5:                                      ; preds = %1
   store i32 0, i32* %2, align 4
   br label %8
 
 ; <label>:6:                                      ; preds = %1
   store i32 1, i32* %2, align 4

 
 @my_foo = dso_local global %struct.foo { i8* blockaddress(@baz, %7) }
 
 define internal i32 @baz(i32) {
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   store i32 %0, i32* %3, align 4
   %4 = load i32, i32* %3, align 4
-  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,X,X,~{dirflag},~{fpsr},~{flags}"(i32 %4, i8* blockaddress(@baz, %7), i8* blockaddress(@baz, %6)) #1
+  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %4, i8* blockaddress(@baz, %7), i8* blockaddress(@baz, %6)) #1
           to label %5 [label %7, label %6]
 
 ; <label>:5:                                      ; preds = %1
   store i32 0, i32* %2, align 4
   br label %8
 
 ; <label>:6:                                      ; preds = %1
   store i32 1, i32* %2, align 4

llvm/test/Transforms/Inline/callbr.ll

 ; RUN: opt -inline -S < %s | FileCheck %s
 ; RUN: opt -passes='cgscc(inline)' -S < %s | FileCheck %s
 ; RUN: opt -passes='module-inline' -S < %s | FileCheck %s
 
 define dso_local i32 @main() #0 {
   %1 = alloca i32, align 4
   store i32 0, i32* %1, align 4
   %2 = call i32 @t32(i32 0)
   ret i32 %2
 }
 
 define internal i32 @t32(i32) #0 {
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   store i32 %0, i32* %3, align 4
   %4 = load i32, i32* %3, align 4
-  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,X,X,~{dirflag},~{fpsr},~{flags}"(i32 %4, i8* blockaddress(@t32, %7), i8* blockaddress(@t32, %6)) #1
+  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %4, i8* blockaddress(@t32, %7), i8* blockaddress(@t32, %6)) #1
           to label %5 [label %7, label %6]
 
 ; <label>:5:                                      ; preds = %1
   store i32 0, i32* %2, align 4
   br label %8
 
 ; <label>:6:                                      ; preds = %1
   store i32 1, i32* %2, align 4
   br label %8
 
 ; <label>:7:                                      ; preds = %1
   store i32 2, i32* %2, align 4
   br label %8
 
 ; <label>:8:                                      ; preds = %7, %6, %5
   %9 = load i32, i32* %2, align 4
   ret i32 %9
 }
 
 ; Check that @t32 no longer exists after inlining, as it has now been inlined
 ; into @main.
 
 ; CHECK-NOT: @t32
 ; CHECK: define dso_local i32 @main
-; CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,X,X,~{dirflag},~{fpsr},~{flags}"(i32 %6, i8* blockaddress(@main, %9), i8* blockaddress(@main, %8))
+; CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %6, i8* blockaddress(@main, %9), i8* blockaddress(@main, %8))
 ; CHECK: to label %7 [label %9, label %8]
 ; CHECK: 7:
 ; CHECK-NEXT: store i32 0, i32* %1, align 4
 ; CHECK-NEXT: br label %t32.exit
 ; CHECK: 8:
 ; CHECK-NEXT: store i32 1, i32* %1, align 4
 ; CHECK-NEXT: br label %t32.exit
 ; CHECK: 9:
 ; CHECK-NEXT: store i32 2, i32* %1, align 4
 ; CHECK-NEXT: br label %t32.exit
 ; CHECK: t32.exit:
 ; CHECK-NEXT: %10 = load i32, i32* %1, align 4
 ; CHECK: ret i32 %10

llvm/test/Transforms/JumpThreading/callbr-edge-split.ll

 ; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a
 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
 ; CHECK-NEXT:    br i1 [[TOBOOL]], label [[IF_ELSE:%.*]], label [[IF_THEN:%.*]]
 ; CHECK:       if.then:
 ; CHECK-NEXT:    [[CALL:%.*]] = call i32 @b()
 ; CHECK-NEXT:    [[PHITMP:%.*]] = icmp ne i32 [[CALL]], 0
 ; CHECK-NEXT:    br i1 [[PHITMP]], label [[IF_THEN2:%.*]], label [[IF_END4:%.*]]
 ; CHECK:       if.else:
-; CHECK-NEXT:    callbr void asm sideeffect "", "X"(i8* blockaddress(@c, [[IF_THEN2]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "i"(i8* blockaddress(@c, [[IF_THEN2]]))
 ; CHECK-NEXT:    to label [[IF_END_THREAD:%.*]] [label %if.then2]
 ; CHECK:       if.end.thread:
 ; CHECK-NEXT:    br label [[IF_THEN2]]
 ; CHECK:       if.then2:
 ; CHECK-NEXT:    [[CALL3:%.*]] = call i32 @b()
 ; CHECK-NEXT:    br label [[IF_END4]]
 ; CHECK:       if.end4:
 ; CHECK-NEXT:    ret i32 undef
 ;
 entry:
   %0 = load i32, i32* @a
   %tobool = icmp eq i32 %0, 0
   br i1 %tobool, label %if.else, label %if.then
 
 if.then:                                          ; preds = %entry
   %call = call i32 @b() #2
   %phitmp = icmp ne i32 %call, 0
   br label %if.end
 
 if.else:                                          ; preds = %entry
-  callbr void asm sideeffect "", "X"(i8* blockaddress(@c, %if.end)) #2
+  callbr void asm sideeffect "", "i"(i8* blockaddress(@c, %if.end)) #2
   to label %normal [label %if.end]
 
 normal:                                           ; preds = %if.else
   br label %if.end
 
 if.end:                                           ; preds = %if.else, %normal, %if.then
   %d.0 = phi i1 [ %phitmp, %if.then ], [ undef, %normal ], [ undef, %if.else ]
   br i1 %d.0, label %if.then2, label %if.end4

llvm/test/Transforms/JumpThreading/pr46857-callbr.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -jump-threading -S | FileCheck %s
 
 ; CHECK-ALL-LABEL: @func(
 
 define i1 @func(i1 %arg, i32 %arg1, i1 %arg2) {
 ; CHECK-LABEL: @func(
 ; CHECK-NEXT:  bb:
 ; CHECK-NEXT:    br i1 [[ARG:%.*]], label [[BB3:%.*]], label [[BB4:%.*]]
 ; CHECK:       bb3:
 ; CHECK-NEXT:    [[I:%.*]] = icmp eq i32 [[ARG1:%.*]], 0
 ; CHECK-NEXT:    br label [[BB7:%.*]]
 ; CHECK:       bb4:
-; CHECK-NEXT:    callbr void asm sideeffect "", "X"(i8* blockaddress(@func, [[BB7]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "i"(i8* blockaddress(@func, [[BB7]]))
 ; CHECK-NEXT:    to label [[BB5:%.*]] [label %bb7]
 ; CHECK:       bb5:
 ; CHECK-NEXT:    br label [[BB7]]
 ; CHECK:       bb7:
 ; CHECK-NEXT:    [[I8:%.*]] = phi i1 [ [[I]], [[BB3]] ], [ [[ARG2:%.*]], [[BB5]] ], [ [[ARG2]], [[BB4]] ]
 ; CHECK-NEXT:    [[I9:%.*]] = xor i1 [[I8]], [[ARG]]
 ; CHECK-NEXT:    br i1 [[I9]], label [[BB11:%.*]], label [[BB11]]
 ; CHECK:       bb11:
 ; CHECK-NEXT:    ret i1 [[I9]]
 ;
 bb:
   br i1 %arg, label %bb3, label %bb4
 
 bb3:
   %i = icmp eq i32 %arg1, 0
   br label %bb7
 
 bb4:
-  callbr void asm sideeffect "", "X"(i8* blockaddress(@func, %bb6))
+  callbr void asm sideeffect "", "i"(i8* blockaddress(@func, %bb6))
   to label %bb5 [label %bb6]
 
 bb5:
   br label %bb6
 
 bb6:
   br label %bb7
 

llvm/test/Transforms/LICM/callbr-crash.ll

 ; RUN: opt -licm -disable-output < %s
 
 define i32 @j() {
 entry:
   br label %for.cond
 
 for.cond:                                         ; preds = %cond.true.i, %entry
-  callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@j, %for.end))
+  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@j, %for.end))
           to label %cond.true.i [label %for.end]
 
 cond.true.i:                                      ; preds = %for.cond
   %asmresult1.i.i = extractvalue { i8, i32 } zeroinitializer, 1
   br i1 undef, label %for.end, label %for.cond
 
 for.end:                                          ; preds = %cond.true.i, %for.cond
   %asmresult1.i.i2 = phi i32 [ %asmresult1.i.i, %cond.true.i ], [ undef, %for.cond ]
   ret i32 undef
 }

llvm/test/Transforms/LoopDeletion/two-predecessors.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -loop-deletion -S | FileCheck %s
 
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 target triple = "aarch64-unknown-linux-gnu"
 
 define dso_local i32 @hoge() local_unnamed_addr #0 {
 ; CHECK-LABEL: @hoge(
 ; CHECK-NEXT:  bb:
-; CHECK-NEXT:    callbr void asm sideeffect "", "X"(i8* blockaddress(@hoge, [[BB2:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "i"(i8* blockaddress(@hoge, [[BB2:%.*]]))
 ; CHECK-NEXT:    to label [[BB1:%.*]] [label %bb2]
 ; CHECK:       bb1:
 ; CHECK-NEXT:    br label [[BB2]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    [[TMP:%.*]] = phi i32 [ undef, [[BB1]] ], [ [[TMP3:%.*]], [[BB2]] ], [ undef, [[BB:%.*]] ]
 ; CHECK-NEXT:    [[TMP3]] = tail call i32 bitcast (i32 (...)* @widget to i32 (i32)*)(i32 [[TMP]])
 ; CHECK-NEXT:    br label [[BB2]]
 ;
 bb:
-  callbr void asm sideeffect "", "X"(i8* blockaddress(@hoge, %bb2)) #1
+  callbr void asm sideeffect "", "i"(i8* blockaddress(@hoge, %bb2)) #1
   to label %bb1 [label %bb2]
 
 bb1:                                              ; preds = %bb
   br label %bb2
 
 bb2:                                              ; preds = %bb2, %bb1, %bb
   %tmp = phi i32 [ undef, %bb1 ], [ %tmp3, %bb2 ], [ undef, %bb ]
   %tmp3 = tail call i32 bitcast (i32 (...)* @widget to i32 (i32)*)(i32 %tmp) #1
   br label %bb2
 }
 
 declare dso_local i32 @widget(...) local_unnamed_addr #0

llvm/test/Transforms/LoopRotate/callbr.ll

 ; CHECK-NEXT:    br i1 [[TMP11]], label [[THREAD_PRE_SPLIT:%.*]], label [[DOT_CRIT_EDGE:%.*]]
 ; CHECK:       thread-pre-split:
 ; CHECK-NEXT:    [[DOTPR:%.*]] = load i32, i32* @i, align 4
 ; CHECK-NEXT:    [[TMP12:%.*]] = icmp eq i32 [[DOTPR]], 0
 ; CHECK-NEXT:    br i1 [[TMP12]], label [[M_EXIT]], label [[DOTLR_PH:%.*]]
 ; CHECK:       .lr.ph:
 ; CHECK-NEXT:    br label [[TMP13:%.*]]
 ; CHECK:         [[DOT11:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP14:%.*]], [[J_EXIT_I:%.*]] ]
-; CHECK-NEXT:    callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@o, [[M_EXIT]])) #1
+; CHECK-NEXT:    callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@o, [[M_EXIT]])) #1
 ; CHECK-NEXT:    to label [[J_EXIT_I]] [label %m.exit]
 ; CHECK:       j.exit.i:
 ; CHECK-NEXT:    [[TMP14]] = tail call i32 asm "", "={ax},~{dirflag},~{fpsr},~{flags}"() #2
 ; CHECK-NEXT:    br i1 [[TMP12]], label [[DOTM_EXIT_CRIT_EDGE:%.*]], label [[TMP13]]
 ; CHECK:       .m.exit_crit_edge:
 ; CHECK-NEXT:    [[SPLIT:%.*]] = phi i32 [ [[TMP14]], [[J_EXIT_I]] ]
 ; CHECK-NEXT:    br label [[M_EXIT]]
 ; CHECK:       m.exit:
thread-pre-split:                                 ; preds = %6
   br label %12
 
 ; <label>:12:                                     ; preds = %j.exit.i, %thread-pre-split
   %.1 = phi i32 [ %15, %j.exit.i ], [ undef, %thread-pre-split ]
   %13 = icmp eq i32 %.pr, 0
   br i1 %13, label %m.exit, label %14
 
 ; <label>:14:                                     ; preds = %12
-  callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@o, %m.exit)) #1
+  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@o, %m.exit)) #1
   to label %j.exit.i [label %m.exit]
 
 j.exit.i:                                         ; preds = %14
   %15 = tail call i32 asm "", "={ax},~{dirflag},~{fpsr},~{flags}"() #2
   br label %12
 
 m.exit:                                           ; preds = %14, %12
   %.1.lcssa = phi i32 [ %.1, %14 ], [ %.1, %12 ]

llvm/test/Transforms/LoopStrengthReduce/callbr-critical-edge-splitting.ll

 ; RUN: opt -loop-reduce %s -o - -S | FileCheck %s
 ; RUN: opt -passes='loop(loop-reduce)' %s -o - -S | FileCheck %s
 
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 
 define dso_local i32 @test1() local_unnamed_addr {
 entry:
   br label %for.cond
 
 for.cond:                                         ; preds = %for.inc, %entry
-; It's ok to modify this test in the future should be able to split critical
+; It's ok to modify this test in the future should we be able to split critical
 ; edges here, just noting that this is the critical edge that we care about.
-; CHECK: callbr void asm sideeffect "", "X,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %cond.true.i), i8* blockaddress(@test1, %for.end))
+; CHECK: callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %cond.true.i), i8* blockaddress(@test1, %for.end))
 ; CHECK-NEXT: to label %asm.fallthrough.i.i [label %cond.true.i, label %for.end]
-  callbr void asm sideeffect "", "X,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %cond.true.i), i8* blockaddress(@test1, %for.end))
+  callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %cond.true.i), i8* blockaddress(@test1, %for.end))
           to label %asm.fallthrough.i.i [label %cond.true.i, label %for.end]
 
 asm.fallthrough.i.i:                              ; preds = %for.cond
   unreachable
 
 cond.true.i:                                      ; preds = %for.cond
   br label %do.body.i.i.do.body.i.i_crit_edge
 

llvm/test/Transforms/LoopStrengthReduce/callbr-critical-edge-splitting2.ll

 entry:
   %call = tail call i32 @a()
   %tobool.not = icmp eq i32 %call, 0
   br i1 %tobool.not, label %cleanup.cont.critedge, label %if.then
 
 if.then:                                          ; preds = %entry
 ; It's ok to modify this test in the future should be able to split critical
 ; edges here, just noting that this is the critical edge that we care about.
-; CHECK: callbr void asm sideeffect "", "X"(i8* blockaddress(@b, %cleanup.cont.critedge))
+; CHECK: callbr void asm sideeffect "", "i"(i8* blockaddress(@b, %cleanup.cont.critedge))
 ; CHECK-NEXT: to label %return [label %cleanup.cont.critedge]
-  callbr void asm sideeffect "", "X"(i8* blockaddress(@b, %cleanup.cont.critedge))
+  callbr void asm sideeffect "", "i"(i8* blockaddress(@b, %cleanup.cont.critedge))
           to label %return [label %cleanup.cont.critedge]
 
 cleanup.cont.critedge:                            ; preds = %entry, %if.then
   br label %return
 
 return:                                           ; preds = %if.then, %cleanup.cont.critedge
   %retval.0 = phi i32 [ 4, %cleanup.cont.critedge ], [ 0, %if.then ]
   ret i32 %retval.0
for.cond:                                         ; preds = %if.end3, %entry
   br i1 %tobool.not, label %if.end3, label %if.then
 
 if.then:                                          ; preds = %for.cond
   %call.i = tail call i32 @a()
   %tobool.not.i = icmp eq i32 %call.i, 0
   br i1 %tobool.not.i, label %if.then2, label %if.then.i
 
 if.then.i:                                        ; preds = %if.then
-  callbr void asm sideeffect "", "X"(i8* blockaddress(@do_pages_move_nr_pages, %if.then2))
+  callbr void asm sideeffect "", "i"(i8* blockaddress(@do_pages_move_nr_pages, %if.then2))
           to label %if.end3 [label %if.then2]
 
 if.then2:                                         ; preds = %if.then, %if.then.i
   %g.0.lcssa = phi i32 [ %g.0, %if.then ], [ %g.0, %if.then.i ]
   %call4 = tail call i32 @e(i32 %g.0.lcssa)
   ret i32 undef
 
 if.end3:                                          ; preds = %for.cond, %if.then.i
   %inc = add nsw i32 %g.0, 1
   br label %for.cond
 }
 

llvm/test/Transforms/LoopUnroll/callbr.ll

for.cond.cleanup:                                 ; preds = %for.inc
   ret void
 
 for.body:                                         ; preds = %for.inc, %entry
   %e.04 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
   %tobool = icmp eq i32 %e.04, 0
   br i1 %tobool, label %for.inc, label %if.then
 
 if.then:                                          ; preds = %for.body
-  callbr void asm sideeffect "1: nop\0A\09.quad b, ${0:l}, $$5\0A\09", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@d, %l_yes))
+  callbr void asm sideeffect "1: nop\0A\09.quad b, ${0:l}, $$5\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@d, %l_yes))
           to label %asm.fallthrough [label %l_yes]
 
 asm.fallthrough:                                  ; preds = %if.then
   br label %l_yes
 
 l_yes:                                            ; preds = %asm.fallthrough, %if.then
   %call = tail call i32 (...) @g()
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body, %l_yes
   %inc = add nuw nsw i32 %e.04, 1
   %exitcond = icmp eq i32 %inc, 3
   br i1 %exitcond, label %for.cond.cleanup, label %for.body
 }
 
 declare dso_local i32 @g(...) local_unnamed_addr

llvm/test/Transforms/LoopUnswitch/callbr.ll

 ; RUN: opt -loop-unswitch -enable-new-pm=0 %s -S | FileCheck %s
 
 ; We want to check that the loop does not get split (so only 2 callbr's not 4).
 ; It's ok to modify this test in the future should we allow the loop containing
 ; callbr to be unswitched and are able to do so correctly.
 
-; CHECK: callbr void asm sideeffect "# ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10))
+; CHECK: callbr void asm sideeffect "# ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10))
 ; CHECK: to label %7 [label %10]
-; CHECK: callbr void asm sideeffect "# ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10))
+; CHECK: callbr void asm sideeffect "# ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10))
 ; CHECK: to label %9 [label %10]
 
-; CHECK-NOT: callbr void asm sideeffect "# ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10))
+; CHECK-NOT: callbr void asm sideeffect "# ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10))
 ; CHECK-NOT: to label %7 [label %10]
-; CHECK-NOT: callbr void asm sideeffect "# ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10))
+; CHECK-NOT: callbr void asm sideeffect "# ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10))
 ; CHECK-NOT: to label %9 [label %10]
-; CHECK-NOT: callbr void asm sideeffect "# ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %19))
+; CHECK-NOT: callbr void asm sideeffect "# ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %19))
 ; CHECK-NOT: to label %16 [label %19]
-; CHECK-NOT: callbr void asm sideeffect "# ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %19))
+; CHECK-NOT: callbr void asm sideeffect "# ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %19))
 ; CHECK-NOT: to label %18 [label %19]
 
 ; This test is essentially:
 ; void foo(int n) {
 ;   for (int i = 0; i < 1000; ++i)
 ;     if (n) {
 ;       asm goto("# %l0"::::bar);
 ;       bar:;
2:                                                ; preds = %10, %1
   %3 = icmp ult i32 %.0, 1000
   br i1 %3, label %4, label %12
 
 4:                                                ; preds = %2
   %5 = icmp eq i32 %0, 0
   br i1 %5, label %8, label %6
 
 6:                                                ; preds = %4
-  callbr void asm sideeffect "# ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10)) #0
+  callbr void asm sideeffect "# ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10)) #0
     to label %7 [label %10]
 
 7:                                                ; preds = %6
   br label %10
 
 8:                                                ; preds = %4
-  callbr void asm sideeffect "# ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10)) #0
+  callbr void asm sideeffect "# ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %10)) #0
     to label %9 [label %10]
 
 9:                                                ; preds = %8
   br label %10
 
 10:                                               ; preds = %7, %6, %9, %8
   %11 = add nuw nsw i32 %.0, 1
   br label %2
 
 12:                                               ; preds = %2
   ret void
 }
 

llvm/test/Transforms/PGOProfile/callbr.ll

 ; RUN: opt -pgo-instr-gen -S 2>&1 < %s | FileCheck %s
 
 define i32 @a() {
 entry:
 ; CHECK-NOT: ptrtoint void (i8*)* asm sideeffect
 ; CHECK: callbr void asm sideeffect
   %retval = alloca i32, align 4
-  callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@a, %b)) #1
+  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@a, %b)) #1
           to label %asm.fallthrough [label %b]
 
 asm.fallthrough:
   br label %b
 
 b:
   %0 = load i32, i32* %retval, align 4
   ret i32 %0
 }

llvm/test/Transforms/SimpleLoopUnswitch/not-safe-to-clone.ll

 ; RUN: opt -passes='simple-loop-unswitch<nontrivial>' %s -S | FileCheck %s
 
 declare i1 @foo()
 
 ; CHECK: define {{.*}} @mem_cgroup_node_nr_lru_pages
 define i32 @mem_cgroup_node_nr_lru_pages(i1 %tree) {
 entry:
   br label %for.cond
 
 for.cond:                                         ; preds = %if.end8, %entry
   br i1 %tree, label %if.end8, label %if.else
 
 if.else:                                          ; preds = %for.cond
-  callbr void asm sideeffect ".pushsection __jump_table,  \22aw\22 \0A\09.popsection \0A\09", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@mem_cgroup_node_nr_lru_pages, %for.cond5))
+  callbr void asm sideeffect ".pushsection __jump_table,  \22aw\22 \0A\09.popsection \0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@mem_cgroup_node_nr_lru_pages, %for.cond5))
           to label %if.end8 [label %for.cond5]
 
 for.cond5:                                        ; preds = %if.else, %for.cond5
   %call6 = call i1 @foo()
   br i1 %call6, label %if.end8.loopexit, label %for.cond5
 
 if.end8.loopexit:                                 ; preds = %for.cond5
   br label %if.end8
 
 if.end8:                                          ; preds = %if.end8.loopexit, %if.else, %for.cond
   br label %for.cond
 }
 

llvm/test/Transforms/SimplifyCFG/callbr-destinations.ll

 ; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -disable-output
 ;
 ; Test that SimplifyCFG does not cause CallBr instructions to have duplicate
 ; destinations, which will cause the verifier to assert.
 
 define void @fun0() {
 entry:
-  callbr void asm sideeffect "", "X"(i8* blockaddress(@fun0, %bb1))
+  callbr void asm sideeffect "", "i"(i8* blockaddress(@fun0, %bb1))
           to label %bb2 [label %bb1]
 
 bb1:                                              ; preds = %bb
   ret void
 
 bb2:                                             ; preds = %bb
   ret void
 }
 
 define void @fun1() {
 entry:
-  callbr void asm sideeffect "", "X"(i8* blockaddress(@fun1, %bb1))
+  callbr void asm sideeffect "", "i"(i8* blockaddress(@fun1, %bb1))
           to label %bb2 [label %bb1]
 
 bb2:                                             ; preds = %bb
   ret void
 
 bb1:                                              ; preds = %bb
   ret void
 }

llvm/test/Verifier/callbr.ll

 ; RUN: not opt -S %s -verify 2>&1 | FileCheck %s
 
 ; CHECK: Indirect label missing from arglist.
 ; CHECK-NEXT: #test1
 define void @test1() {
   ; The %4 in the indirect label list is not found in the blockaddresses in the
   ; arg list (bad).
-  callbr void asm sideeffect "#test1", "X,X"(i8* blockaddress(@test1, %3), i8* blockaddress(@test1, %2))
+  callbr void asm sideeffect "#test1", "i,i"(i8* blockaddress(@test1, %3), i8* blockaddress(@test1, %2))
   to label %1 [label %4, label %2]
 1:
   ret void
 2:
   ret void
 3:
   ret void
 4:
   ret void
 }
 
 ; CHECK-NOT: Indirect label missing from arglist.
 define void @test2() {
   ; %4 and %2 are both in the indirect label list and the arg list (good).
-  callbr void asm sideeffect "${0:l} ${1:l}", "X,X"(i8* blockaddress(@test2, %4), i8* blockaddress(@test2, %2))
+  callbr void asm sideeffect "${0:l} ${1:l}", "i,i"(i8* blockaddress(@test2, %4), i8* blockaddress(@test2, %2))
   to label %1 [label %4, label %2]
 1:
   ret void
 2:
   ret void
 3:
   ret void
 4:
   ret void
 }
 
 ; CHECK-NOT: Indirect label missing from arglist.
 define void @test3() {
   ; note %2 blockaddress. Such a case is possible when passing the address of
   ; a label as an input to the inline asm (both address of label and asm goto
   ; use blockaddress constants; we're testing that the indirect label list from
   ; the asm goto is in the arg list to the asm).
-  callbr void asm sideeffect "${0:l} ${1:l} ${2:l}", "X,X,X"(i8* blockaddress(@test3, %4), i8* blockaddress(@test3, %2), i8* blockaddress(@test3, %3))
+  callbr void asm sideeffect "${0:l} ${1:l} ${2:l}", "i,X,i"(i8* blockaddress(@test3, %4), i8* blockaddress(@test3, %2), i8* blockaddress(@test3, %3))
   to label %1 [label %3, label %4]
 1:
   ret void
 2:
   ret void
 3:
   ret void
 4:
   ret void
 }
 
 ;; Ensure you cannot use the return value of a callbr in indirect targets.
 ; CHECK: Instruction does not dominate all uses!
 ; CHECK-NEXT: #test4
 define i32 @test4(i1 %var) {
 entry:
-  %ret = callbr i32 asm sideeffect "#test4", "=r,X"(i8* blockaddress(@test4, %abnormal)) to label %normal [label %abnormal]
+  %ret = callbr i32 asm sideeffect "#test4", "=r,i"(i8* blockaddress(@test4, %abnormal)) to label %normal [label %abnormal]
 
 normal:
   ret i32 0
 
 abnormal:
   ret i32 %ret
 }
 
 ;; Ensure you cannot specify the same label as both normal and indirect targets.
 ; CHECK: Duplicate callbr destination!
 ; CHECK-NEXT: #test5
 define i32 @test5() {
 entry:
-  %ret = callbr i32 asm sideeffect "#test5", "=r,X"(i8* blockaddress(@test5, %both)) to label %both [label %both]
+  %ret = callbr i32 asm sideeffect "#test5", "=r,i"(i8* blockaddress(@test5, %both)) to label %both [label %both]
 
 both:
   ret i32 0
 }

llvm/test/tools/llvm-diff/callbr.ll

 ; RUN: not llvm-diff %s %s 2>&1 | FileCheck %s
 
 define void @foo() {
 entry:
-  callbr void asm sideeffect "", "X,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %return), i8* blockaddress(@foo, %t_no))
+  callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %return), i8* blockaddress(@foo, %t_no))
           to label %asm.fallthrough [label %return, label %t_no]
 
 asm.fallthrough:
   br label %return
 
 t_no:
   br label %return
 
 return:
   ret void
 }
 
 ; CHECK:      in function bar:
 ; CHECK-NOT:  in function foo:
 ; CHECK-NEXT:  in block %entry:
-; CHECK-NEXT:    >   callbr void asm sideeffect "", "X,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %t_no), i8* blockaddress(@foo, %return))
+; CHECK-NEXT:    >   callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %t_no), i8* blockaddress(@foo, %return))
 ; CHECK-NEXT:          to label %asm.fallthrough [label %return, label %t_no]
-; CHECK-NEXT:    <   callbr void asm sideeffect "", "X,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %t_no), i8* blockaddress(@foo, %return))
+; CHECK-NEXT:    <   callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %t_no), i8* blockaddress(@foo, %return))
 ; CHECK-NEXT:          to label %asm.fallthrough [label %return, label %t_no]
 
 define void @bar() {
 entry:
-  callbr void asm sideeffect "", "X,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %t_no), i8* blockaddress(@foo, %return))
+  callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %t_no), i8* blockaddress(@foo, %return))
           to label %asm.fallthrough [label %return, label %t_no]
 
 asm.fallthrough:
   br label %return
 
 t_no:
   br label %return
 
 return:
   ret void
 }

llvm/test/tools/llvm-diff/phinode.ll

 ; RUN: rm -f %t.ll
 ; RUN: cat %s | sed -e 's/ 0, %2 / 1, %2 /' > %t.ll
 ; RUN: not llvm-diff %s %t.ll 2>&1 | FileCheck %s
 
 ; CHECK:       in function foo:
 ; CHECK-NEXT:   in block %6 / %6:
 ; CHECK-NEXT:    >   %7 = phi i32 [ 1, %2 ], [ -1, %1 ]
 ; CHECK-NEXT:    >   ret i32 %7
 ; CHECK-NEXT:    <   %7 = phi i32 [ 0, %2 ], [ -1, %1 ]
 ; CHECK-NEXT:    <   ret i32 %7
 define i32 @foo(i32 %0) #0 {
-  callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %6))
+  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %6))
           to label %2 [label %6]
 
 2:
   %3 = icmp eq i32 %0, 0
   br i1 %3, label %6, label %4
 
 4:
   br label %5
 
 5:
   br label %5
 
 6:
   %7 = phi i32 [ 0, %2 ], [ -1, %1 ]
   ret i32 %7
 }

llvm/test/tools/llvm-reduce/remove-function-arguments-of-funcs-used-in-blockaddress.ll

 ; RUN: llvm-reduce --delta-passes=arguments --test FileCheck --test-arg --check-prefixes=CHECK-ALL,CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t
 ; RUN: cat %t | FileCheck --check-prefixes=CHECK-ALL,CHECK-FINAL %s
 
 ; CHECK-INTERESTINGNESS: define void @func(
 ; CHECK-FINAL: define void @func()
 define void @func(i1 %arg) {
 ; CHECK-ALL: bb:
 ; CHECK-ALL: br label %bb4
 bb:
   br label %bb4
 
 ; CHECK-ALL: bb4
 bb4:
 ; CHECK-INTERESTINGNESS: callbr void asm
 ; CHECK-INTERESTINGNESS-SAME: blockaddress
-; CHECK-FINAL: callbr void asm sideeffect "", "X"(i8* blockaddress(@func, %bb11))
+; CHECK-FINAL: callbr void asm sideeffect "", "i"(i8* blockaddress(@func, %bb11))
 ; CHECK-ALL: to label %bb5 [label %bb11]
-  callbr void asm sideeffect "", "X"(i8* blockaddress(@func, %bb11))
+  callbr void asm sideeffect "", "i"(i8* blockaddress(@func, %bb11))
           to label %bb5 [label %bb11]
 
 ; CHECK-ALL: bb5:
 ; CHECK-ALL: br label %bb11
 bb5:
   br label %bb11
 
 ; CHECK-ALL: bb11:
 ; CHECK-ALL: ret void
 bb11:
   ret void
 }