This is an archive of the discontinued LLVM Phabricator instance.

Differential D114875

[VE] Fix VP stderr filecheck pipes on MSVC builds
AbandonedPublic

Authored by RKSimon on Dec 1 2021, 6:44 AM.

Details

Reviewers
simoll
Summary

Fixes lit failures on windows build machines:

FAIL: LLVM :: CodeGen/VE/Vector/vp_or.ll (193 of 217)
******************** TEST 'LLVM :: CodeGen/VE/Vector/vp_or.ll' FAILED ********************
shell parser error on: ": 'RUN: at line 2';   not --crash e:\\llvm\\ninja\\bin\\llc.exe E:\\llvm\\llvm-project\\llvm\\test\\CodeGen\\VE\\Vector\\vp_or.ll -march=ve -mattr=+vpu -o /dev/null |& e:\\llvm\\ninja\\bin\\filecheck.exe E:\\llvm\\llvm-project\\llvm\\test\\CodeGen\\VE\\Vector\\vp_or.ll"

Diff Detail

Event Timeline

RKSimon requested review of this revision.Dec 1 2021, 6:44 AM
RKSimon created this revision.
Herald added a project: Restricted Project. · View Herald TranscriptDec 1 2021, 6:44 AM
Harbormaster completed remote builds in B136911: Diff 391006.Dec 1 2021, 7:23 AM
RKSimon abandoned this revision.Dec 1 2021, 8:46 AM

@simoll Handled this in rG444013d324fe279fe71cb626ba56ab935d943fd8

Revision Contents

PathSize
llvm/
test/
CodeGen/
VE/
Vector/
2 lines
2 lines
2 lines
2 lines
2 lines
2 lines
2 lines
2 lines
2 lines
2 lines
2 lines

Diff 391006

llvm/test/CodeGen/VE/Vector/vp_ashr.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_ashr [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_ashr [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.ashr.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.ashr.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.ashr.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.ashr.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_lshr.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_lshr [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_lshr [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.lshr.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.lshr.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.lshr.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.lshr.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_mul.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_mul [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_mul [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.mul.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.mul.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.mul.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.mul.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_or.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_or [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_or [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.or.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.or.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.or.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.or.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_sdiv.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_sdiv [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_sdiv [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.sdiv.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.sdiv.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.sdiv.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.sdiv.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_shl.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_shl [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_shl [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.shl.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.shl.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.shl.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.shl.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_srem.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_srem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_srem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.srem.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.srem.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.srem.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.srem.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_sub.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_sub [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_sub [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.sub.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.sub.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.sub.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.sub.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_udiv.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_udiv [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_udiv [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.udiv.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.udiv.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.udiv.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.udiv.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_urem.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_urem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_urem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.urem.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.urem.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.urem.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.urem.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_xor.ll

; REQUIRES: asserts ; REQUIRES: asserts
; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
; CHECK: t{{[0-9]+}}: v256i32 = vp_xor [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] ; CHECK: t{{[0-9]+}}: v256i32 = vp_xor [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32 ; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32 ; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1 ; CHECK: [[MASK]]: v256i1
; CHECK: [[EVL]]: i32 ; CHECK: [[EVL]]: i32
define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) { define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
%r0 = call <256 x i32> @llvm.vp.xor.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) %r0 = call <256 x i32> @llvm.vp.xor.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
ret <256 x i32> %r0 ret <256 x i32> %r0
} }
; integer arith ; integer arith
declare <256 x i32> @llvm.vp.xor.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32) declare <256 x i32> @llvm.vp.xor.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)