diff --git a/llvm/include/llvm/MC/MCSectionXCOFF.h b/llvm/include/llvm/MC/MCSectionXCOFF.h --- a/llvm/include/llvm/MC/MCSectionXCOFF.h +++ b/llvm/include/llvm/MC/MCSectionXCOFF.h @@ -37,7 +37,7 @@ StringRef SymbolTableName; Optional DwarfSubtypeFlags; bool MultiSymbolsAllowed; - static constexpr unsigned DefaultAlignVal = 4; + static constexpr unsigned DefaultAlignVal = 32; MCSectionXCOFF(StringRef Name, XCOFF::StorageMappingClass SMC, XCOFF::SymbolType ST, SectionKind K, MCSymbolXCOFF *QualName, diff --git a/llvm/test/CodeGen/PowerPC/aix-alias.ll b/llvm/test/CodeGen/PowerPC/aix-alias.ll --- a/llvm/test/CodeGen/PowerPC/aix-alias.ll +++ b/llvm/test/CodeGen/PowerPC/aix-alias.ll @@ -56,7 +56,7 @@ ; ASM-NEXT: .csect fun[DS] ; ASM-NEXT: fun_weak: # @fun ; ASM-NEXT: fun_hidden: -; ASM: .csect .text[PR],2 +; ASM: .csect .text[PR],5 ; ASM-NEXT: .fun: ; ASM-NEXT: .fun_weak: ; ASM-NEXT: .fun_hidden: @@ -64,7 +64,7 @@ ; ASM-NEXT: li 3, 0 ; ASM-NEXT: blr ; ASM-NEXT: # -- End function -; ASM: .csect .text[PR],2 +; ASM: .csect .text[PR],5 ; ASM-NEXT: .test: ; ASM-NEXT: # %bb.0: # %entry ; ASM: bl .fun diff --git a/llvm/test/CodeGen/PowerPC/aix-constant-align.ll b/llvm/test/CodeGen/PowerPC/aix-constant-align.ll --- a/llvm/test/CodeGen/PowerPC/aix-constant-align.ll +++ b/llvm/test/CodeGen/PowerPC/aix-constant-align.ll @@ -30,4 +30,4 @@ ; CHECK-NEXT: L..CPI1_0: ; CHECK-NEXT: .vbyte 4, 0x40490fd0 -; CHECK: .csect NOT_PI[RO],3 +; CHECK: .csect NOT_PI[RO],5 diff --git a/llvm/test/CodeGen/PowerPC/aix-dwarf.ll b/llvm/test/CodeGen/PowerPC/aix-dwarf.ll --- a/llvm/test/CodeGen/PowerPC/aix-dwarf.ll +++ b/llvm/test/CodeGen/PowerPC/aix-dwarf.ll @@ -59,7 +59,7 @@ ; SEC-NEXT: VirtualAddress: 0x28 ; SEC-NEXT: Size: 0xC ; SEC-NEXT: RawDataOffset: 0x104 -; SEC-NEXT: RelocationPointer: 0x1D8 +; SEC-NEXT: RelocationPointer: 0x1F8 ; SEC-NEXT: LineNumberPointer: 0x0 ; SEC-NEXT: NumberOfRelocations: 2 ; SEC-NEXT: NumberOfLineNumbers: 0 @@ -71,7 +71,7 @@ ; SEC-NEXT: PhysicalAddress: 0x0 ; SEC-NEXT: VirtualAddress: 0x0 ; SEC-NEXT: Size: 0x36 -; SEC-NEXT: RawDataOffset: 0x110 +; SEC-NEXT: RawDataOffset: 0x120 ; SEC-NEXT: RelocationPointer: 0x0 ; SEC-NEXT: LineNumberPointer: 0x0 ; SEC-NEXT: NumberOfRelocations: 0 @@ -84,8 +84,8 @@ ; SEC-NEXT: PhysicalAddress: 0x0 ; SEC-NEXT: VirtualAddress: 0x0 ; SEC-NEXT: Size: 0x57 -; SEC-NEXT: RawDataOffset: 0x148 -; SEC-NEXT: RelocationPointer: 0x1EC +; SEC-NEXT: RawDataOffset: 0x160 +; SEC-NEXT: RelocationPointer: 0x20C ; SEC-NEXT: LineNumberPointer: 0x0 ; SEC-NEXT: NumberOfRelocations: 4 ; SEC-NEXT: NumberOfLineNumbers: 0 @@ -97,8 +97,8 @@ ; SEC-NEXT: PhysicalAddress: 0x0 ; SEC-NEXT: VirtualAddress: 0x0 ; SEC-NEXT: Size: 0x36 -; SEC-NEXT: RawDataOffset: 0x1A0 -; SEC-NEXT: RelocationPointer: 0x214 +; SEC-NEXT: RawDataOffset: 0x1C0 +; SEC-NEXT: RelocationPointer: 0x234 ; SEC-NEXT: LineNumberPointer: 0x0 ; SEC-NEXT: NumberOfRelocations: 1 ; SEC-NEXT: NumberOfLineNumbers: 0 diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll --- a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll +++ b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll @@ -141,7 +141,7 @@ } ; CHECK-ASM-LABEL: ._Z10add_structifd1SP2SD1Di:{{[[:space:]] *}}# %bb.0: -; CHECK-FUNC-LABEL: csect ._Z10add_structifd1SP2SD1Di[PR],2{{[[:space:]] *}}# %bb.0: +; CHECK-FUNC-LABEL: csect ._Z10add_structifd1SP2SD1Di[PR],5{{[[:space:]] *}}# %bb.0: ; COMMON-NEXT: lwz 4, L..C0(2) ; COMMON-NEXT: stfs 1, -24(1) ; COMMON-NEXT: lfs 0, 0(4) diff --git a/llvm/test/CodeGen/PowerPC/aix-exception.ll b/llvm/test/CodeGen/PowerPC/aix-exception.ll --- a/llvm/test/CodeGen/PowerPC/aix-exception.ll +++ b/llvm/test/CodeGen/PowerPC/aix-exception.ll @@ -123,7 +123,7 @@ ; ASM64: .vbyte 8, L..C1-TOC[TC0] # EHInfo Table ; ASM: L..func_end0: -; ASM: .csect .gcc_except_table[RO],2 +; ASM: .csect .gcc_except_table[RO],5 ; ASM: .align 2 ; ASM: GCC_except_table1: ; ASM: L..exception0: @@ -153,7 +153,7 @@ ; ASM: L..ttbase0: ; ASM: .align 2 -; ASM: .csect .eh_info_table[RW],2 +; ASM: .csect .eh_info_table[RW],5 ; ASM: __ehinfo.1: ; ASM: .vbyte 4, 0 ; ASM32: .align 2 diff --git a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll --- a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll +++ b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll @@ -185,7 +185,7 @@ ; CHECKSYM-NEXT: SectionLen: 80 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 4 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_PR (0x0) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 @@ -215,7 +215,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#Index+14]] ; CHECKSYM-NEXT: Name: .data -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x50 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x60 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -225,7 +225,7 @@ ; CHECKSYM-NEXT: SectionLen: 4 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 2 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_RW (0x5) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 @@ -235,7 +235,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#Index+16]] ; CHECKSYM-NEXT: Name: foo_ext_weak_p -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x50 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x60 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_EXT (0x2) @@ -255,7 +255,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#Index+18]] ; CHECKSYM-NEXT: Name: main -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x54 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x64 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_EXT (0x2) @@ -275,7 +275,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#Index+20]] ; CHECKSYM-NEXT: Name: TOC -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x60 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x70 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -295,7 +295,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#Index+22]] ; CHECKSYM-NEXT: Name: foo_ext_weak_p -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x60 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x80 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -305,7 +305,7 @@ ; CHECKSYM-NEXT: SectionLen: 4 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 2 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 @@ -315,7 +315,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#Index+24]] ; CHECKSYM-NEXT: Name: b_w -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x64 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0xA0 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -325,7 +325,7 @@ ; CHECKSYM-NEXT: SectionLen: 4 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 2 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 diff --git a/llvm/test/CodeGen/PowerPC/aix-extern.ll b/llvm/test/CodeGen/PowerPC/aix-extern.ll --- a/llvm/test/CodeGen/PowerPC/aix-extern.ll +++ b/llvm/test/CodeGen/PowerPC/aix-extern.ll @@ -206,7 +206,7 @@ ; CHECKSYM-NEXT: SectionLen: 112 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 4 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_PR (0x0) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 @@ -256,7 +256,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#Index+16]] ; CHECKSYM-NEXT: Name: .data -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x70 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x80 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -266,7 +266,7 @@ ; CHECKSYM-NEXT: SectionLen: 4 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 2 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_RW (0x5) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 diff --git a/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll b/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll --- a/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll +++ b/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll @@ -72,7 +72,7 @@ ; CHECKRELOC-NEXT: 0: 7c 08 02 a6 mflr 0 ; CHECKRELOC-NEXT: 4: 90 01 00 08 stw 0, 8(1) ; CHECKRELOC-NEXT: 8: 94 21 ff c0 stwu 1, -64(1) -; CHECKRELOC-NEXT: c: 80 62 00 00 lwz 3, 0(2) +; CHECKRELOC-NEXT: c: 80 62 00 0c lwz 3, 12(2) ; CHECKRELOC-NEXT: 0000000e: R_TOC (idx: 13) s[TC] ; CHECKRELOC-NEXT: 10: 80 83 00 04 lwz 4, 4(3) ; CHECKRELOC-NEXT: 14: 7c 85 23 78 mr 5, 4 diff --git a/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll b/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll --- a/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll +++ b/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll @@ -190,7 +190,7 @@ ; 64LARGE-ASM: .vbyte 4, L..BB0_4-L..JTI0_0 ; 64LARGE-ASM: .vbyte 4, L..BB0_5-L..JTI0_0 -; FUNC-ASM: .csect .jump_table[PR],2 +; FUNC-ASM: .csect .jump_table[PR],5 ; FUNC-ASM: L..BB0_2: ; FUNC-ASM: L..BB0_3: ; FUNC-ASM: L..BB0_4: @@ -198,7 +198,7 @@ ; FUNC-ASM: L..BB0_6: ; FUNC-ASM: li 3, 0 ; FUNC-ASM: blr -; FUNC-ASM: .csect .rodata.jmp..jump_table[RO],2 +; FUNC-ASM: .csect .rodata.jmp..jump_table[RO],5 ; FUNC-ASM: .align 2 ; FUNC-ASM: L..JTI0_0: ; FUNC-ASM: .vbyte 4, L..BB0_2-L..JTI0_0 diff --git a/llvm/test/CodeGen/PowerPC/aix-personality-alias.ll b/llvm/test/CodeGen/PowerPC/aix-personality-alias.ll --- a/llvm/test/CodeGen/PowerPC/aix-personality-alias.ll +++ b/llvm/test/CodeGen/PowerPC/aix-personality-alias.ll @@ -56,14 +56,14 @@ ; SYM64: .vbyte 8, .__gxx_personality_v0 ; SYM64: .vbyte 8, TOC[TC0] ; SYM64: .vbyte 8, 0 -; SYM: .csect .text[PR],2 +; SYM: .csect .text[PR],5 ; SYM: .__gxx_personality_v0: ; SYM: .__xlcxx_personality_v1: ; SYM: # %bb.0: # %entry ; SYM: li 3, 1 ; SYM: blr -; SYM: .csect .eh_info_table[RW],2 +; SYM: .csect .eh_info_table[RW],5 ; SYM: __ehinfo.1: ; SYM: .vbyte 4, 0 ; SYM32: .align 2 diff --git a/llvm/test/CodeGen/PowerPC/aix-return55.ll b/llvm/test/CodeGen/PowerPC/aix-return55.ll --- a/llvm/test/CodeGen/PowerPC/aix-return55.ll +++ b/llvm/test/CodeGen/PowerPC/aix-return55.ll @@ -23,22 +23,23 @@ ;CHECKOBJ: 00000000 <.text>: ;CHECKOBJ-NEXT: 0: 38 60 00 37 li 3, 55 -;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr{{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000008 <.rodata.str1.1>: -;CHECKOBJ-NEXT: 8: 68 65 6c 6c xori 5, 3, 27756 -;CHECKOBJ-NEXT: c: 6f 77 6f 72 xoris 23, 27, 28530 -;CHECKOBJ-NEXT: 10: 0a 00 00 00 tdlti 0, 0{{[[:space:]] *}} +;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr +;CHECKOBJ-NEXT: ...{{[[:space:]] *}} +;CHECKOBJ-NEXT: 00000020 <.rodata.str1.1>: +;CHECKOBJ-NEXT: 20: 68 65 6c 6c xori 5, 3, 27756 +;CHECKOBJ-NEXT: 24: 6f 77 6f 72 xoris 23, 27, 28530 +;CHECKOBJ-NEXT: 28: 0a 00 00 00 tdlti 0, 0{{[[:space:]] *}} ;CHECKOBJ-NEXT: Disassembly of section .data:{{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000018 : -;CHECKOBJ-NEXT: 18: 00 01 23 45 -;CHECKOBJ-NEXT: 1c: 67 8a bc de oris 10, 28, 48350{{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000020 : -;CHECKOBJ-NEXT: 20: 40 14 00 00 bdnzf 20, 0x20 -;CHECKOBJ-NEXT: 24: 00 00 00 00 {{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000028 : -;CHECKOBJ-NEXT: 28: 00 00 00 00 -;CHECKOBJ-NEXT: 2c: 00 00 00 34 -;CHECKOBJ-NEXT: 30: 00 00 00 00 +;CHECKOBJ-NEXT: 00000040 : +;CHECKOBJ-NEXT: 40: 00 01 23 45 +;CHECKOBJ-NEXT: 44: 67 8a bc de oris 10, 28, 48350{{[[:space:]] *}} +;CHECKOBJ-NEXT: 00000048 : +;CHECKOBJ-NEXT: 48: 40 14 00 00 bdnzf 20, 0x48 +;CHECKOBJ-NEXT: 4c: 00 00 00 00 {{[[:space:]] *}} +;CHECKOBJ-NEXT: 00000050 : +;CHECKOBJ-NEXT: 50: 00 00 00 00 +;CHECKOBJ-NEXT: 54: 00 00 00 5c +;CHECKOBJ-NEXT: 58: 00 00 00 00 ;CHECKSECT: Sections [ ;CHECKSECT-NEXT: Section { @@ -46,7 +47,7 @@ ;CHECKSECT-NEXT: Name: .text ;CHECKSECT-NEXT: PhysicalAddress: 0x0 ;CHECKSECT-NEXT: VirtualAddress: 0x0 -;CHECKSECT-NEXT: Size: 0x14 +;CHECKSECT-NEXT: Size: 0x2C ;CHECKSECT-NEXT: RawDataOffset: 0x64 ;CHECKSECT-NEXT: RelocationPointer: 0x0 ;CHECKSECT-NEXT: LineNumberPointer: 0x0 @@ -57,11 +58,11 @@ ;CHECKSECT-NEXT: Section { ;CHECKSECT-NEXT: Index: 2 ;CHECKSECT-NEXT: Name: .data -;CHECKSECT-NEXT: PhysicalAddress: 0x18 -;CHECKSECT-NEXT: VirtualAddress: 0x18 +;CHECKSECT-NEXT: PhysicalAddress: 0x40 +;CHECKSECT-NEXT: VirtualAddress: 0x40 ;CHECKSECT-NEXT: Size: 0x1C -;CHECKSECT-NEXT: RawDataOffset: 0x78 -;CHECKSECT-NEXT: RelocationPointer: 0x94 +;CHECKSECT-NEXT: RawDataOffset: 0x90 +;CHECKSECT-NEXT: RelocationPointer: 0xAC ;CHECKSECT-NEXT: LineNumberPointer: 0x0 ;CHECKSECT-NEXT: NumberOfRelocations: 2 ;CHECKSECT-NEXT: NumberOfLineNumbers: 0 diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-variables-ppc32.ll b/llvm/test/CodeGen/PowerPC/aix-tls-variables-ppc32.ll --- a/llvm/test/CodeGen/PowerPC/aix-tls-variables-ppc32.ll +++ b/llvm/test/CodeGen/PowerPC/aix-tls-variables-ppc32.ll @@ -10,19 +10,19 @@ ; When data-sections is false, we emit data into the .data / .tdata sections. ; Int global variable, TLS/Non-TLS, local/external/weak/common linkage -; CHECK: .csect global_int_external_val_initialized[RW],2 +; CHECK: .csect global_int_external_val_initialized[RW],5 ; CHECK-NEXT: .globl global_int_external_val_initialized[RW] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 1 -; NODATASEC: .csect .data[RW],3 +; NODATASEC: .csect .data[RW],5 ; NODATASEC-NEXT: .globl global_int_external_val_initialized ; NODATASEC-NEXT: .align 2 ; NODATASEC-NEXT:global_int_external_val_initialized: ; NODATASEC-NEXT: .vbyte 4, 1 @global_int_external_val_initialized = global i32 1, align 4 -; CHECK-NEXT: .csect global_int_external_zero_initialized[RW],2 +; CHECK-NEXT: .csect global_int_external_zero_initialized[RW],5 ; CHECK-NEXT: .globl global_int_external_zero_initialized[RW] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 0 @@ -33,19 +33,19 @@ ; NODATASEC-NEXT: .vbyte 4, 0 @global_int_external_zero_initialized = global i32 0, align 4 -; CHECK-NEXT: .csect tls_global_int_external_val_initialized[TL],2 +; CHECK-NEXT: .csect tls_global_int_external_val_initialized[TL],5 ; CHECK-NEXT: .globl tls_global_int_external_val_initialized[TL] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 1 -; NODATASEC-NEXT: .csect .tdata[TL],3 +; NODATASEC-NEXT: .csect .tdata[TL],5 ; NODATASEC-NEXT: .globl tls_global_int_external_val_initialized ; NODATASEC-NEXT: .align 2 ; NODATASEC-NEXT:tls_global_int_external_val_initialized: ; NODATASEC-NEXT: .vbyte 4, 1 @tls_global_int_external_val_initialized = thread_local global i32 1, align 4 -; CHECK-NEXT: .csect tls_global_int_external_zero_initialized[TL],2 +; CHECK-NEXT: .csect tls_global_int_external_zero_initialized[TL],5 ; CHECK-NEXT: .globl tls_global_int_external_zero_initialized[TL] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 0 @@ -56,7 +56,7 @@ ; NODATASEC-NEXT: .vbyte 4, 0 @tls_global_int_external_zero_initialized = thread_local global i32 0, align 4 -; CHECK-NEXT: .csect global_int_local_val_initialized[RW],2 +; CHECK-NEXT: .csect global_int_local_val_initialized[RW],5 ; CHECK-NEXT: .lglobl global_int_local_val_initialized[RW] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 2 @@ -68,7 +68,7 @@ ; NODATASEC-NEXT: .vbyte 4, 2 @global_int_local_val_initialized = internal global i32 2, align 4 -; CHECK-NEXT: .csect tls_global_int_local_val_initialized[TL],2 +; CHECK-NEXT: .csect tls_global_int_local_val_initialized[TL],5 ; CHECK-NEXT: .lglobl tls_global_int_local_val_initialized[TL] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 2 @@ -88,7 +88,7 @@ ; NODATASEC-NEXT: .lcomm tls_global_int_local_zero_initialized,4,tls_global_int_local_zero_initialized[UL],2 @tls_global_int_local_zero_initialized = internal thread_local global i32 0, align 4 -; CHECK-NEXT: .csect global_int_weak_zero_initialized[RW],2 +; CHECK-NEXT: .csect global_int_weak_zero_initialized[RW],5 ; CHECK-NEXT: .weak global_int_weak_zero_initialized[RW] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 0 @@ -100,7 +100,7 @@ ; NODATASEC-NEXT: .vbyte 4, 0 @global_int_weak_zero_initialized = weak global i32 0, align 4 -; CHECK-NEXT: .csect tls_global_int_weak_zero_initialized[TL],2 +; CHECK-NEXT: .csect tls_global_int_weak_zero_initialized[TL],5 ; CHECK-NEXT: .weak tls_global_int_weak_zero_initialized[TL] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 0 @@ -120,7 +120,7 @@ ; NODATASEC-NEXT: .comm tls_global_int_common_zero_initialized[UL],4,2 @tls_global_int_common_zero_initialized = common thread_local global i32 0, align 4 -; CHECK-NEXT: .csect global_int_weak_val_initialized[RW],2 +; CHECK-NEXT: .csect global_int_weak_val_initialized[RW],5 ; CHECK-NEXT: .weak global_int_weak_val_initialized[RW] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 1 @@ -132,7 +132,7 @@ ; NODATASEC-NEXT: .vbyte 4, 1 @global_int_weak_val_initialized = weak global i32 1, align 4 -; CHECK-NEXT: .csect tls_global_int_weak_val_initialized[TL],2 +; CHECK-NEXT: .csect tls_global_int_weak_val_initialized[TL],5 ; CHECK-NEXT: .weak tls_global_int_weak_val_initialized[TL] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 1 @@ -174,7 +174,7 @@ ; Long long global variable, TLS/Non-TLS, local/weak linkage -; CHECK-NEXT: .csect global_long_long_internal_val_initialized[RW],3 +; CHECK-NEXT: .csect global_long_long_internal_val_initialized[RW],5 ; CHECK-NEXT: .lglobl global_long_long_internal_val_initialized[RW] ; CHECK-NEXT: .align 3 ; CHECK-NEXT: .vbyte 4, 0 @@ -187,7 +187,7 @@ ; NODATASEC-NEXT: .vbyte 4, 1 @global_long_long_internal_val_initialized = internal global i64 1, align 8 -; CHECK-NEXT: .csect tls_global_long_long_internal_val_initialized[TL],3 +; CHECK-NEXT: .csect tls_global_long_long_internal_val_initialized[TL],5 ; CHECK-NEXT: .lglobl tls_global_long_long_internal_val_initialized[TL] ; CHECK-NEXT: .align 3 ; CHECK-NEXT: .vbyte 4, 0 @@ -208,7 +208,7 @@ ; NODATASEC-NEXT: .lcomm tls_global_long_long_internal_zero_initialized,8,tls_global_long_long_internal_zero_initialized[UL],3 @tls_global_long_long_internal_zero_initialized = internal thread_local global i64 0, align 8 -; CHECK-NEXT: .csect global_long_long_weak_val_initialized[RW],3 +; CHECK-NEXT: .csect global_long_long_weak_val_initialized[RW],5 ; CHECK-NEXT: .weak global_long_long_weak_val_initialized[RW] ; CHECK-NEXT: .align 3 ; CHECK-NEXT: .vbyte 4, 0 @@ -221,7 +221,7 @@ ; NODATASEC-NEXT: .vbyte 4, 1 @global_long_long_weak_val_initialized = weak global i64 1, align 8 -; CHECK-NEXT: .csect tls_global_long_long_weak_val_initialized[TL],3 +; CHECK-NEXT: .csect tls_global_long_long_weak_val_initialized[TL],5 ; CHECK-NEXT: .weak tls_global_long_long_weak_val_initialized[TL] ; CHECK-NEXT: .align 3 ; CHECK-NEXT: .vbyte 4, 0 @@ -234,7 +234,7 @@ ; NODATASEC-NEXT: .vbyte 4, 1 @tls_global_long_long_weak_val_initialized = weak thread_local global i64 1, align 8 -; CHECK-NEXT: .csect global_long_long_weak_zero_initialized[RW],3 +; CHECK-NEXT: .csect global_long_long_weak_zero_initialized[RW],5 ; CHECK-NEXT: .weak global_long_long_weak_zero_initialized[RW] ; CHECK-NEXT: .align 3 ; CHECK-NEXT: .vbyte 4, 0 @@ -247,7 +247,7 @@ ; NODATASEC-NEXT: .vbyte 4, 0 @global_long_long_weak_zero_initialized = weak global i64 0, align 8 -; CHECK-NEXT: .csect tls_global_long_long_weak_zero_initialized[TL],3 +; CHECK-NEXT: .csect tls_global_long_long_weak_zero_initialized[TL],5 ; CHECK-NEXT: .weak tls_global_long_long_weak_zero_initialized[TL] ; CHECK-NEXT: .align 3 ; CHECK-NEXT: .vbyte 4, 0 diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll --- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll +++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll @@ -90,7 +90,7 @@ ; RELOC-NEXT: } ; RELOC-NEXT: Section (index: 2) .data { ; RELOC-NEXT: Relocation { -; RELOC-NEXT: Virtual Address: 0x70 +; RELOC-NEXT: Virtual Address: 0x84 ; RELOC-NEXT: Symbol: .storesTIUninit (5) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 @@ -98,7 +98,7 @@ ; RELOC-NEXT: Type: R_POS (0x0) ; RELOC-NEXT: } ; RELOC-NEXT: Relocation { -; RELOC-NEXT: Virtual Address: 0x74 +; RELOC-NEXT: Virtual Address: 0x88 ; RELOC-NEXT: Symbol: TOC (21) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 @@ -106,7 +106,7 @@ ; RELOC-NEXT: Type: R_POS (0x0) ; RELOC-NEXT: } ; RELOC-NEXT: Relocation { -; RELOC-NEXT: Virtual Address: 0x7C +; RELOC-NEXT: Virtual Address: 0x90 ; RELOC-NEXT: Symbol: .loadsTGInit (7) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 @@ -114,7 +114,7 @@ ; RELOC-NEXT: Type: R_POS (0x0) ; RELOC-NEXT: } ; RELOC-NEXT: Relocation { -; RELOC-NEXT: Virtual Address: 0x80 +; RELOC-NEXT: Virtual Address: 0x94 ; RELOC-NEXT: Symbol: TOC (21) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 @@ -122,7 +122,7 @@ ; RELOC-NEXT: Type: R_POS (0x0) ; RELOC-NEXT: } ; RELOC-NEXT: Relocation { -; RELOC-NEXT: Virtual Address: 0x88 +; RELOC-NEXT: Virtual Address: 0xA0 ; RELOC-NEXT: Symbol: TIUninit (37) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 @@ -130,7 +130,7 @@ ; RELOC-NEXT: Type: R_TLSM (0x24) ; RELOC-NEXT: } ; RELOC-NEXT: Relocation { -; RELOC-NEXT: Virtual Address: 0x8C +; RELOC-NEXT: Virtual Address: 0xC0 ; RELOC-NEXT: Symbol: TIUninit (37) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 @@ -138,7 +138,7 @@ ; RELOC-NEXT: Type: R_TLS (0x20) ; RELOC-NEXT: } ; RELOC-NEXT: Relocation { -; RELOC-NEXT: Virtual Address: 0x90 +; RELOC-NEXT: Virtual Address: 0xE0 ; RELOC-NEXT: Symbol: TGInit (35) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 @@ -146,7 +146,7 @@ ; RELOC-NEXT: Type: R_TLSM (0x24) ; RELOC-NEXT: } ; RELOC-NEXT: Relocation { -; RELOC-NEXT: Virtual Address: 0x94 +; RELOC-NEXT: Virtual Address: 0x100 ; RELOC-NEXT: Symbol: TGInit (35) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 @@ -154,7 +154,7 @@ ; RELOC-NEXT: Type: R_TLS (0x20) ; RELOC-NEXT: } ; RELOC-NEXT: Relocation { -; RELOC-NEXT: Virtual Address: 0x98 +; RELOC-NEXT: Virtual Address: 0x120 ; RELOC-NEXT: Symbol: GInit (15) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 @@ -212,7 +212,7 @@ ; SYM-NEXT: SectionLen: 104 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 4 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_PR (0x0) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -302,7 +302,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: 13 ; SYM-NEXT: Name: .data -; SYM-NEXT: Value (RelocatableAddress): 0x6C +; SYM-NEXT: Value (RelocatableAddress): 0x80 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -312,7 +312,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_RW (0x5) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -322,7 +322,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: 15 ; SYM-NEXT: Name: GInit -; SYM-NEXT: Value (RelocatableAddress): 0x6C +; SYM-NEXT: Value (RelocatableAddress): 0x80 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_EXT (0x2) @@ -342,7 +342,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: 17 ; SYM-NEXT: Name: storesTIUninit -; SYM-NEXT: Value (RelocatableAddress): 0x70 +; SYM-NEXT: Value (RelocatableAddress): 0x84 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_EXT (0x2) @@ -362,7 +362,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: 19 ; SYM-NEXT: Name: loadsTGInit -; SYM-NEXT: Value (RelocatableAddress): 0x7C +; SYM-NEXT: Value (RelocatableAddress): 0x90 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_EXT (0x2) @@ -382,7 +382,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: 21 ; SYM-NEXT: Name: TOC -; SYM-NEXT: Value (RelocatableAddress): 0x88 +; SYM-NEXT: Value (RelocatableAddress): 0x9C ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -402,7 +402,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: 23 ; SYM-NEXT: Name: .TIUninit -; SYM-NEXT: Value (RelocatableAddress): 0x88 +; SYM-NEXT: Value (RelocatableAddress): 0xA0 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -412,7 +412,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -422,7 +422,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: 25 ; SYM-NEXT: Name: TIUninit -; SYM-NEXT: Value (RelocatableAddress): 0x8C +; SYM-NEXT: Value (RelocatableAddress): 0xC0 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -432,7 +432,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -442,7 +442,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: 27 ; SYM-NEXT: Name: .TGInit -; SYM-NEXT: Value (RelocatableAddress): 0x90 +; SYM-NEXT: Value (RelocatableAddress): 0xE0 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -452,7 +452,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -462,7 +462,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: 29 ; SYM-NEXT: Name: TGInit -; SYM-NEXT: Value (RelocatableAddress): 0x94 +; SYM-NEXT: Value (RelocatableAddress): 0x100 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -472,7 +472,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -482,7 +482,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: 31 ; SYM-NEXT: Name: GInit -; SYM-NEXT: Value (RelocatableAddress): 0x98 +; SYM-NEXT: Value (RelocatableAddress): 0x120 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -492,7 +492,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -512,7 +512,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TL (0x14) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -568,9 +568,9 @@ ; DIS-NEXT: stw 0, 8(1) ; DIS-NEXT: stwu 1, -32(1) ; DIS-NEXT: mr 6, 3 -; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 0(2) +; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 4(2) ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 23) .TIUninit[TC] -; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(2) +; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 36(2) ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 25) TIUninit[TC] ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0 ; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__tls_get_addr[PR] @@ -583,13 +583,13 @@ ; DIS-NEXT: mflr 0 ; DIS-NEXT: stw 0, 8(1) ; DIS-NEXT: stwu 1, -32(1) -; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 8(2) +; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 68(2) ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 27) .TGInit[TC] -; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 12(2) +; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 100(2) ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 29) TGInit[TC] ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0 ; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1) .__tls_get_addr[PR] -; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 16(2) +; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 132(2) ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 31) GInit[TC] ; DIS-NEXT: lwz 3, 0(3) ; DIS-NEXT: lwz 4, 0(4) @@ -602,35 +602,35 @@ ; DIS-NEXT: 68: 00 00 00 06 ; DIS: Disassembly of section .data: -; DIS: 0000006c (idx: 15) GInit: -; DIS-NEXT: 6c: 00 00 00 01 -; DIS: 00000070 (idx: 17) storesTIUninit[DS]: -; DIS-NEXT: 70: 00 00 00 00 -; DIS-NEXT: 00000070: R_POS (idx: 5) .storesTIUninit -; DIS-NEXT: 74: 00 00 00 88 -; DIS-NEXT: 00000074: R_POS (idx: 21) TOC[TC0] -; DIS-NEXT: 78: 00 00 00 00 -; DIS: 0000007c (idx: 19) loadsTGInit[DS]: -; DIS-NEXT: 7c: 00 00 00 30 -; DIS-NEXT: 0000007c: R_POS (idx: 7) .loadsTGInit -; DIS-NEXT: 80: 00 00 00 88 -; DIS-NEXT: 00000080: R_POS (idx: 21) TOC[TC0] +; DIS: 00000080 (idx: 15) GInit: +; DIS-NEXT: 80: 00 00 00 01 +; DIS: 00000084 (idx: 17) storesTIUninit[DS]: ; DIS-NEXT: 84: 00 00 00 00 -; DIS: 00000088 (idx: 23) .TIUninit[TC]: -; DIS-NEXT: 88: 00 00 00 00 -; DIS-NEXT: 00000088: R_TLSM (idx: 37) TIUninit[UL] -; DIS: 0000008c (idx: 25) TIUninit[TC]: -; DIS-NEXT: 8c: 00 00 00 04 -; DIS-NEXT: 0000008c: R_TLS (idx: 37) TIUninit[UL] -; DIS: 00000090 (idx: 27) .TGInit[TC]: -; DIS-NEXT: 90: 00 00 00 00 -; DIS-NEXT: 00000090: R_TLSM (idx: 35) TGInit -; DIS: 00000094 (idx: 29) TGInit[TC]: -; DIS-NEXT: 94: 00 00 00 00 -; DIS-NEXT: 00000094: R_TLS (idx: 35) TGInit -; DIS: 00000098 (idx: 31) GInit[TC]: -; DIS-NEXT: 98: 00 00 00 6c -; DIS-NEXT: 00000098: R_POS (idx: 15) GInit +; DIS-NEXT: 00000084: R_POS (idx: 5) .storesTIUninit +; DIS-NEXT: 88: 00 00 00 9c +; DIS-NEXT: 00000088: R_POS (idx: 21) TOC[TC0] +; DIS-NEXT: 8c: 00 00 00 00 +; DIS: 00000090 (idx: 19) loadsTGInit[DS]: +; DIS-NEXT: 90: 00 00 00 30 +; DIS-NEXT: 00000090: R_POS (idx: 7) .loadsTGInit +; DIS-NEXT: 94: 00 00 00 9c +; DIS-NEXT: 00000094: R_POS (idx: 21) TOC[TC0] +; DIS-NEXT: 98: 00 00 00 00 +; DIS: 000000a0 (idx: 23) .TIUninit[TC]: +; DIS-NEXT: a0: 00 00 00 00 +; DIS-NEXT: 000000a0: R_TLSM (idx: 37) TIUninit[UL] +; DIS: 000000c0 (idx: 25) TIUninit[TC]: +; DIS-NEXT: c0: 00 00 00 04 +; DIS-NEXT: 000000c0: R_TLS (idx: 37) TIUninit[UL] +; DIS: 000000e0 (idx: 27) .TGInit[TC]: +; DIS-NEXT: e0: 00 00 00 00 +; DIS-NEXT: 000000e0: R_TLSM (idx: 35) TGInit +; DIS: 00000100 (idx: 29) TGInit[TC]: +; DIS-NEXT: 100: 00 00 00 00 +; DIS-NEXT: 00000100: R_TLS (idx: 35) TGInit +; DIS: 00000120 (idx: 31) GInit[TC]: +; DIS-NEXT: 120: 00 00 00 80 +; DIS-NEXT: 00000120: R_POS (idx: 15) GInit ; DIS: Disassembly of section .tdata: ; DIS: 00000000 (idx: 35) TGInit: diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll --- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll +++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll @@ -36,7 +36,7 @@ ; SECTION-NEXT: Name: .tdata ; SECTION-NEXT: PhysicalAddress: 0x0 ; SECTION-NEXT: VirtualAddress: 0x0 -; SECTION-NEXT: Size: 0x30 +; SECTION-NEXT: Size: 0xE8 ; SECTION-NEXT: RawDataOffset: 0x90 ; SECTION-NEXT: RelocationPointer: 0x0 ; SECTION-NEXT: LineNumberPointer: 0x0 @@ -47,8 +47,8 @@ ; SECTION-NEXT: Section { ; SECTION-NEXT: Index: 3 ; SECTION-NEXT: Name: .tbss -; SECTION-NEXT: PhysicalAddress: 0x30 -; SECTION-NEXT: VirtualAddress: 0x30 +; SECTION-NEXT: PhysicalAddress: 0xE8 +; SECTION-NEXT: VirtualAddress: 0xE8 ; SECTION-NEXT: Size: 0x18 ; SECTION-NEXT: RawDataOffset: 0x0 ; SECTION-NEXT: RelocationPointer: 0x0 @@ -129,7 +129,7 @@ ; SYMS-NEXT: SectionLen: 0 ; SYMS-NEXT: ParameterHashIndex: 0x0 ; SYMS-NEXT: TypeChkSectNum: 0x0 -; SYMS-NEXT: SymbolAlignmentLog2: 2 +; SYMS-NEXT: SymbolAlignmentLog2: 5 ; SYMS-NEXT: SymbolType: XTY_SD (0x1) ; SYMS-NEXT: StorageMappingClass: XMC_PR (0x0) ; SYMS-NEXT: StabInfoIndex: 0x0 @@ -175,10 +175,10 @@ ; SYMS: ParameterHashIndex: 0x0 ; SYMS-NEXT: TypeChkSectNum: 0x0 ; SYMS-DATASECT: SymbolAlignmentLog2: 2 -; SYMS-DATASECT-NEXT: SymbolType: XTY_SD (0x1) +; SYMS-DATASECT-NEXT: SymbolType: XTY_CM (0x3) ; SYMS-NODATASECT: SymbolAlignmentLog2: 0 ; SYMS-NODATASECT-NEXT: SymbolType: XTY_LD (0x2) -; SYMS: StorageMappingClass: XMC_RO (0x1) +; SYMS: StorageMappingClass: XMC_UL (0x15) ; SYMS-NEXT: StabInfoIndex: 0x0 ; SYMS-NEXT: StabSectNum: 0x0 ; SYMS-NEXT: } @@ -206,7 +206,7 @@ ; SYMS-NODATASECT-NEXT: } ; SYMS: Symbol { -; SYMS-DATASECT: Index: [[#INDX+8]] +; SYMS-DATASECT: Index: [[#INDX+28]] ; SYMS-NODATASECT: Index: [[#INDX+12]] ; SYMS: Name: tls_global_int_external_val_initialized ; SYMS-NEXT: Value (RelocatableAddress): 0x0 diff --git a/llvm/test/CodeGen/PowerPC/aix-weak.ll b/llvm/test/CodeGen/PowerPC/aix-weak.ll --- a/llvm/test/CodeGen/PowerPC/aix-weak.ll +++ b/llvm/test/CodeGen/PowerPC/aix-weak.ll @@ -123,7 +123,7 @@ ; CHECKSYM-NEXT: SectionLen: 136 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 4 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_PR (0x0) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll @@ -60,23 +60,23 @@ } -; CHECK: .csect ivar[RW],2 +; CHECK: .csect ivar[RW],5 ; CHECK-NEXT: .globl ivar[RW] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 35 # 0x23 -; CHECK-NEXT: .csect const_ivar[RO],2 +; CHECK-NEXT: .csect const_ivar[RO],5 ; CHECK-NEXT: .globl const_ivar[RO] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 35 # 0x23 ; CHECK-NEXT: .comm a[RW],4,2 ; CHECK-NEXT: .comm f[RW],4,2 -; CHECK-NEXT: .csect .rodata.str1.1L...str[RO],2 +; CHECK-NEXT: .csect .rodata.str1.1L...str[RO],5 ; CHECK-NEXT: .string "abcdefgh" ; CHECK32: .csect p[RW],2 ; CHECK32-NEXT: .globl p[RW] ; CHECK32-NEXT: .align 2 ; CHECK32-NEXT: .vbyte 4, .rodata.str1.1L...str[RO] -; CHECK64: .csect p[RW],3 +; CHECK64: .csect p[RW],5 ; CHECK64-NEXT: .globl p[RW] ; CHECK64-NEXT: .align 3 ; CHECK64-NEXT: .vbyte 8, .rodata.str1.1L...str[RO] @@ -90,50 +90,53 @@ ; CHECK-NEXT: L..C3: ; CHECK-NEXT: .tc f[TC],f[RW] -; CHECKOBJ: 00000038 (idx: 7) const_ivar[RO]: -; CHECKOBJ-NEXT: 38: 00 00 00 23 +; CHECKOBJ: 00000040 (idx: 7) const_ivar[RO]: +; CHECKOBJ-NEXT: 40: 00 00 00 23 +; CHECKOBJ-NEXT: ... ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 0000003c (idx: 9) .rodata.str1.1L...str[RO]: -; CHECKOBJ-NEXT: 3c: 61 62 63 64 -; CHECKOBJ-NEXT: 40: 65 66 67 68 -; CHECKOBJ-NEXT: 44: 00 00 00 00 +; CHECKOBJ-NEXT: 00000060 (idx: 9) .rodata.str1.1L...str[RO]: +; CHECKOBJ-NEXT: 60: 61 62 63 64 +; CHECKOBJ-NEXT: 64: 65 66 67 68 +; CHECKOBJ-NEXT: 68: 00 00 00 00 ; CHECKOBJ-EMPTY: ; CHECKOBJ-NEXT: Disassembly of section .data: ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000048 (idx: 11) ivar[RW]: -; CHECKOBJ-NEXT: 48: 00 00 00 23 +; CHECKOBJ-NEXT: 00000080 (idx: 11) ivar[RW]: +; CHECKOBJ-NEXT: 80: 00 00 00 23 +; CHECKOBJ-NEXT: ... ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 0000004c (idx: 13) p[RW]: -; CHECKOBJ-NEXT: 4c: 00 00 00 3c +; CHECKOBJ-NEXT: 000000a0 (idx: 13) p[RW]: +; CHECKOBJ-NEXT: a0: 00 00 00 60 ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000050 (idx: 15) foo[DS]: -; CHECKOBJ-NEXT: 50: 00 00 00 00 -; CHECKOBJ-NEXT: 54: 00 00 00 68 -; CHECKOBJ-NEXT: 58: 00 00 00 00 +; CHECKOBJ-NEXT: 000000a4 (idx: 15) foo[DS]: +; CHECKOBJ-NEXT: a4: 00 00 00 00 +; CHECKOBJ-NEXT: a8: 00 00 00 bc +; CHECKOBJ-NEXT: ac: 00 00 00 00 ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 0000005c (idx: 17) bar[DS]: -; CHECKOBJ-NEXT: 5c: 00 00 00 10 -; CHECKOBJ-NEXT: 60: 00 00 00 68 -; CHECKOBJ-NEXT: 64: 00 00 00 00 +; CHECKOBJ-NEXT: 000000b0 (idx: 17) bar[DS]: +; CHECKOBJ-NEXT: b0: 00 00 00 10 +; CHECKOBJ-NEXT: b4: 00 00 00 bc +; CHECKOBJ-NEXT: b8: 00 00 00 00 ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000068 (idx: 21) p[TC]: -; CHECKOBJ-NEXT: 68: 00 00 00 4c +; CHECKOBJ-NEXT: 000000c0 (idx: 21) p[TC]: +; CHECKOBJ-NEXT: c0: 00 00 00 a0 ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 0000006c (idx: 23) ivar[TC]: -; CHECKOBJ-NEXT: 6c: 00 00 00 48 +; CHECKOBJ-NEXT: 000000e0 (idx: 23) ivar[TC]: +; CHECKOBJ-NEXT: e0: 00 00 00 80 +; CHECKOBJ-NEXT: ... ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000070 (idx: 25) a[TC]: -; CHECKOBJ-NEXT: 70: 00 00 00 78 +; CHECKOBJ-NEXT: 00000100 (idx: 25) a[TC]: +; CHECKOBJ-NEXT: 100: 00 00 01 24 ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000074 (idx: 27) f[TC]: -; CHECKOBJ-NEXT: 74: 00 00 00 7c +; CHECKOBJ-NEXT: 00000120 (idx: 27) f[TC]: +; CHECKOBJ-NEXT: 120: 00 00 01 28 ; CHECKOBJ-EMPTY: ; CHECKOBJ-NEXT: Disassembly of section .bss: ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000078 (idx: 29) a[RW]: +; CHECKOBJ-NEXT: 00000124 (idx: 29) a[RW]: ; CHECKOBJ-NEXT: ... ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 0000007c (idx: 31) f[RW]: +; CHECKOBJ-NEXT: 00000128 (idx: 31) f[RW]: ; CHECKOBJ-NEXT: ... diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll @@ -44,7 +44,7 @@ ; CHECK-NOT: .toc -; CHECK: .csect .text[PR],2 +; CHECK: .csect .text[PR],5 ; CHECK-NEXT: .file ; CHECK: .csect .data[RW],5 @@ -232,7 +232,7 @@ ; SYMS-NEXT: SectionLen: 0 ; SYMS-NEXT: ParameterHashIndex: 0x0 ; SYMS-NEXT: TypeChkSectNum: 0x0 -; SYMS-NEXT: SymbolAlignmentLog2: 2 +; SYMS-NEXT: SymbolAlignmentLog2: 5 ; SYMS-NEXT: SymbolType: XTY_SD (0x1) ; SYMS-NEXT: StorageMappingClass: XMC_PR (0x0) ; SYMS-NEXT: StabInfoIndex: 0x0 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll @@ -25,19 +25,19 @@ ; CHECK-NEXT: .globl .ext_fun ; CHECK-NEXT: .align 4 ; CHECK-NEXT: .csect ext_fun[DS] -; CHECK: .csect .ext_fun_sec[PR],2 +; CHECK: .csect .ext_fun_sec[PR],5 ; CHECK-NEXT: .ext_fun: -; CHECK: .csect .ext_const_sec[RO],2 +; CHECK: .csect .ext_const_sec[RO],5 ; CHECK-NEXT: .globl ext_const ; CHECK-NEXT: .align 2 ; CHECK-NEXT: ext_const: ; CHECK-NEXT: .vbyte 4, 1 # 0x1 -; CHECK-NEXT: .csect .ext_var_sec[RW],2 +; CHECK-NEXT: .csect .ext_var_sec[RW],5 ; CHECK-NEXT: .globl ext_var ; CHECK-NEXT: .align 2 ; CHECK-NEXT: ext_var: ; CHECK-NEXT: .vbyte 4, 1 # 0x1 -; CHECK-NEXT: .csect .ext_zvar_sec[RW],2 +; CHECK-NEXT: .csect .ext_zvar_sec[RW],5 ; CHECK-NEXT: .globl ext_zvar ; CHECK-NEXT: .align 2 ; CHECK-NEXT: ext_zvar: @@ -49,35 +49,38 @@ ; CHECK-NEXT: .tc ext_zvar[TC],ext_zvar ; CHECKOBJ: 00000000 (idx: 5) .ext_fun: -; CHECKOBJ-NEXT: 0: 80 62 00 00 lwz 3, 0(2) -; CHECKOBJ-NEXT: 4: 80 82 00 04 lwz 4, 4(2) +; CHECKOBJ-NEXT: 0: 80 62 00 10 lwz 3, 16(2) +; CHECKOBJ-NEXT: 4: 80 82 00 30 lwz 4, 48(2) ; CHECKOBJ-NEXT: 8: 80 63 00 00 lwz 3, 0(3) ; CHECKOBJ-NEXT: c: 80 84 00 00 lwz 4, 0(4) ; CHECKOBJ-NEXT: 10: 7c 63 22 14 add 3, 3, 4 ; CHECKOBJ-NEXT: 14: 38 63 00 01 addi 3, 3, 1 ; CHECKOBJ-NEXT: 18: 4e 80 00 20 blr ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 0000001c (idx: 9) ext_const: -; CHECKOBJ-NEXT: 1c: 00 00 00 01 +; CHECKOBJ-NEXT: 00000020 (idx: 9) ext_const: +; CHECKOBJ-NEXT: 20: 00 00 00 01 ; CHECKOBJ-EMPTY: ; CHECKOBJ-NEXT: Disassembly of section .data: ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000020 (idx: 13) ext_var: -; CHECKOBJ-NEXT: 20: 00 00 00 01 +; CHECKOBJ-NEXT: 00000040 (idx: 13) ext_var: +; CHECKOBJ-NEXT: 40: 00 00 00 01 +; CHECKOBJ-EMPTY: +; CHECKOBJ-NEXT: 00000060 (idx: 17) ext_zvar: +; CHECKOBJ-NEXT: 60: 00 00 00 00 ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000024 (idx: 17) ext_zvar: -; CHECKOBJ-NEXT: 24: 00 00 00 00 +; CHECKOBJ-NEXT: 00000064 (idx: 19) ext_fun[DS]: +; CHECKOBJ-NEXT: 64: 00 00 00 00 +; CHECKOBJ-NEXT: 68: 00 00 00 70 +; CHECKOBJ-NEXT: 6c: 00 00 00 00 ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000028 (idx: 19) ext_fun[DS]: -; CHECKOBJ-NEXT: 28: 00 00 00 00 -; CHECKOBJ-NEXT: 2c: 00 00 00 34 -; CHECKOBJ-NEXT: 30: 00 00 00 00 +; CHECKOBJ-NEXT: 00000070 (idx: 21) TOC[TC0]: +; CHECKOBJ-NEXT: ... ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000034 (idx: 23) ext_var[TC]: -; CHECKOBJ-NEXT: 34: 00 00 00 20 +; CHECKOBJ-NEXT: 00000080 (idx: 23) ext_var[TC]: +; CHECKOBJ-NEXT: 80: 00 00 00 40 ; CHECKOBJ-EMPTY: -; CHECKOBJ-NEXT: 00000038 (idx: 25) ext_zvar[TC]: -; CHECKOBJ-NEXT: 38: 00 00 00 24 +; CHECKOBJ-NEXT: 000000a0 (idx: 25) ext_zvar[TC]: +; CHECKOBJ-NEXT: a0: 00 00 00 60 ; CHECKSYM: Symbol {{[{][[:space:]] *}}Index: [[#INDX:]]{{[[:space:]] *}}Name: .ext_fun_sec ; CHECKSYM-NEXT: Value (RelocatableAddress): 0x0 @@ -90,7 +93,7 @@ ; CHECKSYM-NEXT: SectionLen: 28 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 4 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_PR (0x0) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 @@ -120,7 +123,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#INDX+4]] ; CHECKSYM-NEXT: Name: .ext_const_sec -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x1C +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x20 ; CHECKSYM-NEXT: Section: .text ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -130,7 +133,7 @@ ; CHECKSYM-NEXT: SectionLen: 4 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 2 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_RO (0x1) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 @@ -140,7 +143,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#INDX+6]] ; CHECKSYM-NEXT: Name: ext_const -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x1C +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x20 ; CHECKSYM-NEXT: Section: .text ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_EXT (0x2) @@ -160,7 +163,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#INDX+8]] ; CHECKSYM-NEXT: Name: .ext_var_sec -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x20 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x40 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -170,7 +173,7 @@ ; CHECKSYM-NEXT: SectionLen: 4 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 2 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_RW (0x5) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 @@ -180,7 +183,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#INDX+10]] ; CHECKSYM-NEXT: Name: ext_var -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x20 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x40 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_EXT (0x2) @@ -200,7 +203,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#INDX+12]] ; CHECKSYM-NEXT: Name: .ext_zvar_sec -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x24 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x60 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -210,7 +213,7 @@ ; CHECKSYM-NEXT: SectionLen: 4 ; CHECKSYM-NEXT: ParameterHashIndex: 0x0 ; CHECKSYM-NEXT: TypeChkSectNum: 0x0 -; CHECKSYM-NEXT: SymbolAlignmentLog2: 2 +; CHECKSYM-NEXT: SymbolAlignmentLog2: 5 ; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1) ; CHECKSYM-NEXT: StorageMappingClass: XMC_RW (0x5) ; CHECKSYM-NEXT: StabInfoIndex: 0x0 @@ -220,7 +223,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#INDX+14]] ; CHECKSYM-NEXT: Name: ext_zvar -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x24 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x60 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_EXT (0x2) @@ -240,7 +243,7 @@ ; CHECKSYM-NEXT: Symbol { ; CHECKSYM-NEXT: Index: [[#INDX+16]] ; CHECKSYM-NEXT: Name: ext_fun -; CHECKSYM-NEXT: Value (RelocatableAddress): 0x28 +; CHECKSYM-NEXT: Value (RelocatableAddress): 0x64 ; CHECKSYM-NEXT: Section: .data ; CHECKSYM-NEXT: Type: 0x0 ; CHECKSYM-NEXT: StorageClass: C_EXT (0x2) diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll @@ -34,7 +34,7 @@ ret void } -; ASM: .csect .foo[PR],2 +; ASM: .csect .foo[PR],5 ; ASM-NEXT: .globl foo[DS] # -- Begin function foo ; ASM-NEXT: .globl .foo[PR] ; ASM-NEXT: .align 4 @@ -43,7 +43,7 @@ ; ASM-NEXT: .vbyte {{[0-9]+}}, .foo[PR] ; ASM-NEXT: .vbyte {{[0-9]+}}, TOC[TC0] ; ASM-NEXT: .vbyte {{[0-9]+}}, 0 -; ASM-NEXT: .csect .foo[PR],2 +; ASM-NEXT: .csect .foo[PR],5 ; ASM-NEXT: .alias_foo: ; ASM-NEXT: # %bb.0: # %entry ; ASM-NEXT: blr diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll @@ -16,8 +16,8 @@ ; CHECK: .comm common[RW],4,2 -; ASM32-NEXT: .csect .data[RW],2 -; ASM64-NEXT: .csect .data[RW],3 +; ASM32-NEXT: .csect .data[RW],5 +; ASM64-NEXT: .csect .data[RW],5 ; CHECK-NEXT: .globl pointer ; ASM32-NEXT: .align 2 ; ASM64-NEXT: .align 3 @@ -50,7 +50,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_RW (0x5) ; SYM-NEXT: StabInfoIndex: 0x0 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll @@ -26,38 +26,39 @@ ret i8 %1 } -; CHECK: .csect .rodata.str2.2[RO],2 +; CHECK: .csect .rodata.str2.2[RO],5 ; CHECK-NEXT: .align 1 ; CHECK-NEXT: L..magic16: ; CHECK-NEXT: .vbyte 2, 264 # 0x108 ; CHECK-NEXT: .vbyte 2, 272 # 0x110 ; CHECK-NEXT: .vbyte 2, 213 # 0xd5 ; CHECK-NEXT: .vbyte 2, 0 # 0x0 -; CHECK-NEXT: .csect .rodata.str4.4[RO],2 +; CHECK-NEXT: .csect .rodata.str4.4[RO],5 ; CHECK-NEXT: .align 2 ; CHECK-NEXT: L..magic32: ; CHECK-NEXT: .vbyte 4, 464 # 0x1d0 ; CHECK-NEXT: .vbyte 4, 472 # 0x1d8 ; CHECK-NEXT: .vbyte 4, 413 # 0x19d ; CHECK-NEXT: .vbyte 4, 0 # 0x0 -; CHECK-NEXT: .csect .rodata.str1.1[RO],2 +; CHECK-NEXT: .csect .rodata.str1.1[RO],5 ; CHECK-NEXT: L..strA: ; CHECK-NEXT: .byte 'h,'e,'l,'l,'o,' ,'w,'o,'r,'l,'d,'!,0012,0000 ; CHECK-NEXT: L...str: ; CHECK-NEXT: .string "abcdefgh" -; CHECKOBJ: 00000010 <.rodata.str2.2>: -; CHECKOBJ-NEXT: 10: 01 08 01 10 -; CHECKOBJ-NEXT: 14: 00 d5 00 00 {{.*}}{{[[:space:]] *}} -; CHECKOBJ-NEXT: 00000018 <.rodata.str4.4>: -; CHECKOBJ-NEXT: 18: 00 00 01 d0 -; CHECKOBJ-NEXT: 1c: 00 00 01 d8 -; CHECKOBJ-NEXT: 20: 00 00 01 9d -; CHECKOBJ-NEXT: 24: 00 00 00 00 {{.*}}{{[[:space:]] *}} -; CHECKOBJ-NEXT: 00000028 <.rodata.str1.1>: -; CHECKOBJ-NEXT: 28: 68 65 6c 6c -; CHECKOBJ-NEXT: 2c: 6f 20 77 6f -; CHECKOBJ-NEXT: 30: 72 6c 64 21 -; CHECKOBJ-NEXT: 34: 0a 00 61 62 -; CHECKOBJ-NEXT: 38: 63 64 65 66 -; CHECKOBJ-NEXT: 3c: 67 68 00 00 +; CHECKOBJ: 00000020 <.rodata.str2.2>: +; CHECKOBJ-NEXT: 20: 01 08 01 10 +; CHECKOBJ-NEXT: 24: 00 d5 00 00 +; CHECKOBJ-NEXT: ...{{.*}}{{[[:space:]] *}} +; CHECKOBJ-NEXT: 00000040 <.rodata.str4.4>: +; CHECKOBJ-NEXT: 40: 00 00 01 d0 +; CHECKOBJ-NEXT: 44: 00 00 01 d8 +; CHECKOBJ-NEXT: 48: 00 00 01 9d +; CHECKOBJ-NEXT: ...{{.*}}{{[[:space:]] *}} +; CHECKOBJ-NEXT: 00000060 <.rodata.str1.1>: +; CHECKOBJ-NEXT: 60: 68 65 6c 6c +; CHECKOBJ-NEXT: 64: 6f 20 77 6f +; CHECKOBJ-NEXT: 68: 72 6c 64 21 +; CHECKOBJ-NEXT: 6c: 0a 00 61 62 +; CHECKOBJ-NEXT: 70: 63 64 65 66 +; CHECKOBJ-NEXT: 74: 67 68 00 00 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll @@ -72,17 +72,17 @@ ; DIS-NEXT: 00000000 (idx: {{[0-9]+}}) .foo: ; DIS-NEXT: 0: 3c 62 00 00 addis 3, 2, 0 ; DIS-NEXT: 00000002: R_TOCU (idx: [[#INDX:]]) a[TE] -; DIS-NEXT: 4: 80 63 00 00 lwz 3, 0(3) +; DIS-NEXT: 4: 80 63 00 10 lwz 3, 16(3) ; DIS-NEXT: 00000006: R_TOCL (idx: [[#INDX]]) a[TE] ; DIS-NEXT: 8: 80 63 00 00 lwz 3, 0(3) ; DIS-NEXT: c: 3c 82 00 00 addis 4, 2, 0 ; DIS-NEXT: 0000000e: R_TOCU (idx: [[#INDX+2]]) b[TE] -; DIS-NEXT: 10: 80 84 00 04 lwz 4, 4(4) +; DIS-NEXT: 10: 80 84 00 30 lwz 4, 48(4) ; DIS-NEXT: 00000012: R_TOCL (idx: [[#INDX+2]]) b[TE] ; DIS-NEXT: 14: 80 84 00 00 lwz 4, 0(4) ; DIS-NEXT: 18: 3c a2 00 00 addis 5, 2, 0 ; DIS-NEXT: 0000001a: R_TOCU (idx: [[#INDX+4]]) c[TE] -; DIS-NEXT: 1c: 80 a5 00 08 lwz 5, 8(5) +; DIS-NEXT: 1c: 80 a5 00 50 lwz 5, 80(5) ; DIS-NEXT: 0000001e: R_TOCL (idx: [[#INDX+4]]) c[TE] ; DIS-NEXT: 20: 7c 63 22 14 add 3, 3, 4 ; DIS-NEXT: 24: 80 a5 00 00 lwz 5, 0(5) diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll @@ -36,7 +36,7 @@ ; OBJ-NEXT: Magic: 0x1DF ; OBJ-NEXT: NumberOfSections: 2 ; OBJ-NEXT: TimeStamp: None (0x0) -; OBJ-NEXT: SymbolTableOffset: 0x13C +; OBJ-NEXT: SymbolTableOffset: 0x158 ; OBJ-NEXT: SymbolTableEntries: 27 ; OBJ-NEXT: OptionalHeaderSize: 0x0 ; OBJ-NEXT: Flags: 0x0 @@ -49,7 +49,7 @@ ; OBJ-NEXT: VirtualAddress: 0x0 ; OBJ-NEXT: Size: 0x40 ; OBJ-NEXT: RawDataOffset: 0x64 -; OBJ-NEXT: RelocationPointer: 0xEC +; OBJ-NEXT: RelocationPointer: 0x108 ; OBJ-NEXT: LineNumberPointer: 0x0 ; OBJ-NEXT: NumberOfRelocations: 3 ; OBJ-NEXT: NumberOfLineNumbers: 0 @@ -60,9 +60,9 @@ ; OBJ-NEXT: Name: .data ; OBJ-NEXT: PhysicalAddress: 0x40 ; OBJ-NEXT: VirtualAddress: 0x40 -; OBJ-NEXT: Size: 0x48 +; OBJ-NEXT: Size: 0x64 ; OBJ-NEXT: RawDataOffset: 0xA4 -; OBJ-NEXT: RelocationPointer: 0x10A +; OBJ-NEXT: RelocationPointer: 0x126 ; OBJ-NEXT: LineNumberPointer: 0x0 ; OBJ-NEXT: NumberOfRelocations: 5 ; OBJ-NEXT: NumberOfLineNumbers: 0 @@ -136,7 +136,7 @@ ; RELOC-NEXT: Type: R_POS (0x0) ; RELOC-NEXT: } ; RELOC-NEXT: Relocation { -; RELOC-NEXT: Virtual Address: 0x84 +; RELOC-NEXT: Virtual Address: 0xA0 ; RELOC-NEXT: Symbol: globalB (13) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 @@ -210,7 +210,7 @@ ; SYM-NEXT: SectionLen: 64 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 4 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_PR (0x0) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -250,7 +250,7 @@ ; SYM-NEXT: SectionLen: 52 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_RW (0x5) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -390,7 +390,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -400,7 +400,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: [[#INDX+24]] ; SYM-NEXT: Name: globalB -; SYM-NEXT: Value (RelocatableAddress): 0x84 +; SYM-NEXT: Value (RelocatableAddress): 0xA0 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -410,7 +410,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -430,7 +430,7 @@ ; DIS-NEXT: 10: 4b ff ff f1 bl 0x0 ; DIS-NEXT: 14: 60 00 00 00 nop ; DIS-NEXT: 18: 80 82 00 00 lwz 4, 0(2) -; DIS-NEXT: 1c: 80 a2 00 04 lwz 5, 4(2) +; DIS-NEXT: 1c: 80 a2 00 20 lwz 5, 32(2) ; DIS-NEXT: 20: 80 84 00 00 lwz 4, 0(4) ; DIS-NEXT: 24: 80 a5 00 00 lwz 5, 0(5) ; DIS-NEXT: 28: 7c 63 22 14 add 3, 3, 4 @@ -456,8 +456,8 @@ ; DIS-NEXT: 7c: 00 00 00 00 ; DIS: 00000080 : ; DIS-NEXT: 80: 00 00 00 40 -; DIS: 00000084 : -; DIS-NEXT: 84: 00 00 00 44 +; DIS: 000000a0 : +; DIS-NEXT: a0: 00 00 00 44 ; DIS_REL: {{.*}}aix-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000 ; DIS_REL: RELOCATION RECORDS FOR [.text]: @@ -471,4 +471,4 @@ ; DIS_REL-NEXT: 00000034 R_POS .foo ; DIS_REL-NEXT: 00000038 R_POS TOC ; DIS_REL-NEXT: 00000040 R_POS globalA -; DIS_REL-NEXT: 00000044 R_POS globalB +; DIS_REL-NEXT: 00000060 R_POS globalB diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll @@ -54,7 +54,7 @@ ; ASM-NEXT: .vbyte 4, ._Renamed..24f_o # @"f$o" ; ASM-NEXT: .vbyte 4, TOC[TC0] ; ASM-NEXT: .vbyte 4, 0 -; ASM-NEXT: .csect .text[PR],2 +; ASM-NEXT: .csect .text[PR],5 ; ASM-NEXT: ._Renamed..24f_o: ; ASM: bl ._Renamed..40f_o[PR] ; ASM-NEXT: nop @@ -67,7 +67,7 @@ ; ASM-NEXT: .vbyte 4, ._Renamed..26f_o # @"f&o" ; ASM-NEXT: .vbyte 4, TOC[TC0] ; ASM-NEXT: .vbyte 4, 0 -; ASM-NEXT: .csect .text[PR],2 +; ASM-NEXT: .csect .text[PR],5 ; ASM-NEXT: ._Renamed..26f_o: ; ASM: bl ._Renamed..24f_o ; ASM: .globl _Renamed..265ff__o[DS] # -- Begin function f&_o @@ -79,9 +79,9 @@ ; ASM-NEXT: .vbyte 4, ._Renamed..265ff__o # @"f&_o" ; ASM-NEXT: .vbyte 4, TOC[TC0] ; ASM-NEXT: .vbyte 4, 0 -; ASM-NEXT: .csect .text[PR],2 +; ASM-NEXT: .csect .text[PR],5 ; ASM-NEXT: ._Renamed..265ff__o: -; ASM: .csect .data[RW],2 +; ASM: .csect .data[RW],5 ; ASM-NEXT: .globl _Renamed..60f_o ; ASM-NEXT: .rename _Renamed..60f_o,"f`o" ; ASM-NEXT: .align 2 @@ -125,7 +125,7 @@ ; OBJ-NEXT: 34: 90 01 00 08 stw 0, 8(1) ; OBJ-NEXT: 38: 94 21 ff c0 stwu 1, -64(1) ; OBJ-NEXT: 3c: 4b ff ff c5 bl 0x0 -; OBJ-NEXT: 40: 80 82 00 00 lwz 4, 0(2) +; OBJ-NEXT: 40: 80 82 00 18 lwz 4, 24(2) ; OBJ-NEXT: 00000042: R_TOC (idx: 25) f=o[TC] ; OBJ-NEXT: 44: 80 84 00 00 lwz 4, 0(4) ; OBJ-NEXT: 48: 7c 63 22 14 add 3, 3, 4 @@ -136,48 +136,52 @@ ; OBJ-NEXT: 5c: 60 00 00 00 nop ; OBJ-EMPTY: ; OBJ-NEXT: 00000060 (idx: 11) .f&_o: -; OBJ-NEXT: 60: 80 62 00 04 lwz 3, 4(2) +; OBJ-NEXT: 60: 80 62 00 38 lwz 3, 56(2) ; OBJ-NEXT: 00000062: R_TOC (idx: 27) f@o[TC] ; OBJ-NEXT: 64: 4e 80 00 20 blr ; OBJ-EMPTY: ; OBJ-NEXT: Disassembly of section .data: ; OBJ-EMPTY: -; OBJ-NEXT: 00000068 (idx: 15) f`o: -; OBJ-NEXT: 68: 00 00 00 0a +; OBJ-NEXT: 00000080 (idx: 15) f`o: +; OBJ-NEXT: 80: 00 00 00 0a ; OBJ-EMPTY: -; OBJ-NEXT: 0000006c (idx: 17) f$o[DS]: -; OBJ-NEXT: 6c: 00 00 00 00 -; OBJ-NEXT: 0000006c: R_POS (idx: 7) .f$o -; OBJ-NEXT: 70: 00 00 00 90 -; OBJ-NEXT: 00000070: R_POS (idx: 23) TOC[TC0] -; OBJ-NEXT: 74: 00 00 00 00 -; OBJ-EMPTY: -; OBJ-NEXT: 00000078 (idx: 19) f&o[DS]: -; OBJ-NEXT: 78: 00 00 00 30 -; OBJ-NEXT: 00000078: R_POS (idx: 9) .f&o -; OBJ-NEXT: 7c: 00 00 00 90 -; OBJ-NEXT: 0000007c: R_POS (idx: 23) TOC[TC0] -; OBJ-NEXT: 80: 00 00 00 00 -; OBJ-EMPTY: -; OBJ-NEXT: 00000084 (idx: 21) f&_o[DS]: -; OBJ-NEXT: 84: 00 00 00 60 -; OBJ-NEXT: 00000084: R_POS (idx: 11) .f&_o -; OBJ-NEXT: 88: 00 00 00 90 +; OBJ-NEXT: 00000084 (idx: 17) f$o[DS]: +; OBJ-NEXT: 84: 00 00 00 00 +; OBJ-NEXT: 00000084: R_POS (idx: 7) .f$o +; OBJ-NEXT: 88: 00 00 00 a8 ; OBJ-NEXT: 00000088: R_POS (idx: 23) TOC[TC0] ; OBJ-NEXT: 8c: 00 00 00 00 ; OBJ-EMPTY: -; OBJ-NEXT: 00000090 (idx: 25) f=o[TC]: -; OBJ-NEXT: 90: 00 00 00 9c -; OBJ-NEXT: 00000090: R_POS (idx: 31) f=o[BS] +; OBJ-NEXT: 00000090 (idx: 19) f&o[DS]: +; OBJ-NEXT: 90: 00 00 00 30 +; OBJ-NEXT: 00000090: R_POS (idx: 9) .f&o +; OBJ-NEXT: 94: 00 00 00 a8 +; OBJ-NEXT: 00000094: R_POS (idx: 23) TOC[TC0] +; OBJ-NEXT: 98: 00 00 00 00 +; OBJ-EMPTY: +; OBJ-NEXT: 0000009c (idx: 21) f&_o[DS]: +; OBJ-NEXT: 9c: 00 00 00 60 +; OBJ-NEXT: 0000009c: R_POS (idx: 11) .f&_o +; OBJ-NEXT: a0: 00 00 00 a8 +; OBJ-NEXT: 000000a0: R_POS (idx: 23) TOC[TC0] +; OBJ-NEXT: a4: 00 00 00 00 +; OBJ-EMPTY: +; OBJ-NEXT: 000000a8 (idx: 23) TOC[TC0]: +; OBJ-NEXT: ... +; OBJ-EMPTY: +; OBJ-NEXT: 000000c0 (idx: 25) f=o[TC]: +; OBJ-NEXT: c0: 00 00 00 e8 +; OBJ-NEXT: 000000c0: R_POS (idx: 31) f=o[BS] +; OBJ-NEXT: ... ; OBJ-EMPTY: -; OBJ-NEXT: 00000094 (idx: 27) f@o[TC]: -; OBJ-NEXT: 94: 00 00 00 00 -; OBJ-NEXT: 00000094: R_POS (idx: 3) f@o[DS] +; OBJ-NEXT: 000000e0 (idx: 27) f@o[TC]: +; OBJ-NEXT: e0: 00 00 00 00 +; OBJ-NEXT: 000000e0: R_POS (idx: 3) f@o[DS] ; OBJ-EMPTY: ; OBJ-NEXT: Disassembly of section .bss: ; OBJ-EMPTY: -; OBJ-NEXT: 00000098 (idx: 29) f"o"[RW]: +; OBJ-NEXT: 000000e4 (idx: 29) f"o"[RW]: ; OBJ-NEXT: ... ; OBJ-EMPTY: -; OBJ-NEXT: 0000009c (idx: 31) f=o[BS]: +; OBJ-NEXT: 000000e8 (idx: 31) f=o[BS]: ; OBJ-NEXT: ... diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll @@ -202,7 +202,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: [[#TOC_INDX+2]] ; SYM-NEXT: Name: a -; SYM-NEXT: Value (RelocatableAddress): 0xA8 +; SYM-NEXT: Value (RelocatableAddress): 0xC0 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -212,7 +212,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -222,7 +222,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: [[#TOC_INDX+4]] ; SYM-NEXT: Name: b -; SYM-NEXT: Value (RelocatableAddress): 0xAC +; SYM-NEXT: Value (RelocatableAddress): 0xE0 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -232,7 +232,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -242,7 +242,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: [[#TOC_INDX+6]] ; SYM-NEXT: Name: c -; SYM-NEXT: Value (RelocatableAddress): 0xB0 +; SYM-NEXT: Value (RelocatableAddress): 0x100 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -252,7 +252,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -262,7 +262,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: [[#TOC_INDX+8]] ; SYM-NEXT: Name: globa -; SYM-NEXT: Value (RelocatableAddress): 0xB4 +; SYM-NEXT: Value (RelocatableAddress): 0x120 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -272,7 +272,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -282,7 +282,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: [[#TOC_INDX+10]] ; SYM-NEXT: Name: ptr -; SYM-NEXT: Value (RelocatableAddress): 0xB8 +; SYM-NEXT: Value (RelocatableAddress): 0x140 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -292,7 +292,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -302,7 +302,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: [[#TOC_INDX+12]] ; SYM-NEXT: Name: bar -; SYM-NEXT: Value (RelocatableAddress): 0xBC +; SYM-NEXT: Value (RelocatableAddress): 0x160 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -312,7 +312,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -322,7 +322,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: [[#TOC_INDX+14]] ; SYM-NEXT: Name: foo -; SYM-NEXT: Value (RelocatableAddress): 0xC0 +; SYM-NEXT: Value (RelocatableAddress): 0x180 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -332,7 +332,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 @@ -342,7 +342,7 @@ ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: [[#TOC_INDX+16]] ; SYM-NEXT: Name: foobar -; SYM-NEXT: Value (RelocatableAddress): 0xC4 +; SYM-NEXT: Value (RelocatableAddress): 0x1A0 ; SYM-NEXT: Section: .data ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B) @@ -352,7 +352,7 @@ ; SYM-NEXT: SectionLen: 4 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM-NEXT: SymbolAlignmentLog2: 5 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3) ; SYM-NEXT: StabInfoIndex: 0x0 diff --git a/llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll b/llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll --- a/llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll +++ b/llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll @@ -7,7 +7,7 @@ attributes #0 = { "toc-data" } ; CHECK: .toc -; CHECK-NEXT: .csect i[TD],2 +; CHECK-NEXT: .csect i[TD],5 ; CHECK-NEXT: .globl i[TD] ; CHECK-NEXT: .align 2 ; CHECK-NEXT: .vbyte 4, 55