Index: include/llvm/IR/IntrinsicsPowerPC.td =================================================================== --- include/llvm/IR/IntrinsicsPowerPC.td +++ include/llvm/IR/IntrinsicsPowerPC.td @@ -694,6 +694,12 @@ def int_ppc_vsx_xvrdpip : Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty], [IntrNoMem]>; +// Vector reciprocal estimate +def int_ppc_vsx_xvresp : GCCBuiltin<"__builtin_vsx_xvresp">, + Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>; +def int_ppc_vsx_xvredp : GCCBuiltin<"__builtin_vsx_xvredp">, + Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty], [IntrNoMem]>; + // Vector rsqrte def int_ppc_vsx_xvrsqrtesp : GCCBuiltin<"__builtin_vsx_xvrsqrtesp">, Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>; Index: lib/Target/PowerPC/PPCInstrVSX.td =================================================================== --- lib/Target/PowerPC/PPCInstrVSX.td +++ lib/Target/PowerPC/PPCInstrVSX.td @@ -989,6 +989,12 @@ def : Pat<(int_ppc_vsx_xvdivdp v2f64:$A, v2f64:$B), (XVDIVDP $A, $B)>; +// Reciprocal estimate +def : Pat<(int_ppc_vsx_xvresp v4f32:$A), + (XVRESP $A)>; +def : Pat<(int_ppc_vsx_xvredp v2f64:$A), + (XVREDP $A)>; + // Recip. square root estimate def : Pat<(int_ppc_vsx_xvrsqrtesp v4f32:$A), (XVRSQRTESP $A)>; Index: test/CodeGen/PowerPC/builtins-ppc-elf2-abi.ll =================================================================== --- test/CodeGen/PowerPC/builtins-ppc-elf2-abi.ll +++ test/CodeGen/PowerPC/builtins-ppc-elf2-abi.ll @@ -134,6 +134,36 @@ ; CHECK: xvcmpgtsp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} } +; Function Attrs: nounwind +define <4 x float> @emit_xvresp(<4 x float> %a) { +entry: + %a.addr = alloca <4 x float>, align 16 + store <4 x float> %a, <4 x float>* %a.addr, align 16 + %0 = load <4 x float>, <4 x float>* %a.addr, align 16 + %1 = call <4 x float> @llvm.ppc.vsx.xvresp(<4 x float> %0) + ret <4 x float> %1 +; CHECK-LABEL: @emit_xvresp +; CHECK: xvresp {{[0-9]+}}, {{[0-9]+}} +} + +; Function Attrs: nounwind +define <2 x double> @emit_xvredp(<2 x double> %a) { +entry: + %a.addr = alloca <2 x double>, align 16 + store <2 x double> %a, <2 x double>* %a.addr, align 16 + %0 = load <2 x double>, <2 x double>* %a.addr, align 16 + %1 = call <2 x double> @llvm.ppc.vsx.xvredp(<2 x double> %0) + ret <2 x double> %1 +; CHECK-LABEL: @emit_xvredp +; CHECK: xvredp {{[0-9]+}}, {{[0-9]+}} +} + +; Function Attrs: nounwind readnone +declare <4 x float> @llvm.ppc.vsx.xvresp(<4 x float>) + +; Function Attrs: nounwind readnone +declare <2 x double> @llvm.ppc.vsx.xvredp(<2 x double>) + ; Function Attrs: nounwind readnone declare <2 x double> @llvm.ceil.v2f64(<2 x double>)