diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -3721,11 +3721,20 @@
     Tmp3 = Node->getOperand(3);              // RHS
     Tmp4 = Node->getOperand(1);              // CC
 
-    bool Legalized =
-        TLI.LegalizeSetCCCondCode(DAG, getSetCCResultType(Tmp2.getValueType()),
-                                  Tmp2, Tmp3, Tmp4, NeedInvert, dl, Chain);
-    (void)Legalized;
-    assert(Legalized && "Can't legalize BR_CC with legal condition!");
+    EVT CCResultType = getSetCCResultType(Tmp2.getValueType());
+    bool Legalized = TLI.LegalizeSetCCCondCode(DAG, CCResultType, Tmp2, Tmp3,
+                                               Tmp4, NeedInvert, dl, Chain);
+
+    // If the condition code is legal, try split BR_CC into SETCC with new BR_CC.
+    if (!Legalized) {
+      ISD::CondCode CC = cast<CondCodeSDNode>(Tmp4)->get();
+      SDValue Cmp = DAG.getSetCC(dl, CCResultType, Tmp2, Tmp3, CC);
+      SDValue Zero = DAG.getConstant(0, dl, Cmp.getValueType());
+      Results.push_back(DAG.getNode(ISD::BR_CC, dl, MVT::Other, Tmp1,
+                                    DAG.getCondCode(ISD::SETNE), Cmp, Zero,
+                                    Node->getOperand(4)));
+      break;
+    }
 
     // If we expanded the SETCC by swapping LHS and RHS, create a new BR_CC
     // node.
diff --git a/llvm/test/CodeGen/PowerPC/f128-branch-cond.ll b/llvm/test/CodeGen/PowerPC/f128-branch-cond.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/f128-branch-cond.ll
@@ -0,0 +1,77 @@
+; RUN: llc -mtriple=powerpc64le-unknown-linux -mcpu=pwr8 -O0 < %s
+; RUN: llc -mtriple=powerpc64le-unknown-linux -mcpu=pwr9 -O0 < %s
+
+define i32 @test_choice1(fp128 %a, fp128 %b) {
+entry:
+  %cmp = fcmp oeq fp128 %a, %b
+  br i1 %cmp, label %if.true, label %if.false
+
+if.true:
+  %res1 = call i32 @foo()
+  br label %final
+
+if.false:
+  %res2 = call i32 @bar()
+  br label %final
+
+final:
+  %result = phi i32 [%res1, %if.true], [%res2, %if.false]
+  ret i32 %result
+}
+
+ define i32 @test_choice2(fp128 %a, fp128 %b) {
+ entry:
+   %cmp = fcmp ugt fp128 %a, %b
+   br i1 %cmp, label %if.true, label %if.false
+
+ if.true:
+   %res1 = call i32 @foo()
+   br label %final
+
+ if.false:
+   %res2 = call i32 @bar()
+   br label %final
+
+ final:
+   %result = phi i32 [%res1, %if.true], [%res2, %if.false]
+   ret i32 %result
+ }
+
+ define i32 @test_choice3(fp128 %a, fp128 %b) {
+ entry:
+   %cmp = fcmp olt fp128 %a, %b
+   br i1 %cmp, label %if.true, label %if.false
+
+ if.true:
+   %res1 = call i32 @foo()
+   br label %final
+
+ if.false:
+   %res2 = call i32 @bar()
+   br label %final
+
+ final:
+   %result = phi i32 [%res1, %if.true], [%res2, %if.false]
+   ret i32 %result
+ }
+
+ define i32 @test_choice4(fp128 %a, fp128 %b) {
+ entry:
+   %cmp = fcmp une fp128 %a, %b
+   br i1 %cmp, label %if.true, label %if.false
+
+ if.true:
+   %res1 = call i32 @foo()
+   br label %final
+
+ if.false:
+   %res2 = call i32 @bar()
+   br label %final
+
+ final:
+   %result = phi i32 [%res1, %if.true], [%res2, %if.false]
+   ret i32 %result
+ }
+
+declare i32 @foo()
+declare i32 @bar()