diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h --- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h +++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h @@ -244,6 +244,12 @@ /// to enable more fine-grained adjustment, or adjust by a different value. virtual int getSPAdjust(const MachineInstr &MI) const; + /// Returns true if the instruction is an intrinsic which will be lowered to + /// an natitive instruction manupulating the stack. + virtual bool isStackAdjustIntrinsic(const MachineInstr &MI) const { + return false; + } + /// Return true if the instruction is a "coalescable" extension instruction. /// That is, it's like a copy where it's legal for the source to overlap the /// destination. e.g. X86::MOVSX64rr32. If this returns true, then it's diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h --- a/llvm/lib/Target/X86/X86InstrInfo.h +++ b/llvm/lib/Target/X86/X86InstrInfo.h @@ -172,6 +172,9 @@ /// sequences involving PUSHes. int getSPAdjust(const MachineInstr &MI) const override; + // On X86 platform returns true for instrinsics lowered to calls. + bool isStackAdjustIntrinsic(const MachineInstr &MI) const override; + /// isCoalescableExtInstr - Return true if the instruction is a "coalescable" /// extension instruction. That is, it's like a copy where it's legal for the /// source to overlap the destination. e.g. X86::MOVSX64rr32. If this returns diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -672,6 +672,12 @@ } } +/// Returns true for the sanitizer access check as it will be lowered to +// a call. +bool X86InstrInfo::isStackAdjustIntrinsic(const MachineInstr &MI) const { + return MI.getOpcode() == X86::ASAN_CHECK_MEMACCESS; +} + /// Return true and the FrameIndex if the specified /// operand and follow operands form a reference to the stack frame. bool X86InstrInfo::isFrameOperand(const MachineInstr &MI, unsigned int Op,