Index: llvm/lib/Target/X86/X86CallingConv.td =================================================================== --- llvm/lib/Target/X86/X86CallingConv.td +++ llvm/lib/Target/X86/X86CallingConv.td @@ -1116,10 +1116,10 @@ def CSR_Win64_SwiftTail : CalleeSavedRegs<(sub CSR_Win64, R13, R14)>; // The function used by Darwin to obtain the address of a thread-local variable -// uses rdi to pass a single parameter and rax for the return value. All other -// GPRs are preserved. +// uses rdi to pass a single parameter and rax for the return value. The +// dynamic linker can clobber r11. All other GPRs are preserved. def CSR_64_TLS_Darwin : CalleeSavedRegs<(add CSR_64, RCX, RDX, RSI, - R8, R9, R10, R11)>; + R8, R9, R10)>; // CSRs that are handled by prologue, epilogue. def CSR_64_CXX_TLS_Darwin_PE : CalleeSavedRegs<(add RBP)>; Index: llvm/test/CodeGen/X86/cxx_tlscc64.ll =================================================================== --- llvm/test/CodeGen/X86/cxx_tlscc64.ll +++ llvm/test/CodeGen/X86/cxx_tlscc64.ll @@ -18,7 +18,6 @@ ; Every GPR should be saved - except rdi, rax, and rsp ; CHECK-LABEL: _ZTW2sg -; CHECK-NOT: pushq %r11 ; CHECK-NOT: pushq %r10 ; CHECK-NOT: pushq %r9 ; CHECK-NOT: pushq %r8 @@ -38,10 +37,8 @@ ; CHECK-NOT: popq %r8 ; CHECK-NOT: popq %r9 ; CHECK-NOT: popq %r10 -; CHECK-NOT: popq %r11 ; CHECK-O0-LABEL: _ZTW2sg -; CHECK-O0: pushq %r11 ; CHECK-O0: pushq %r10 ; CHECK-O0: pushq %r9 ; CHECK-O0: pushq %r8 @@ -59,7 +56,6 @@ ; CHECK-O0: popq %r8 ; CHECK-O0: popq %r9 ; CHECK-O0: popq %r10 -; CHECK-O0: popq %r11 define cxx_fast_tlscc nonnull %struct.S* @_ZTW2sg() nounwind { %.b.i = load i1, i1* @__tls_guard, align 1 br i1 %.b.i, label %__tls_init.exit, label %init.i @@ -75,7 +71,6 @@ } ; CHECK-LABEL: _ZTW4sum1 -; CHECK-NOT: pushq %r11 ; CHECK-NOT: pushq %r10 ; CHECK-NOT: pushq %r9 ; CHECK-NOT: pushq %r8 @@ -85,7 +80,6 @@ ; CHECK-NOT: pushq %rbx ; CHECK: callq ; CHECK-O0-LABEL: _ZTW4sum1 -; CHECK-O0-NOT: pushq %r11 ; CHECK-O0-NOT: pushq %r10 ; CHECK-O0-NOT: pushq %r9 ; CHECK-O0-NOT: pushq %r8 @@ -93,7 +87,6 @@ ; CHECK-O0-NOT: pushq %rdx ; CHECK-O0-NOT: pushq %rcx ; CHECK-O0-NOT: pushq %rbx -; CHECK-O0-NOT: movq %r11 ; CHECK-O0-NOT: movq %r10 ; CHECK-O0-NOT: movq %r9 ; CHECK-O0-NOT: movq %r8 @@ -117,7 +110,6 @@ ; Make sure at O0, we don't generate spilling/reloading of the CSRs. ; CHECK-O0-LABEL: tls_test2 -; CHECK-O0-NOT: pushq %r11 ; CHECK-O0-NOT: pushq %r10 ; CHECK-O0-NOT: pushq %r9 ; CHECK-O0-NOT: pushq %r8 @@ -129,7 +121,6 @@ ; CHECK-O0-NOT: popq %r8 ; CHECK-O0-NOT: popq %r9 ; CHECK-O0-NOT: popq %r10 -; CHECK-O0-NOT: popq %r11 ; CHECK-O0: ret %class.C = type { i32 } @tC = internal thread_local global %class.C zeroinitializer, align 4 @@ -154,7 +145,6 @@ @ssp_var = internal thread_local global i8 0, align 1 ; CHECK-LABEL: test_ssp -; CHECK-NOT: pushq %r11 ; CHECK-NOT: pushq %r10 ; CHECK-NOT: pushq %r9 ; CHECK-NOT: pushq %r8