diff --git a/llvm/test/Transforms/LoopIdiom/memset-runtime-32bit.ll b/llvm/test/Transforms/LoopIdiom/memset-runtime-32bit.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/LoopIdiom/memset-runtime-32bit.ll @@ -0,0 +1,372 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -passes="function(loop(indvars,loop-idiom,loop-deletion),simplifycfg)" -S < %s | FileCheck %s +; Compile command: +; $ clang -m32 -fno-discard-value-names -O0 -S -emit-llvm -Xclang -disable-O0-optnone Code.c +; $ bin/opt -S -basic-aa -mem2reg -loop-simplify -lcssa -loop-rotate \ +; -licm -simple-loop-unswitch -enable-nontrivial-unswitch -loop-simplify \ +; -loop-deletion -simplifycfg -indvars Code.ll > CodeOpt.ll +target datalayout = "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-f80:32-n8:16:32-S128" +; void PositiveFor32(int *ar, int n, int m) +; { +; int i; +; for (i=0; i=0; i--) { +; int *arr = ar + i * m; +; memset(arr, 0, m * sizeof(int)); +; } +; } +define void @NegativeFor32(i32* %ar, i32 %n, i32 %m) { +; CHECK-LABEL: @NegativeFor32( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8* +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[N:%.*]], 1 +; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[SUB]], 0 +; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]] +; CHECK: for.body.lr.ph: +; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[M:%.*]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = mul i32 [[M]], [[N]] +; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[TMP0]], 2 +; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[AR1]], i8 0, i32 [[TMP1]], i1 false) +; CHECK-NEXT: br label [[FOR_END]] +; CHECK: for.end: +; CHECK-NEXT: ret void +; +entry: + %sub = sub nsw i32 %n, 1 + %cmp1 = icmp sge i32 %sub, 0 + br i1 %cmp1, label %for.body.lr.ph, label %for.end + +for.body.lr.ph: ; preds = %entry + %mul1 = mul i32 %m, 4 + br label %for.body + +for.body: ; preds = %for.body.lr.ph, %for.body + %i.02 = phi i32 [ %sub, %for.body.lr.ph ], [ %dec, %for.body ] + %mul = mul nsw i32 %i.02, %m + %add.ptr = getelementptr inbounds i32, i32* %ar, i32 %mul + %0 = bitcast i32* %add.ptr to i8* + call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 %mul1, i1 false) + %dec = add nsw i32 %i.02, -1 + %cmp = icmp sge i32 %dec, 0 + br i1 %cmp, label %for.body, label %for.end + +for.end: ; preds = %for.body, %entry + ret void +} +; void NestedFor32(int *ar, int n, int m, int o) +; { +; int i, j; +; for (i=0; i=0; --i) { +; int *arr = ar + i * m; +; memset(arr, 0, m * sizeof(int)); +; } +; } +define dso_local void @NegativeFor64(i32* %ar, i64 %n, i64 %m) #0 { +; CHECK-LABEL: @NegativeFor64( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8* +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i64 [[N:%.*]], 1 +; CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[SUB]] to i32 +; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[CONV]], 0 +; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]] +; CHECK: for.body.lr.ph: +; CHECK-NEXT: [[MUL3:%.*]] = mul nsw i64 [[M:%.*]], 4 +; CHECK-NEXT: [[CONV4:%.*]] = trunc i64 [[MUL3]] to i32 +; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[M]] to i32 +; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[CONV]], -1 +; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[TMP0]], [[TMP1]] +; CHECK-NEXT: [[TMP3:%.*]] = shl i32 [[TMP2]], 2 +; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[AR1]], i8 0, i32 [[TMP3]], i1 false) +; CHECK-NEXT: br label [[FOR_END]] +; CHECK: for.end: +; CHECK-NEXT: ret void +; +entry: + %sub = sub nsw i64 %n, 1 + %conv = trunc i64 %sub to i32 + %cmp1 = icmp sge i32 %conv, 0 + br i1 %cmp1, label %for.body.lr.ph, label %for.end + +for.body.lr.ph: ; preds = %entry + %mul3 = mul nsw i64 %m, 4 + %conv4 = trunc i64 %mul3 to i32 + br label %for.body + +for.body: ; preds = %for.body.lr.ph, %for.body + %i.02 = phi i32 [ %conv, %for.body.lr.ph ], [ %dec, %for.body ] + %conv2 = sext i32 %i.02 to i64 + %mul = mul nsw i64 %conv2, %m + %idx.ext = trunc i64 %mul to i32 + %add.ptr = getelementptr inbounds i32, i32* %ar, i32 %idx.ext + %0 = bitcast i32* %add.ptr to i8* + call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 %conv4, i1 false) + %dec = add nsw i32 %i.02, -1 + %cmp = icmp sge i32 %dec, 0 + br i1 %cmp, label %for.body, label %for.end.loopexit + +for.end.loopexit: ; preds = %for.body + br label %for.end + +for.end: ; preds = %for.end.loopexit, %entry + ret void +} +; void NestedFor64(int *ar, long long n, long long m, long long o) +; { +; int i, j; +; for (i=0; i CodeOpt.ll +target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" +; void PositiveFor64(int *ar, long long n, long long m) +; { +; long long i; +; for (i=0; i=0; --i) { +; int *arr = ar + i * m; +; memset(arr, 0, m * sizeof(int)); +; } +; } +define dso_local void @NegativeFor64(i32* %ar, i64 %n, i64 %m) { +; CHECK-LABEL: @NegativeFor64( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8* +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i64 [[N:%.*]], 1 +; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i64 [[SUB]], 0 +; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]] +; CHECK: for.body.lr.ph: +; CHECK-NEXT: [[MUL1:%.*]] = mul i64 [[M:%.*]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[M]], [[N]] +; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 +; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[AR1]], i8 0, i64 [[TMP1]], i1 false) +; CHECK-NEXT: br label [[FOR_END]] +; CHECK: for.end: +; CHECK-NEXT: ret void +; +entry: + %sub = sub nsw i64 %n, 1 + %cmp1 = icmp sge i64 %sub, 0 + br i1 %cmp1, label %for.body.lr.ph, label %for.end + +for.body.lr.ph: ; preds = %entry + %mul1 = mul i64 %m, 4 + br label %for.body + +for.body: ; preds = %for.body.lr.ph, %for.body + %i.02 = phi i64 [ %sub, %for.body.lr.ph ], [ %dec, %for.body ] + %mul = mul nsw i64 %i.02, %m + %add.ptr = getelementptr inbounds i32, i32* %ar, i64 %mul + %0 = bitcast i32* %add.ptr to i8* + call void @llvm.memset.p0i8.i64(i8* align 4 %0, i8 0, i64 %mul1, i1 false) + %dec = add nsw i64 %i.02, -1 + %cmp = icmp sge i64 %dec, 0 + br i1 %cmp, label %for.body, label %for.end + +for.end: ; preds = %for.body, %entry + ret void +} +; void NestedFor64(int *ar, long long n, long long m, long long o) +; { +; long long i, j; +; for (i=0; i=0; i--) { +; int *arr = ar + i * m; +; memset(arr, 0, m * sizeof(int)); +; } +; } +define void @Negative32(i32* %ar, i32 %n, i32 %m) { +; CHECK-LABEL: @Negative32( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8* +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[N:%.*]], 1 +; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[SUB]] to i64 +; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i64 [[CONV]], 0 +; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]] +; CHECK: for.body.lr.ph: +; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[M:%.*]] to i64 +; CHECK-NEXT: [[CONV2:%.*]] = sext i32 [[M]] to i64 +; CHECK-NEXT: [[MUL3:%.*]] = mul i64 [[CONV2]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[CONV]], -1 +; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[CONV1]], [[TMP0]] +; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[TMP1]], 2 +; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[AR1]], i8 0, i64 [[TMP2]], i1 false) +; CHECK-NEXT: br label [[FOR_END]] +; CHECK: for.end: +; CHECK-NEXT: ret void +; +entry: + %sub = sub nsw i32 %n, 1 + %conv = sext i32 %sub to i64 + %cmp1 = icmp sge i64 %conv, 0 + br i1 %cmp1, label %for.body.lr.ph, label %for.end + +for.body.lr.ph: ; preds = %entry + %conv1 = sext i32 %m to i64 + %conv2 = sext i32 %m to i64 + %mul3 = mul i64 %conv2, 4 + br label %for.body + +for.body: ; preds = %for.body.lr.ph, %for.body + %i.02 = phi i64 [ %conv, %for.body.lr.ph ], [ %dec, %for.body ] + %mul = mul nsw i64 %i.02, %conv1 + %add.ptr = getelementptr inbounds i32, i32* %ar, i64 %mul + %0 = bitcast i32* %add.ptr to i8* + call void @llvm.memset.p0i8.i64(i8* align 4 %0, i8 0, i64 %mul3, i1 false) + %dec = add nsw i64 %i.02, -1 + %cmp = icmp sge i64 %dec, 0 + br i1 %cmp, label %for.body, label %for.end + +for.end: ; preds = %for.body, %entry + ret void +} +; void NestedFor32(int *ar, int n, int m, int o) +; { +; int i, j; +; for (i=0; i=0; i--) { -; int *arr = ar + i * m; -; memset(arr, 0, m * sizeof(int)); -; } -; } -define void @For_NegativeStride(i32* %ar, i32 %n, i32 %m) { -; CHECK-LABEL: @For_NegativeStride( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8* -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[N:%.*]], 1 -; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[SUB]] to i64 -; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i64 [[CONV]], 0 -; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]] -; CHECK: for.body.lr.ph: -; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[M:%.*]] to i64 -; CHECK-NEXT: [[CONV2:%.*]] = sext i32 [[M]] to i64 -; CHECK-NEXT: [[MUL3:%.*]] = mul i64 [[CONV2]], 4 -; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[CONV]], -1 -; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[CONV1]], [[TMP0]] -; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[TMP1]], 2 -; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[AR1]], i8 0, i64 [[TMP2]], i1 false) -; CHECK-NEXT: br label [[FOR_END]] -; CHECK: for.end: -; CHECK-NEXT: ret void -; -entry: - %sub = sub nsw i32 %n, 1 - %conv = sext i32 %sub to i64 - %cmp1 = icmp sge i64 %conv, 0 - br i1 %cmp1, label %for.body.lr.ph, label %for.end - -for.body.lr.ph: ; preds = %entry - %conv1 = sext i32 %m to i64 - %conv2 = sext i32 %m to i64 - %mul3 = mul i64 %conv2, 4 - br label %for.body - -for.body: ; preds = %for.body.lr.ph, %for.inc - %i.02 = phi i64 [ %conv, %for.body.lr.ph ], [ %dec, %for.inc ] - %mul = mul nsw i64 %i.02, %conv1 - %add.ptr = getelementptr inbounds i32, i32* %ar, i64 %mul - %0 = bitcast i32* %add.ptr to i8* - call void @llvm.memset.p0i8.i64(i8* align 4 %0, i8 0, i64 %mul3, i1 false) - br label %for.inc - -for.inc: ; preds = %for.body - %dec = add nsw i64 %i.02, -1 - %cmp = icmp sge i64 %dec, 0 - br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge - -for.cond.for.end_crit_edge: ; preds = %for.inc - br label %for.end - -for.end: ; preds = %for.cond.for.end_crit_edge, %entry - ret void -} - -declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg)