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Differential D105377

[NFC][AMDGPU] Add link to AMD GPU gfx906 instruction set architecture
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Authored by t-tye on Jul 2 2021, 3:12 PM.

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kzhuravl
rampitec
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rG8d69635ed9ec: [NFC][AMDGPU] Add link to AMD GPU gfx906 instruction set architecture

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t-tye created this revision.Jul 2 2021, 3:12 PM
Herald added subscribers: kerbowa, tpr, dstuttard and 3 others. · View Herald TranscriptJul 2 2021, 3:12 PM
t-tye requested review of this revision.Jul 2 2021, 3:12 PM
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Harbormaster completed remote builds in B112275: Diff 356283.Jul 2 2021, 3:45 PM
t-tye retitled this revision from [NFC][AMDGPU] Add link to AMD GPU gfx908 instruction set architecture to [NFC][AMDGPU] Add link to AMD GPU gfx906 instruction set architecture.Jul 2 2021, 3:47 PM
kzhuravl accepted this revision.Jul 6 2021, 7:58 AM
This revision is now accepted and ready to land.Jul 6 2021, 7:58 AM
Closed by commit rG8d69635ed9ec: [NFC][AMDGPU] Add link to AMD GPU gfx906 instruction set architecture (authored by t-tye). · Explain WhyJul 6 2021, 1:21 PM
This revision was automatically updated to reflect the committed changes.
t-tye added a commit: rG8d69635ed9ec: [NFC][AMDGPU] Add link to AMD GPU gfx906 instruction set architecture.

Revision Contents

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llvm/
docs/
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Diff 356810

llvm/docs/AMDGPUUsage.rst

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 312 Lines • ▼ Show 20 Lines ``gfx805`` - ``tongapro`` ``amdgcn`` dGPU - Offset - *rocm-amdhsa* - FirePro S7150
M7170 M7170
``gfx810`` - ``stoney`` ``amdgcn`` APU - xnack - Offset - *rocm-amdhsa* *TBA* ``gfx810`` - ``stoney`` ``amdgcn`` APU - xnack - Offset - *rocm-amdhsa* *TBA*
flat - *pal-amdhsa* flat - *pal-amdhsa*
scratch - *pal-amdpal* .. TODO:: scratch - *pal-amdpal* .. TODO::
Add product Add product
names. names.
**GCN GFX9 (Vega)** [AMD-GCN-GFX9]_ [AMD-GCN-GFX908-CDNA1]_ **GCN GFX9 (Vega)** [AMD-GCN-GFX900-GFX904-VEGA]_ [AMD-GCN-GFX906-VEGA7NM]_ [AMD-GCN-GFX908-CDNA1]_
----------------------------------------------------------------------------------------------------------------------- -----------------------------------------------------------------------------------------------------------------------
``gfx900`` ``amdgcn`` dGPU - xnack - Absolute - *rocm-amdhsa* - Radeon Vega ``gfx900`` ``amdgcn`` dGPU - xnack - Absolute - *rocm-amdhsa* - Radeon Vega
flat - *pal-amdhsa* Frontier Edition flat - *pal-amdhsa* Frontier Edition
scratch - *pal-amdpal* - Radeon RX Vega 56 scratch - *pal-amdpal* - Radeon RX Vega 56
- Radeon RX Vega 64 - Radeon RX Vega 64
- Radeon RX Vega 64 - Radeon RX Vega 64
Liquid Liquid
- Radeon Instinct MI25 - Radeon Instinct MI25
▲ Show 20 Lines • Show All 11,192 Lines • ▼ Show 20 Linesin this description.
:doc:`GFX10<AMDGPU/AMDGPUAsmGFX10>` :doc:`gfx1011<AMDGPU/AMDGPUAsmGFX1011>` :doc:`GFX10<AMDGPU/AMDGPUAsmGFX10>` :doc:`gfx1011<AMDGPU/AMDGPUAsmGFX1011>`
:doc:`gfx1012<AMDGPU/AMDGPUAsmGFX1011>` :doc:`gfx1012<AMDGPU/AMDGPUAsmGFX1011>`
=================================== ======================================= =================================== =======================================
For more information about instructions, their semantics and supported For more information about instructions, their semantics and supported
combinations of operands, refer to one of instruction set architecture manuals combinations of operands, refer to one of instruction set architecture manuals
[AMD-GCN-GFX6]_, [AMD-GCN-GFX7]_, [AMD-GCN-GFX8]_, [AMD-GCN-GFX9]_, [AMD-GCN-GFX6]_, [AMD-GCN-GFX7]_, [AMD-GCN-GFX8]_,
[AMD-GCN-GFX900-GFX904-VEGA]_, [AMD-GCN-GFX906-VEGA7NM]_
[AMD-GCN-GFX908-CDNA1]_, [AMD-GCN-GFX10-RDNA1]_ and [AMD-GCN-GFX10-RDNA2]_. [AMD-GCN-GFX908-CDNA1]_, [AMD-GCN-GFX10-RDNA1]_ and [AMD-GCN-GFX10-RDNA2]_.
Operands Operands
~~~~~~~~ ~~~~~~~~
Detailed description of operands may be found :doc:`here<AMDGPUOperandSyntax>`. Detailed description of operands may be found :doc:`here<AMDGPUOperandSyntax>`.
Modifiers Modifiers
▲ Show 20 Lines • Show All 726 Lines • ▼ Show 20 Lines
effort required to accurately calculate GPR usage. effort required to accurately calculate GPR usage.
Additional Documentation Additional Documentation
======================== ========================
.. [AMD-GCN-GFX6] `AMD Southern Islands Series ISA <http://developer.amd.com/wordpress/media/2012/12/AMD_Southern_Islands_Instruction_Set_Architecture.pdf>`__ .. [AMD-GCN-GFX6] `AMD Southern Islands Series ISA <http://developer.amd.com/wordpress/media/2012/12/AMD_Southern_Islands_Instruction_Set_Architecture.pdf>`__
.. [AMD-GCN-GFX7] `AMD Sea Islands Series ISA <http://developer.amd.com/wordpress/media/2013/07/AMD_Sea_Islands_Instruction_Set_Architecture.pdf>`_ .. [AMD-GCN-GFX7] `AMD Sea Islands Series ISA <http://developer.amd.com/wordpress/media/2013/07/AMD_Sea_Islands_Instruction_Set_Architecture.pdf>`_
.. [AMD-GCN-GFX8] `AMD GCN3 Instruction Set Architecture <http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2013/12/AMD_GCN3_Instruction_Set_Architecture_rev1.1.pdf>`__ .. [AMD-GCN-GFX8] `AMD GCN3 Instruction Set Architecture <http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2013/12/AMD_GCN3_Instruction_Set_Architecture_rev1.1.pdf>`__
.. [AMD-GCN-GFX9] `AMD Vega Instruction Set Architecture <http://developer.amd.com/wordpress/media/2013/12/Vega_Shader_ISA_28July2017.pdf>`__ .. [AMD-GCN-GFX900-GFX904-VEGA] `AMD Vega Instruction Set Architecture <http://developer.amd.com/wordpress/media/2013/12/Vega_Shader_ISA_28July2017.pdf>`__
.. [AMD-GCN-GFX906-VEGA7NM] `AMD Vega 7nm Instruction Set Architecture <https://gpuopen.com/wp-content/uploads/2019/11/Vega_7nm_Shader_ISA_26November2019.pdf>`__
.. [AMD-GCN-GFX908-CDNA1] `AMD Instinct MI100 Instruction Set Architecture <https://developer.amd.com/wp-content/resources/CDNA1_Shader_ISA_14December2020.pdf>`__ .. [AMD-GCN-GFX908-CDNA1] `AMD Instinct MI100 Instruction Set Architecture <https://developer.amd.com/wp-content/resources/CDNA1_Shader_ISA_14December2020.pdf>`__
.. [AMD-GCN-GFX10-RDNA1] `AMD RDNA 1.0 Instruction Set Architecture <https://gpuopen.com/wp-content/uploads/2019/08/RDNA_Shader_ISA_5August2019.pdf>`__ .. [AMD-GCN-GFX10-RDNA1] `AMD RDNA 1.0 Instruction Set Architecture <https://gpuopen.com/wp-content/uploads/2019/08/RDNA_Shader_ISA_5August2019.pdf>`__
.. [AMD-GCN-GFX10-RDNA2] `AMD RDNA 2 Instruction Set Architecture <https://developer.amd.com/wp-content/resources/RDNA2_Shader_ISA_November2020.pdf>`__ .. [AMD-GCN-GFX10-RDNA2] `AMD RDNA 2 Instruction Set Architecture <https://developer.amd.com/wp-content/resources/RDNA2_Shader_ISA_November2020.pdf>`__
.. [AMD-RADEON-HD-2000-3000] `AMD R6xx shader ISA <http://developer.amd.com/wordpress/media/2012/10/R600_Instruction_Set_Architecture.pdf>`__ .. [AMD-RADEON-HD-2000-3000] `AMD R6xx shader ISA <http://developer.amd.com/wordpress/media/2012/10/R600_Instruction_Set_Architecture.pdf>`__
.. [AMD-RADEON-HD-4000] `AMD R7xx shader ISA <http://developer.amd.com/wordpress/media/2012/10/R700-Family_Instruction_Set_Architecture.pdf>`__ .. [AMD-RADEON-HD-4000] `AMD R7xx shader ISA <http://developer.amd.com/wordpress/media/2012/10/R700-Family_Instruction_Set_Architecture.pdf>`__
.. [AMD-RADEON-HD-5000] `AMD Evergreen shader ISA <http://developer.amd.com/wordpress/media/2012/10/AMD_Evergreen-Family_Instruction_Set_Architecture.pdf>`__ .. [AMD-RADEON-HD-5000] `AMD Evergreen shader ISA <http://developer.amd.com/wordpress/media/2012/10/AMD_Evergreen-Family_Instruction_Set_Architecture.pdf>`__
.. [AMD-RADEON-HD-6000] `AMD Cayman/Trinity shader ISA <http://developer.amd.com/wordpress/media/2012/10/AMD_HD_6900_Series_Instruction_Set_Architecture.pdf>`__ .. [AMD-RADEON-HD-6000] `AMD Cayman/Trinity shader ISA <http://developer.amd.com/wordpress/media/2012/10/AMD_HD_6900_Series_Instruction_Set_Architecture.pdf>`__
.. [AMD-ROCm] `AMD ROCm™ Platform <https://rocmdocs.amd.com/>`__ .. [AMD-ROCm] `AMD ROCm™ Platform <https://rocmdocs.amd.com/>`__
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