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[RISCV] Add missing part of instruction vmsge {u}. VX
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Authored by joker881 on Thu, Apr 8, 8:28 AM.

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riscv-v-spec-0.10 page 59

The fourth case of instruction description is added

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joker881 created this revision.Thu, Apr 8, 8:28 AM
joker881 requested review of this revision.Thu, Apr 8, 8:28 AM
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lebedev.ri retitled this revision from Add missing part of instruction vmsge {u}. VX to [RISCV] Add missing part of instruction vmsge {u}. VX.Thu, Apr 8, 9:32 AM

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llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
2397

Please wrap this line as clang-format says.

2416

Please indent these comments as the clang-format says.

joker881 updated this revision to Diff 336313.Thu, Apr 8, 10:02 PM

Do we need this case? Case 4 is any vd. It means (vd == v0) || (vd != v0), right? These two cases are already covered by case 2 and case 3.

Do we need this case? Case 4 is any vd. It means (vd == v0) || (vd != v0), right? These two cases are already covered by case 2 and case 3.

I think this is the case that a temp register is provided and the destination isn't v0. The user probably should use case 2 by not providing the temp register. But if they give the temp register should we accept it and match the spec or error for the destination not being v0(what we currently do)?

joker881 updated this revision to Diff 336325.Fri, Apr 9, 12:12 AM

clang-format the code

joker881 updated this revision to Diff 336329.Fri, Apr 9, 12:42 AM
joker881 updated this revision to Diff 336342.Fri, Apr 9, 1:27 AM
joker881 marked 2 inline comments as done.

Do we need this case? Case 4 is any vd. It means (vd == v0) || (vd != v0), right? These two cases are already covered by case 2 and case 3.

I think this is the case that a temp register is provided and the destination isn't v0. The user probably should use case 2 by not providing the temp register. But if they give the temp register should we accept it and match the spec or error for the destination not being v0(what we currently do)?

If the destination is not v0, case 2 is better than case 4. There should be no need to provide the temp register. I think the case 4 is useful when we could not determine vd is v0 or not, but it should not be the case in AsmParser. The registers in MCInst should be physical registers.

joker881 updated this revision to Diff 336387.Fri, Apr 9, 4:02 AM
joker881 marked 2 inline comments as not done.
joker881 updated this revision to Diff 336392.Fri, Apr 9, 4:25 AM
joker881 marked 2 inline comments as done.
joker881 added a comment.EditedFri, Apr 9, 4:59 AM

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Ok, I have finished it. B97933: Diff 336392.

craig.topper added a comment.EditedFri, Apr 9, 9:33 AM

Do we need this case? Case 4 is any vd. It means (vd == v0) || (vd != v0), right? These two cases are already covered by case 2 and case 3.

I think this is the case that a temp register is provided and the destination isn't v0. The user probably should use case 2 by not providing the temp register. But if they give the temp register should we accept it and match the spec or error for the destination not being v0(what we currently do)?

If the destination is not v0, case 2 is better than case 4. There should be no need to provide the temp register. I think the case 4 is useful when we could not determine vd is v0 or not, but it should not be the case in AsmParser. The registers in MCInst should be physical registers.

What does the GNU assembler do?

Can someone write inline assembly that requires this? If they let the compiler allocate the registers for the inline assembly we would need to support any register.

Do we need this case? Case 4 is any vd. It means (vd == v0) || (vd != v0), right? These two cases are already covered by case 2 and case 3.

I think this is the case that a temp register is provided and the destination isn't v0. The user probably should use case 2 by not providing the temp register. But if they give the temp register should we accept it and match the spec or error for the destination not being v0(what we currently do)?

If the destination is not v0, case 2 is better than case 4. There should be no need to provide the temp register. I think the case 4 is useful when we could not determine vd is v0 or not, but it should not be the case in AsmParser. The registers in MCInst should be physical registers.

What does the GNU assembler do?

Can someone write inline assembly that requires this? If they let the compiler allocate the registers for the inline assembly we would need to support any register.

Got it. Maybe we need this pattern for inline asm. I have no strong opinion to oppose this patch. Just curious when we need it.

This revision is now accepted and ready to land.Mon, Apr 12, 10:09 AM
MaskRay closed this revision.EditedTue, Apr 13, 4:25 PM

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